llvm/test/CodeGen/X86/isel-fneg.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel                            | FileCheck %s --check-prefixes=X86,FASTISEL-X86
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0           | FileCheck %s --check-prefixes=X86,SDAG-X86
; DISABLED: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2   | FileCheck %s --check-prefixes=X86,GISEL-X86
; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel -mattr=+sse                            | FileCheck %s --check-prefixes=X86,SSE-X86,FASTISEL-SSE-X86
; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse           | FileCheck %s --check-prefixes=X86,SSE-X86,SDAG-SSE-X86
; DISABLED: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse   | FileCheck %s --check-prefixes=X86,SSE-X86,GISEL-SSE-X86
; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel -mattr=+sse                          | FileCheck %s --check-prefixes=X64,SSE-X64,FASTISEL-SSE-X64
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse         | FileCheck %s --check-prefixes=X64,SSE-X64,SDAG-SSE-X64
; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,GISEL-SSE-X64

define double @fneg_f64(double %x) nounwind {
; X86-LABEL: fneg_f64:
; X86:       # %bb.0:
; X86-NEXT:    fldl {{[0-9]+}}(%esp)
; X86-NEXT:    fchs
; X86-NEXT:    retl
;
; FASTISEL-SSE-X64-LABEL: fneg_f64:
; FASTISEL-SSE-X64:       # %bb.0:
; FASTISEL-SSE-X64-NEXT:    movq %xmm0, %rax
; FASTISEL-SSE-X64-NEXT:    movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
; FASTISEL-SSE-X64-NEXT:    xorq %rax, %rcx
; FASTISEL-SSE-X64-NEXT:    movq %rcx, %xmm0
; FASTISEL-SSE-X64-NEXT:    retq
;
; SDAG-SSE-X64-LABEL: fneg_f64:
; SDAG-SSE-X64:       # %bb.0:
; SDAG-SSE-X64-NEXT:    xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SDAG-SSE-X64-NEXT:    retq
;
; GISEL-SSE-X64-LABEL: fneg_f64:
; GISEL-SSE-X64:       # %bb.0:
; GISEL-SSE-X64-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; GISEL-SSE-X64-NEXT:    movq %xmm0, %rcx
; GISEL-SSE-X64-NEXT:    xorq %rax, %rcx
; GISEL-SSE-X64-NEXT:    movq %rcx, %xmm0
; GISEL-SSE-X64-NEXT:    retq
  %y = fneg double %x
  ret double %y
}

define float @fneg_f32(float %x) nounwind {
; FASTISEL-X86-LABEL: fneg_f32:
; FASTISEL-X86:       # %bb.0:
; FASTISEL-X86-NEXT:    flds {{[0-9]+}}(%esp)
; FASTISEL-X86-NEXT:    fchs
; FASTISEL-X86-NEXT:    retl
;
; SDAG-X86-LABEL: fneg_f32:
; SDAG-X86:       # %bb.0:
; SDAG-X86-NEXT:    flds {{[0-9]+}}(%esp)
; SDAG-X86-NEXT:    fchs
; SDAG-X86-NEXT:    retl
;
; SSE-X86-LABEL: fneg_f32:
; SSE-X86:       # %bb.0:
; SSE-X86-NEXT:    pushl %eax
; SSE-X86-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE-X86-NEXT:    xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; SSE-X86-NEXT:    movss %xmm0, (%esp)
; SSE-X86-NEXT:    flds (%esp)
; SSE-X86-NEXT:    popl %eax
; SSE-X86-NEXT:    retl
;
; FASTISEL-SSE-X64-LABEL: fneg_f32:
; FASTISEL-SSE-X64:       # %bb.0:
; FASTISEL-SSE-X64-NEXT:    movd %xmm0, %eax
; FASTISEL-SSE-X64-NEXT:    xorl $2147483648, %eax # imm = 0x80000000
; FASTISEL-SSE-X64-NEXT:    movd %eax, %xmm0
; FASTISEL-SSE-X64-NEXT:    retq
;
; SDAG-SSE-X64-LABEL: fneg_f32:
; SDAG-SSE-X64:       # %bb.0:
; SDAG-SSE-X64-NEXT:    xorps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SDAG-SSE-X64-NEXT:    retq
;
; GISEL-SSE-X64-LABEL: fneg_f32:
; GISEL-SSE-X64:       # %bb.0:
; GISEL-SSE-X64-NEXT:    movd %xmm0, %eax
; GISEL-SSE-X64-NEXT:    addl $-2147483648, %eax # imm = 0x80000000
; GISEL-SSE-X64-NEXT:    movd %eax, %xmm0
; GISEL-SSE-X64-NEXT:    retq
  %y = fneg float %x
  ret float %y
}

define void @fneg_f64_mem(ptr %x, ptr %y) nounwind {
; X86-LABEL: fneg_f64_mem:
; X86:       # %bb.0:
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    fldl (%ecx)
; X86-NEXT:    fchs
; X86-NEXT:    fstpl (%eax)
; X86-NEXT:    retl
;
; FASTISEL-SSE-X64-LABEL: fneg_f64_mem:
; FASTISEL-SSE-X64:       # %bb.0:
; FASTISEL-SSE-X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
; FASTISEL-SSE-X64-NEXT:    movq %xmm0, %rax
; FASTISEL-SSE-X64-NEXT:    movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
; FASTISEL-SSE-X64-NEXT:    xorq %rax, %rcx
; FASTISEL-SSE-X64-NEXT:    movq %rcx, %xmm0
; FASTISEL-SSE-X64-NEXT:    movq %xmm0, (%rsi)
; FASTISEL-SSE-X64-NEXT:    retq
;
; SDAG-SSE-X64-LABEL: fneg_f64_mem:
; SDAG-SSE-X64:       # %bb.0:
; SDAG-SSE-X64-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; SDAG-SSE-X64-NEXT:    xorq (%rdi), %rax
; SDAG-SSE-X64-NEXT:    movq %rax, (%rsi)
; SDAG-SSE-X64-NEXT:    retq
;
; GISEL-SSE-X64-LABEL: fneg_f64_mem:
; GISEL-SSE-X64:       # %bb.0:
; GISEL-SSE-X64-NEXT:    movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; GISEL-SSE-X64-NEXT:    xorq (%rdi), %rax
; GISEL-SSE-X64-NEXT:    movq %rax, (%rsi)
; GISEL-SSE-X64-NEXT:    retq
  %a = load double, ptr %x
  %b = fneg double %a
  store double %b, ptr %y
  ret void
}

define void @fneg_f32_mem(ptr %x, ptr %y) nounwind {
; FASTISEL-X86-LABEL: fneg_f32_mem:
; FASTISEL-X86:       # %bb.0:
; FASTISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; FASTISEL-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; FASTISEL-X86-NEXT:    movl $-2147483648, %edx # imm = 0x80000000
; FASTISEL-X86-NEXT:    xorl (%ecx), %edx
; FASTISEL-X86-NEXT:    movl %edx, (%eax)
; FASTISEL-X86-NEXT:    retl
;
; SDAG-X86-LABEL: fneg_f32_mem:
; SDAG-X86:       # %bb.0:
; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; SDAG-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; SDAG-X86-NEXT:    movl $-2147483648, %edx # imm = 0x80000000
; SDAG-X86-NEXT:    xorl (%ecx), %edx
; SDAG-X86-NEXT:    movl %edx, (%eax)
; SDAG-X86-NEXT:    retl
;
; FASTISEL-SSE-X86-LABEL: fneg_f32_mem:
; FASTISEL-SSE-X86:       # %bb.0:
; FASTISEL-SSE-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; FASTISEL-SSE-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; FASTISEL-SSE-X86-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; FASTISEL-SSE-X86-NEXT:    xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
; FASTISEL-SSE-X86-NEXT:    movss %xmm0, (%eax)
; FASTISEL-SSE-X86-NEXT:    retl
;
; SDAG-SSE-X86-LABEL: fneg_f32_mem:
; SDAG-SSE-X86:       # %bb.0:
; SDAG-SSE-X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; SDAG-SSE-X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; SDAG-SSE-X86-NEXT:    movl $-2147483648, %edx # imm = 0x80000000
; SDAG-SSE-X86-NEXT:    xorl (%ecx), %edx
; SDAG-SSE-X86-NEXT:    movl %edx, (%eax)
; SDAG-SSE-X86-NEXT:    retl
;
; FASTISEL-SSE-X64-LABEL: fneg_f32_mem:
; FASTISEL-SSE-X64:       # %bb.0:
; FASTISEL-SSE-X64-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; FASTISEL-SSE-X64-NEXT:    movd %xmm0, %eax
; FASTISEL-SSE-X64-NEXT:    xorl $2147483648, %eax # imm = 0x80000000
; FASTISEL-SSE-X64-NEXT:    movd %eax, %xmm0
; FASTISEL-SSE-X64-NEXT:    movd %xmm0, (%rsi)
; FASTISEL-SSE-X64-NEXT:    retq
;
; SDAG-SSE-X64-LABEL: fneg_f32_mem:
; SDAG-SSE-X64:       # %bb.0:
; SDAG-SSE-X64-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
; SDAG-SSE-X64-NEXT:    xorl (%rdi), %eax
; SDAG-SSE-X64-NEXT:    movl %eax, (%rsi)
; SDAG-SSE-X64-NEXT:    retq
;
; GISEL-SSE-X64-LABEL: fneg_f32_mem:
; GISEL-SSE-X64:       # %bb.0:
; GISEL-SSE-X64-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
; GISEL-SSE-X64-NEXT:    xorl (%rdi), %eax
; GISEL-SSE-X64-NEXT:    movl %eax, (%rsi)
; GISEL-SSE-X64-NEXT:    retq
  %a = load float, ptr %x
  %b = fneg float %a
  store float %b, ptr %y
  ret void
}

define x86_fp80 @test_fp80(x86_fp80 %a) nounwind {
; X86-LABEL: test_fp80:
; X86:       # %bb.0:
; X86-NEXT:    fldt {{[0-9]+}}(%esp)
; X86-NEXT:    fchs
; X86-NEXT:    retl
;
; X64-LABEL: test_fp80:
; X64:       # %bb.0:
; X64-NEXT:    fldt {{[0-9]+}}(%rsp)
; X64-NEXT:    fchs
; X64-NEXT:    retq
  %1 = fneg x86_fp80 %a
  ret x86_fp80 %1
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; SSE-X64: {{.*}}