llvm/test/CodeGen/X86/phi-elim-undef-livevars.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=x86_64-unknown-linux -run-pass=livevars,phi-node-elimination \
# RUN:   -verify-machineinstrs -o - %s | FileCheck %s

# Test that PHI Elimination correctly clears LiveVariables AliveBlocks for
# registers defined by IMPLICIT_DEF when used as PHI sources. The source
# register %2 is live-through bb.2 to reach the PHI in bb.3. Without the fix,
# MachineVerifier reports:
#   "LiveVariables: Block should not be in AliveBlocks"

---
name: phi_elim_undef_source
tracksRegLiveness: true
body: |
  ; CHECK-LABEL: name: phi_elim_undef_source
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.4(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
  ; CHECK-NEXT:   TEST32rr killed [[MOV32r0_]], [[MOV32r0_]], implicit-def $eflags
  ; CHECK-NEXT:   JCC_1 %bb.4, 4, implicit killed $eflags
  ; CHECK-NEXT:   JMP_1 %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   JMP_1 %bb.2
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:vr128 = IMPLICIT_DEF
  ; CHECK-NEXT:   JMP_1 %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vr128 = COPY killed [[DEF]]
  ; CHECK-NEXT:   $xmm0 = COPY killed [[COPY]]
  ; CHECK-NEXT:   RET 0, implicit killed $xmm0
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.4:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[V_SET0_:%[0-9]+]]:vr128 = V_SET0
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:vr128 = COPY killed [[V_SET0_]]
  ; CHECK-NEXT:   JMP_1 %bb.3
  bb.0:
    successors: %bb.1, %bb.4

    %0:gr32 = MOV32r0 implicit-def dead $eflags
    TEST32rr %0, %0, implicit-def $eflags
    JCC_1 %bb.4, 4, implicit $eflags
    JMP_1 %bb.1

  bb.1:
    successors: %bb.2

    %1:vr128 = IMPLICIT_DEF
    JMP_1 %bb.2

  bb.2:
    successors: %bb.3

    JMP_1 %bb.3

  bb.3:
    %3:vr128 = PHI %1, %bb.2, %2, %bb.4
    $xmm0 = COPY %3
    RET 0, implicit $xmm0

  bb.4:
    successors: %bb.3

    %2:vr128 = V_SET0
    JMP_1 %bb.3
...