llvm/test/CodeGen/LoongArch/lsx/bswap.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

define void @bswap_v8i16(ptr %src, ptr %dst) nounwind {
; CHECK-LABEL: bswap_v8i16:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vld $vr0, $a0, 0
; CHECK-NEXT:    vshuf4i.b $vr0, $vr0, 177
; CHECK-NEXT:    vst $vr0, $a1, 0
; CHECK-NEXT:    ret
  %v = load <8 x i16>, ptr %src
  %res = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
  store <8 x i16> %res, ptr %dst
  ret void
}

define void @bswap_v4i32(ptr %src, ptr %dst) nounwind {
; CHECK-LABEL: bswap_v4i32:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vld $vr0, $a0, 0
; CHECK-NEXT:    vshuf4i.b $vr0, $vr0, 27
; CHECK-NEXT:    vst $vr0, $a1, 0
; CHECK-NEXT:    ret
  %v = load <4 x i32>, ptr %src
  %res = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
  store <4 x i32> %res, ptr %dst
  ret void
}

define void @bswap_v2i64(ptr %src, ptr %dst) nounwind {
; CHECK-LABEL: bswap_v2i64:
; CHECK:       # %bb.0:
; CHECK-NEXT:    vld $vr0, $a0, 0
; CHECK-NEXT:    vshuf4i.b $vr0, $vr0, 27
; CHECK-NEXT:    vshuf4i.w $vr0, $vr0, 177
; CHECK-NEXT:    vst $vr0, $a1, 0
; CHECK-NEXT:    ret
  %v = load <2 x i64>, ptr %src
  %res = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
  store <2 x i64> %res, ptr %dst
  ret void
}

declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)