| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s |
| |
| define void @dead_masked_store(<vscale x 4 x i32> %val, ptr %a, <vscale x 4 x i1> %mask) { |
| ; CHECK-LABEL: dead_masked_store: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: st1w { z0.s }, p0, [x0] |
| ; CHECK-NEXT: ret |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| ret void |
| } |
| |
| define void @dead_masked_store_alltrue_same(<vscale x 4 x i32> %val, ptr %a, <vscale x 4 x i1> %mask) { |
| ; CHECK-LABEL: dead_masked_store_alltrue_same: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str z0, [x0] |
| ; CHECK-NEXT: ret |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> splat(i1 true)) |
| ret void |
| } |
| |
| define void @dead_masked_store_alltrue_bigger(<vscale x 4 x i16> %val, <vscale x 4 x i32> %val1, ptr %a, <vscale x 4 x i1> %mask) { |
| ; CHECK-LABEL: dead_masked_store_alltrue_bigger: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: str z1, [x0] |
| ; CHECK-NEXT: ret |
| call void @llvm.masked.store.nxv4i16(<vscale x 4 x i16> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val1, ptr %a, i32 4, <vscale x 4 x i1> splat(i1 true)) |
| ret void |
| } |
| |
| define void @dead_masked_store_alltrue_smaller(<vscale x 4 x i32> %val, <vscale x 4 x i16> %val1, ptr %a, <vscale x 4 x i1> %mask) { |
| ; CHECK-LABEL: dead_masked_store_alltrue_smaller: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: ptrue p1.s |
| ; CHECK-NEXT: st1w { z0.s }, p0, [x0] |
| ; CHECK-NEXT: st1h { z1.s }, p1, [x0] |
| ; CHECK-NEXT: ret |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| call void @llvm.masked.store.nxv4i16(<vscale x 4 x i16> %val1, ptr %a, i32 4, <vscale x 4 x i1> splat(i1 true)) |
| ret void |
| } |
| |
| define void @dead_masked_store_same_mask_smaller_type(<vscale x 4 x i32> %val, <vscale x 4 x i16> %val1, ptr %a, <vscale x 4 x i1> %mask) { |
| ; CHECK-LABEL: dead_masked_store_same_mask_smaller_type: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: st1w { z0.s }, p0, [x0] |
| ; CHECK-NEXT: st1h { z1.s }, p0, [x0] |
| ; CHECK-NEXT: ret |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| call void @llvm.masked.store.nxv4i16(<vscale x 4 x i16> %val1, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| ret void |
| } |
| |
| define void @dead_masked_store_same_mask_bigger_type(<vscale x 4 x i16> %val, <vscale x 4 x i32> %val1, ptr %a, <vscale x 4 x i1> %mask) { |
| ; CHECK-LABEL: dead_masked_store_same_mask_bigger_type: |
| ; CHECK: // %bb.0: |
| ; CHECK-NEXT: st1h { z0.s }, p0, [x0] |
| ; CHECK-NEXT: st1w { z1.s }, p0, [x0] |
| ; CHECK-NEXT: ret |
| call void @llvm.masked.store.nxv4i16(<vscale x 4 x i16> %val, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| call void @llvm.masked.store.nxv4i32(<vscale x 4 x i32> %val1, ptr %a, i32 4, <vscale x 4 x i1> %mask) |
| ret void |
| } |
| |
| declare void @llvm.masked.store.nxv4i16(<vscale x 4 x i16>, ptr, i32, <vscale x 4 x i1>) |
| declare void @llvm.masked.store.nxv4i32(<vscale x 4 x i32>, ptr, i32, <vscale x 4 x i1>) |