llvm/test/CodeGen/AArch64/neon-famin-famax.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s | FileCheck %s

target triple = "aarch64-linux"

define <4 x half> @test_famin_f16(<4 x half> %vn, <4 x half> %vm) #0 {
; CHECK-LABEL: test_famin_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famin v0.4h, v0.4h, v1.4h
; CHECK-NEXT:    ret
  %res = call <4 x half> @llvm.aarch64.neon.famin.v4f16(<4 x half> %vn, <4 x half> %vm)
  ret <4 x half> %res
}

define <8 x half> @test_famin2_f16(<8 x half> %vn, <8 x half> %vm) #0 {
; CHECK-LABEL: test_famin2_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famin v0.8h, v0.8h, v1.8h
; CHECK-NEXT:    ret
  %res = call <8 x half> @llvm.aarch64.neon.famin.v8f16(<8 x half> %vn, <8 x half> %vm)
  ret <8 x half> %res
}

define <2 x float> @test_famin_f32(<2 x float> %vn, <2 x float> %vm) #0 {
; CHECK-LABEL: test_famin_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famin v0.2s, v0.2s, v1.2s
; CHECK-NEXT:    ret
  %res = call <2 x float> @llvm.aarch64.neon.famin.v2f32(<2 x float> %vn, <2 x float> %vm)
  ret <2 x float> %res
}

define <4 x float> @test_famin2_f32(<4 x float> %vn, <4 x float> %vm) #0 {
; CHECK-LABEL: test_famin2_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famin v0.4s, v0.4s, v1.4s
; CHECK-NEXT:    ret
  %res = call <4 x float> @llvm.aarch64.neon.famin.v4f32(<4 x float> %vn, <4 x float> %vm)
  ret <4 x float> %res
}

define <2 x double> @test_famin_f64(<2 x double> %vn, <2 x double> %vm) #0 {
; CHECK-LABEL: test_famin_f64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famin v0.2d, v0.2d, v1.2d
; CHECK-NEXT:    ret
  %res = call <2 x double> @llvm.aarch64.neon.famin.v2f64(<2 x double> %vn, <2 x double> %vm)
  ret <2 x double> %res
}

define <4 x half> @test_famax_f16(<4 x half> %vn, <4 x half> %vm) #0 {
; CHECK-LABEL: test_famax_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famax v0.4h, v0.4h, v1.4h
; CHECK-NEXT:    ret
  %res = call <4 x half> @llvm.aarch64.neon.famax.v4f16(<4 x half> %vn, <4 x half> %vm)
  ret <4 x half> %res
}

define <8 x half> @test_famax2_f16(<8 x half> %vn, <8 x half> %vm) #0 {
; CHECK-LABEL: test_famax2_f16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famax v0.8h, v0.8h, v1.8h
; CHECK-NEXT:    ret
  %res = call <8 x half> @llvm.aarch64.neon.famax.v8f16(<8 x half> %vn, <8 x half> %vm)
  ret <8 x half> %res
}

define <2 x float> @test_famax_f32(<2 x float> %vn, <2 x float> %vm) #0 {
; CHECK-LABEL: test_famax_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famax v0.2s, v0.2s, v1.2s
; CHECK-NEXT:    ret
  %res = call <2 x float> @llvm.aarch64.neon.famax.v2f32(<2 x float> %vn, <2 x float> %vm)
  ret <2 x float> %res
}

define <4 x float> @test_famax2_f32(<4 x float> %vn, <4 x float> %vm) #0 {
; CHECK-LABEL: test_famax2_f32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famax v0.4s, v0.4s, v1.4s
; CHECK-NEXT:    ret
  %res = call <4 x float> @llvm.aarch64.neon.famax.v4f32(<4 x float> %vn, <4 x float> %vm)
  ret <4 x float> %res
}

define <2 x double> @test_famax_f64(<2 x double> %vn, <2 x double> %vm) #0 {
; CHECK-LABEL: test_famax_f64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    famax v0.2d, v0.2d, v1.2d
; CHECK-NEXT:    ret
  %res = call <2 x double> @llvm.aarch64.neon.famax.v2f64(<2 x double> %vn, <2 x double> %vm)
  ret <2 x double> %res
}

attributes #0 = { "target-features"="+neon,+faminmax" }