| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -o - -mtriple=aarch64-unknown-unknown -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s | FileCheck %s |
| # Check that we don't miscompile this into G_UDIVREM because of the different |
| # first operands. |
| --- |
| name: no_combine_divrem_different_src1 |
| body: | |
| bb.1: |
| liveins: $w0 |
| |
| ; CHECK-LABEL: name: no_combine_divrem_different_src1 |
| ; CHECK: liveins: $w0 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0 |
| ; CHECK-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY]], [[COPY]] |
| ; CHECK-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[UREM]], [[COPY]] |
| ; CHECK-NEXT: $w0 = COPY [[UDIV]](s32) |
| ; CHECK-NEXT: RET_ReallyLR implicit $w0 |
| %0:_(s32) = COPY $w0 |
| %1:_(s32) = G_UREM %0, %0 |
| %2:_(s32) = G_UDIV %1, %0 |
| $w0 = COPY %2(s32) |
| RET_ReallyLR implicit $w0 |
| |
| ... |
