| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 |
| ; RUN: opt -S -loop-reduce < %s | FileCheck %s |
| |
| ; Address Space 10 is non-integral. The optimizer is not allowed to use |
| ; ptrtoint/inttoptr instructions. Make sure that this doesn't happen |
| target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12" |
| target triple = "x86_64-unknown-linux-gnu" |
| |
| ; How exactly SCEV chooses to materialize isn't all that important, as |
| ; long as it doesn't try to round-trip through integers. As of this writing, |
| ; it emits a byte-wise gep, which is fine. |
| define void @japi1__unsafe_getindex_65028(ptr addrspace(10) %arg) { |
| ; CHECK-LABEL: define void @japi1__unsafe_getindex_65028 |
| ; CHECK-SAME: (ptr addrspace(10) [[ARG:%.*]]) { |
| ; CHECK-NEXT: top: |
| ; CHECK-NEXT: br label [[L86:%.*]] |
| ; CHECK: L86: |
| ; CHECK-NEXT: [[LSR_IV4:%.*]] = phi i64 [ [[LSR_IV_NEXT5:%.*]], [[L86]] ], [ -2, [[TOP:%.*]] ] |
| ; CHECK-NEXT: [[LSR_IV_NEXT5]] = add nsw i64 [[LSR_IV4]], 2 |
| ; CHECK-NEXT: br i1 false, label [[L86]], label [[IF29:%.*]] |
| ; CHECK: if29: |
| ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(10) [[ARG]], i64 -8 |
| ; CHECK-NEXT: br label [[IF31:%.*]] |
| ; CHECK: if31: |
| ; CHECK-NEXT: %"#temp#1.sroa.0.022" = phi i64 [ 0, [[IF29]] ], [ [[TMP3_LCSSA:%.*]], [[IF38:%.*]] ] |
| ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LSR_IV_NEXT5]], %"#temp#1.sroa.0.022" |
| ; CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 |
| ; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr addrspace(10) [[SCEVGEP]], i64 [[TMP1]] |
| ; CHECK-NEXT: br label [[L119:%.*]] |
| ; CHECK: L119: |
| ; CHECK-NEXT: [[LSR_IV2:%.*]] = phi ptr addrspace(10) [ [[SCEVGEP3:%.*]], [[L119]] ], [ [[SCEVGEP1]], [[IF31]] ] |
| ; CHECK-NEXT: [[I5_0:%.*]] = phi i64 [ %"#temp#1.sroa.0.022", [[IF31]] ], [ [[TMP3:%.*]], [[L119]] ] |
| ; CHECK-NEXT: [[TMP3]] = add i64 [[I5_0]], 1 |
| ; CHECK-NEXT: [[SCEVGEP3]] = getelementptr i8, ptr addrspace(10) [[LSR_IV2]], i64 8 |
| ; CHECK-NEXT: br i1 false, label [[L119]], label [[IF38]] |
| ; CHECK: if38: |
| ; CHECK-NEXT: [[TMP3_LCSSA]] = phi i64 [ [[TMP3]], [[L119]] ] |
| ; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr addrspace(10) [[SCEVGEP3]], align 8 |
| ; CHECK-NEXT: br i1 true, label [[DONE:%.*]], label [[IF31]] |
| ; CHECK: done: |
| ; CHECK-NEXT: ret void |
| ; |
| top: |
| br label %L86 |
| |
| L86: ; preds = %L86, %top |
| %i.0 = phi i64 [ 0, %top ], [ %tmp, %L86 ] |
| %tmp = add i64 %i.0, 1 |
| br i1 false, label %L86, label %if29 |
| |
| if29: ; preds = %L86 |
| %tmp1 = shl i64 %tmp, 1 |
| %tmp2 = add i64 %tmp1, -2 |
| br label %if31 |
| |
| if31: ; preds = %if38, %if29 |
| %"#temp#1.sroa.0.022" = phi i64 [ 0, %if29 ], [ %tmp3, %if38 ] |
| br label %L119 |
| |
| L119: ; preds = %L119, %if31 |
| %i5.0 = phi i64 [ %"#temp#1.sroa.0.022", %if31 ], [ %tmp3, %L119 ] |
| %tmp3 = add i64 %i5.0, 1 |
| br i1 false, label %L119, label %if38 |
| |
| if38: ; preds = %L119 |
| %tmp4 = add i64 %tmp2, %i5.0 |
| %tmp5 = getelementptr i64, ptr addrspace(10) %arg, i64 %tmp4 |
| %tmp6 = load i64, ptr addrspace(10) %tmp5 |
| br i1 true, label %done, label %if31 |
| |
| done: ; preds = %if38 |
| ret void |
| } |
