llvm/test/CodeGen/SystemZ/vec-args-04.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; Test the handling of named short vector arguments.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-VEC
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s -check-prefix=CHECK-STACK

; This routine has 12 vector arguments, which fill up %v24-%v31
; and the four single-wide stack slots starting at 160.
declare void @bar(<1 x i8>, <2 x i8>, <4 x i8>, <8 x i8>,
                  <1 x i8>, <2 x i8>, <4 x i8>, <8 x i8>,
                  <1 x i8>, <2 x i8>, <4 x i8>, <8 x i8>)

define void @foo() {
; CHECK-VEC-LABEL: foo:
; CHECK-VEC:       # %bb.0:
; CHECK-VEC-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-VEC-NEXT:    .cfi_offset %r14, -48
; CHECK-VEC-NEXT:    .cfi_offset %r15, -40
; CHECK-VEC-NEXT:    aghi %r15, -192
; CHECK-VEC-NEXT:    .cfi_def_cfa_offset 352
; CHECK-VEC-NEXT:    larl %r1, .LCPI0_0
; CHECK-VEC-NEXT:    vl %v0, 0(%r1), 3
; CHECK-VEC-NEXT:    larl %r1, .LCPI0_1
; CHECK-VEC-NEXT:    vst %v0, 176(%r15), 3
; CHECK-VEC-NEXT:    vl %v0, 0(%r1), 3
; CHECK-VEC-NEXT:    vrepib %v24, 1
; CHECK-VEC-NEXT:    vrepib %v26, 2
; CHECK-VEC-NEXT:    vrepib %v28, 3
; CHECK-VEC-NEXT:    vrepib %v30, 4
; CHECK-VEC-NEXT:    vrepib %v25, 5
; CHECK-VEC-NEXT:    vrepib %v27, 6
; CHECK-VEC-NEXT:    vrepib %v29, 7
; CHECK-VEC-NEXT:    vrepib %v31, 8
; CHECK-VEC-NEXT:    vst %v0, 160(%r15), 3
; CHECK-VEC-NEXT:    brasl %r14, bar@PLT
; CHECK-VEC-NEXT:    lmg %r14, %r15, 304(%r15)
; CHECK-VEC-NEXT:    br %r14
;
; CHECK-STACK-LABEL: foo:
; CHECK-STACK:       # %bb.0:
; CHECK-STACK-NEXT:    stmg %r14, %r15, 112(%r15)
; CHECK-STACK-NEXT:    .cfi_offset %r14, -48
; CHECK-STACK-NEXT:    .cfi_offset %r15, -40
; CHECK-STACK-NEXT:    aghi %r15, -192
; CHECK-STACK-NEXT:    .cfi_def_cfa_offset 352
; CHECK-STACK-NEXT:    larl %r1, .LCPI0_0
; CHECK-STACK-NEXT:    vl %v0, 0(%r1), 3
; CHECK-STACK-NEXT:    larl %r1, .LCPI0_1
; CHECK-STACK-NEXT:    vst %v0, 176(%r15), 3
; CHECK-STACK-NEXT:    vl %v0, 0(%r1), 3
; CHECK-STACK-NEXT:    vrepib %v24, 1
; CHECK-STACK-NEXT:    vrepib %v26, 2
; CHECK-STACK-NEXT:    vrepib %v28, 3
; CHECK-STACK-NEXT:    vrepib %v30, 4
; CHECK-STACK-NEXT:    vrepib %v25, 5
; CHECK-STACK-NEXT:    vrepib %v27, 6
; CHECK-STACK-NEXT:    vrepib %v29, 7
; CHECK-STACK-NEXT:    vrepib %v31, 8
; CHECK-STACK-NEXT:    vst %v0, 160(%r15), 3
; CHECK-STACK-NEXT:    brasl %r14, bar@PLT
; CHECK-STACK-NEXT:    lmg %r14, %r15, 304(%r15)
; CHECK-STACK-NEXT:    br %r14






  call void @bar (<1 x i8> <i8 1>,
                  <2 x i8> <i8 2, i8 2>,
                  <4 x i8> <i8 3, i8 3, i8 3, i8 3>,
                  <8 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>,
                  <1 x i8> <i8 5>,
                  <2 x i8> <i8 6, i8 6>,
                  <4 x i8> <i8 7, i8 7, i8 7, i8 7>,
                  <8 x i8> <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>,
                  <1 x i8> <i8 9>,
                  <2 x i8> <i8 10, i8 10>,
                  <4 x i8> <i8 11, i8 11, i8 11, i8 11>,
                  <8 x i8> <i8 12, i8 12, i8 12, i8 12, i8 12, i8 12, i8 12, i8 12>)
  ret void
}