llvm/test/CodeGen/PowerPC/bitinsert-bitextract-fp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s

define half @test_bitextract_half_full(b16 %src) {
; CHECK-LABEL: test_bitextract_half_full:
; CHECK:       # %bb.0:
; CHECK-NEXT:    blr
  %result = bitextract half, b16 %src, i32 0
  ret half %result
}

define float @test_bitextract_float_full(b32 %src) {
; CHECK-LABEL: test_bitextract_float_full:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mtfprd 0, 3
; CHECK-NEXT:    xxsldwi 0, 0, 0, 1
; CHECK-NEXT:    xscvspdpn 1, 0
; CHECK-NEXT:    blr
  %result = bitextract float, b32 %src, i32 0
  ret float %result
}

define float @test_bitextract_float_const(b64 %src) {
; CHECK-LABEL: test_bitextract_float_const:
; CHECK:       # %bb.0:
; CHECK-NEXT:    rldicl 3, 3, 32, 32
; CHECK-NEXT:    mtfprd 0, 3
; CHECK-NEXT:    xxsldwi 0, 0, 0, 1
; CHECK-NEXT:    xscvspdpn 1, 0
; CHECK-NEXT:    blr
  %result = bitextract float, b64 %src, i32 32
  ret float %result
}

define float @test_bitextract_float_var(b64 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_float_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    srd 3, 3, 4
; CHECK-NEXT:    mtfprd 0, 3
; CHECK-NEXT:    xxsldwi 0, 0, 0, 1
; CHECK-NEXT:    xscvspdpn 1, 0
; CHECK-NEXT:    blr
  %result = bitextract float, b64 %src, i32 %off
  ret float %result
}

define float @test_bitextract_float_b87_var(b87 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_float_b87_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    clrldi 3, 3, 41
; CHECK-NEXT:    subfic 6, 5, 64
; CHECK-NEXT:    srd 4, 4, 5
; CHECK-NEXT:    addi 5, 5, -64
; CHECK-NEXT:    sld 6, 3, 6
; CHECK-NEXT:    srd 3, 3, 5
; CHECK-NEXT:    or 4, 4, 6
; CHECK-NEXT:    or 3, 4, 3
; CHECK-NEXT:    mtfprd 0, 3
; CHECK-NEXT:    xxsldwi 0, 0, 0, 1
; CHECK-NEXT:    xscvspdpn 1, 0
; CHECK-NEXT:    blr
  %result = bitextract float, b87 %src, i32 %off
  ret float %result
}

define float @test_bitextract_float_b87_crossword(b87 %src) {
; CHECK-LABEL: test_bitextract_float_b87_crossword:
; CHECK:       # %bb.0:
; CHECK-NEXT:    rotldi 4, 4, 9
; CHECK-NEXT:    rldimi 4, 3, 9, 0
; CHECK-NEXT:    mtfprd 0, 4
; CHECK-NEXT:    xxsldwi 0, 0, 0, 1
; CHECK-NEXT:    xscvspdpn 1, 0
; CHECK-NEXT:    blr
  %result = bitextract float, b87 %src, i32 55
  ret float %result
}

define double @test_bitextract_double_full(b64 %src) {
; CHECK-LABEL: test_bitextract_double_full:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mtfprd 1, 3
; CHECK-NEXT:    blr
  %result = bitextract double, b64 %src, i32 0
  ret double %result
}

define double @test_bitextract_double_const(b128 %src) {
; CHECK-LABEL: test_bitextract_double_const:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mtfprd 1, 3
; CHECK-NEXT:    blr
  %result = bitextract double, b128 %src, i32 64
  ret double %result
}

define double @test_bitextract_double_var(b128 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_double_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    subfic 6, 5, 64
; CHECK-NEXT:    srd 4, 4, 5
; CHECK-NEXT:    addi 5, 5, -64
; CHECK-NEXT:    sld 6, 3, 6
; CHECK-NEXT:    srd 3, 3, 5
; CHECK-NEXT:    or 4, 4, 6
; CHECK-NEXT:    or 3, 4, 3
; CHECK-NEXT:    mtfprd 1, 3
; CHECK-NEXT:    blr
  %result = bitextract double, b128 %src, i32 %off
  ret double %result
}

define double @test_bitextract_double_b231_var(b231 %src, i32 %off) {
; CHECK-LABEL: test_bitextract_double_b231_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    clrldi 3, 3, 25
; CHECK-NEXT:    std 4, -24(1)
; CHECK-NEXT:    addi 4, 1, -32
; CHECK-NEXT:    xxlxor 0, 0, 0
; CHECK-NEXT:    li 8, 16
; CHECK-NEXT:    addi 9, 1, -64
; CHECK-NEXT:    std 6, -8(1)
; CHECK-NEXT:    std 5, -16(1)
; CHECK-NEXT:    std 3, -32(1)
; CHECK-NEXT:    rlwinm 3, 7, 29, 27, 28
; CHECK-NEXT:    stxvw4x 0, 9, 8
; CHECK-NEXT:    stxvw4x 0, 0, 9
; CHECK-NEXT:    clrlwi 5, 7, 26
; CHECK-NEXT:    neg 3, 3
; CHECK-NEXT:    extsw 3, 3
; CHECK-NEXT:    add 3, 4, 3
; CHECK-NEXT:    ld 4, 24(3)
; CHECK-NEXT:    ld 3, 16(3)
; CHECK-NEXT:    srd 4, 4, 5
; CHECK-NEXT:    subfic 5, 5, 64
; CHECK-NEXT:    sld 3, 3, 5
; CHECK-NEXT:    or 3, 3, 4
; CHECK-NEXT:    mtfprd 1, 3
; CHECK-NEXT:    blr
  %result = bitextract double, b231 %src, i32 %off
  ret double %result
}


define b16 @test_bitinsert_half_full(b16 %base, half %val) {
; CHECK-LABEL: test_bitinsert_half_full:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mr 3, 4
; CHECK-NEXT:    blr
  %result = bitinsert b16 %base, half %val, i32 0
  ret b16 %result
}

define b32 @test_bitinsert_half_var(b32 %base, half %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_half_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    lis 6, 0
; CHECK-NEXT:    clrlwi 4, 4, 16
; CHECK-NEXT:    ori 6, 6, 65535
; CHECK-NEXT:    slw 4, 4, 5
; CHECK-NEXT:    slw 5, 6, 5
; CHECK-NEXT:    andc 3, 3, 5
; CHECK-NEXT:    or 3, 3, 4
; CHECK-NEXT:    blr
  %result = bitinsert b32 %base, half %val, i32 %off
  ret b32 %result
}

define b32 @test_bitinsert_float_full(b32 %base, float %val) {
; CHECK-LABEL: test_bitinsert_float_full:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xscvdpspn 0, 1
; CHECK-NEXT:    mffprwz 3, 0
; CHECK-NEXT:    blr
  %result = bitinsert b32 %base, float %val, i32 0
  ret b32 %result
}

define b64 @test_bitinsert_float_const(b64 %base, float %val) {
; CHECK-LABEL: test_bitinsert_float_const:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xscvdpspn 0, 1
; CHECK-NEXT:    mffprwz 4, 0
; CHECK-NEXT:    rldimi 3, 4, 32, 0
; CHECK-NEXT:    blr
  %result = bitinsert b64 %base, float %val, i32 32
  ret b64 %result
}

define b64 @test_bitinsert_float_var(b64 %base, float %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_float_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xscvdpspn 0, 1
; CHECK-NEXT:    li 6, -1
; CHECK-NEXT:    rldic 6, 6, 0, 32
; CHECK-NEXT:    sld 6, 6, 5
; CHECK-NEXT:    mffprwz 4, 0
; CHECK-NEXT:    andc 3, 3, 6
; CHECK-NEXT:    sld 4, 4, 5
; CHECK-NEXT:    or 3, 3, 4
; CHECK-NEXT:    blr
  %result = bitinsert b64 %base, float %val, i32 %off
  ret b64 %result
}

define b87 @test_bitinsert_float_b87_var(b87 %base, float %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_float_b87_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xscvdpspn 0, 1
; CHECK-NEXT:    addi 7, 6, -64
; CHECK-NEXT:    subfic 9, 6, 64
; CHECK-NEXT:    mffprwz 5, 0
; CHECK-NEXT:    sld 8, 5, 7
; CHECK-NEXT:    srd 10, 5, 9
; CHECK-NEXT:    sld 5, 5, 6
; CHECK-NEXT:    or 8, 10, 8
; CHECK-NEXT:    li 10, -1
; CHECK-NEXT:    rldic 10, 10, 0, 32
; CHECK-NEXT:    sld 7, 10, 7
; CHECK-NEXT:    srd 9, 10, 9
; CHECK-NEXT:    or 7, 9, 7
; CHECK-NEXT:    xori 7, 7, 65535
; CHECK-NEXT:    xoris 7, 7, 127
; CHECK-NEXT:    and 3, 3, 7
; CHECK-NEXT:    sld 7, 10, 6
; CHECK-NEXT:    andc 4, 4, 7
; CHECK-NEXT:    or 3, 3, 8
; CHECK-NEXT:    or 4, 4, 5
; CHECK-NEXT:    blr
  %result = bitinsert b87 %base, float %val, i32 %off
  ret b87 %result
}


define b64 @test_bitinsert_double_full(b64 %base, double %val) {
; CHECK-LABEL: test_bitinsert_double_full:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mffprd 3, 1
; CHECK-NEXT:    blr
  %result = bitinsert b64 %base, double %val, i32 0
  ret b64 %result
}

define b128 @test_bitinsert_double_const(b128 %base, double %val) {
; CHECK-LABEL: test_bitinsert_double_const:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mffprd 3, 1
; CHECK-NEXT:    blr
  %result = bitinsert b128 %base, double %val, i32 64
  ret b128 %result
}

define b128 @test_bitinsert_double_var(b128 %base, double %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_double_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    mffprd 5, 1
; CHECK-NEXT:    addi 7, 6, -64
; CHECK-NEXT:    subfic 9, 6, 64
; CHECK-NEXT:    sld 8, 5, 7
; CHECK-NEXT:    srd 10, 5, 9
; CHECK-NEXT:    sld 5, 5, 6
; CHECK-NEXT:    or 8, 10, 8
; CHECK-NEXT:    li 10, -1
; CHECK-NEXT:    sld 7, 10, 7
; CHECK-NEXT:    srd 9, 10, 9
; CHECK-NEXT:    sld 6, 10, 6
; CHECK-NEXT:    or 7, 9, 7
; CHECK-NEXT:    andc 4, 4, 6
; CHECK-NEXT:    andc 3, 3, 7
; CHECK-NEXT:    or 4, 4, 5
; CHECK-NEXT:    or 3, 3, 8
; CHECK-NEXT:    blr
  %result = bitinsert b128 %base, double %val, i32 %off
  ret b128 %result
}

define b231 @test_bitinsert_double_b231_var(b231 %base, double %val, i32 %off) {
; CHECK-LABEL: test_bitinsert_double_b231_var:
; CHECK:       # %bb.0:
; CHECK-NEXT:    std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT:    xxlxor 0, 0, 0
; CHECK-NEXT:    li 9, 48
; CHECK-NEXT:    addi 10, 1, -192
; CHECK-NEXT:    li 11, 32
; CHECK-NEXT:    addi 12, 1, -128
; CHECK-NEXT:    li 0, 0
; CHECK-NEXT:    li 29, -1
; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT:    rlwinm 30, 8, 29, 27, 28
; CHECK-NEXT:    std 25, -56(1) # 8-byte Folded Spill
; CHECK-NEXT:    std 26, -48(1) # 8-byte Folded Spill
; CHECK-NEXT:    std 27, -40(1) # 8-byte Folded Spill
; CHECK-NEXT:    std 28, -32(1) # 8-byte Folded Spill
; CHECK-NEXT:    stxvw4x 0, 10, 9
; CHECK-NEXT:    stxvw4x 0, 10, 11
; CHECK-NEXT:    stxvw4x 0, 12, 9
; CHECK-NEXT:    stxvw4x 0, 12, 11
; CHECK-NEXT:    clrlwi 7, 8, 26
; CHECK-NEXT:    mr 8, 30
; CHECK-NEXT:    stxvw4x 0, 0, 10
; CHECK-NEXT:    stxvw4x 0, 0, 12
; CHECK-NEXT:    subfic 28, 7, 64
; CHECK-NEXT:    stfd 1, -168(1)
; CHECK-NEXT:    std 0, -176(1)
; CHECK-NEXT:    std 29, -104(1)
; CHECK-NEXT:    std 0, -112(1)
; CHECK-NEXT:    ldux 9, 30, 12
; CHECK-NEXT:    ld 11, 8(30)
; CHECK-NEXT:    ld 12, 16(30)
; CHECK-NEXT:    ldux 10, 8, 10
; CHECK-NEXT:    srd 27, 12, 28
; CHECK-NEXT:    sld 26, 11, 7
; CHECK-NEXT:    ld 0, 16(8)
; CHECK-NEXT:    ld 29, 8(8)
; CHECK-NEXT:    ld 8, 24(8)
; CHECK-NEXT:    or 27, 26, 27
; CHECK-NEXT:    ld 30, 24(30)
; CHECK-NEXT:    srd 25, 0, 28
; CHECK-NEXT:    sld 0, 0, 7
; CHECK-NEXT:    sld 9, 9, 7
; CHECK-NEXT:    srd 11, 11, 28
; CHECK-NEXT:    sld 12, 12, 7
; CHECK-NEXT:    or 9, 9, 11
; CHECK-NEXT:    andc 4, 4, 27
; CHECK-NEXT:    srd 27, 8, 28
; CHECK-NEXT:    li 11, -1
; CHECK-NEXT:    rldic 11, 11, 0, 25
; CHECK-NEXT:    sld 26, 29, 7
; CHECK-NEXT:    sld 10, 10, 7
; CHECK-NEXT:    sld 8, 8, 7
; CHECK-NEXT:    sld 7, 30, 7
; CHECK-NEXT:    or 0, 0, 27
; CHECK-NEXT:    srd 27, 30, 28
; CHECK-NEXT:    xor 9, 9, 11
; CHECK-NEXT:    or 26, 26, 25
; CHECK-NEXT:    andc 6, 6, 7
; CHECK-NEXT:    or 4, 4, 26
; CHECK-NEXT:    ld 30, -16(1) # 8-byte Folded Reload
; CHECK-NEXT:    ld 26, -48(1) # 8-byte Folded Reload
; CHECK-NEXT:    or 12, 12, 27
; CHECK-NEXT:    and 3, 3, 9
; CHECK-NEXT:    or 6, 6, 8
; CHECK-NEXT:    ld 27, -40(1) # 8-byte Folded Reload
; CHECK-NEXT:    ld 25, -56(1) # 8-byte Folded Reload
; CHECK-NEXT:    andc 5, 5, 12
; CHECK-NEXT:    srd 12, 29, 28
; CHECK-NEXT:    ld 29, -24(1) # 8-byte Folded Reload
; CHECK-NEXT:    ld 28, -32(1) # 8-byte Folded Reload
; CHECK-NEXT:    or 10, 10, 12
; CHECK-NEXT:    or 5, 5, 0
; CHECK-NEXT:    or 3, 3, 10
; CHECK-NEXT:    blr
  %result = bitinsert b231 %base, double %val, i32 %off
  ret b231 %result
}