llvm/test/CodeGen/AMDGPU/write_register.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -global-isel=0 -mtriple=amdgpu12.50 < %s | FileCheck -check-prefixes=CHECK,SDAG %s
; RUN: llc -global-isel=1 -mtriple=amdgpu12.50 < %s | FileCheck -check-prefixes=CHECK,GISEL %s

define void @write_imm_into_m0() {
; CHECK-LABEL: write_imm_into_m0:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 m0, 0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use m0
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 m0, -1
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use m0
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !0, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !0)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !0, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !0)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_exec_lo() {
; CHECK-LABEL: write_imm_into_exec_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 exec_lo, 0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 exec_lo, -1
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !5, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !5)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !5, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !5)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_exec_hi() {
; CHECK-LABEL: write_imm_into_exec_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 exec_hi, 0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 exec_hi, -1
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !6, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !6)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !6, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !6)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_flat_scratch_lo() {
; CHECK-LABEL: write_imm_into_flat_scratch_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 flat_scratch_lo, 0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 flat_scratch_lo, -1
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !3, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !3)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !3, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !3)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_flat_scratch_hi() {
; CHECK-LABEL: write_imm_into_flat_scratch_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 flat_scratch_hi, 0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 flat_scratch_hi, -1
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !4, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !4)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !4, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !4)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_exec() {
; CHECK-LABEL: write_imm_into_exec:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b64 exec, 0
; CHECK-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
; CHECK-NEXT:    s_mov_b64 s[0:1], exec
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b64 exec, -1
; CHECK-NEXT:    s_mov_b64 s[0:1], exec
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !1, i64 0)
  %read0 = call i64 @llvm.read_register.i64(metadata !1)
  call void asm sideeffect "; use $0", "s"(i64 %read0)
  call void @llvm.write_register.i64(metadata !1, i64 -1)
  %read1 = call i64 @llvm.read_register.i64(metadata !1)
  call void asm sideeffect "; use $0", "s"(i64 %read1)
  ret void
}

define void @write_imm_into_flat_scratch() {
; CHECK-LABEL: write_imm_into_flat_scratch:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b64 flat_scratch, 0
; CHECK-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; CHECK-NEXT:    s_mov_b64 s[0:1], flat_scratch
; CHECK-NEXT:    s_mov_b64 flat_scratch, -1
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b64 s[0:1], flat_scratch
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !2, i64 0)
  %read0 = call i64 @llvm.read_register.i64(metadata !2)
  call void asm sideeffect "; use $0", "s"(i64 %read0)
  call void @llvm.write_register.i64(metadata !2, i64 -1)
  %read1 = call i64 @llvm.read_register.i64(metadata !2)
  call void asm sideeffect "; use $0", "s"(i64 %read1)
  ret void
}

define void @write_imm_into_src_flat_scratch_base_lo() {
; CHECK-LABEL: write_imm_into_src_flat_scratch_base_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 src_flat_scratch_base_lo, 0
; CHECK-NEXT:    s_mov_b32 src_flat_scratch_base_lo, -1
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !8, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !8)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !8, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !8)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_src_flat_scratch_base_hi() {
; CHECK-LABEL: write_imm_into_src_flat_scratch_base_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 src_flat_scratch_base_hi, 0
; CHECK-NEXT:    s_mov_b32 src_flat_scratch_base_hi, -1
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !9, i32 0)
  %read0 = call i32 @llvm.read_register.i32(metadata !9)
  call void asm sideeffect "; use $0", "s"(i32 %read0)
  call void @llvm.write_register.i32(metadata !9, i32 -1)
  %read1 = call i32 @llvm.read_register.i32(metadata !9)
  call void asm sideeffect "; use $0", "s"(i32 %read1)
  ret void
}

define void @write_imm_into_src_flat_scratch_base() {
; CHECK-LABEL: write_imm_into_src_flat_scratch_base:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b64 s[0:1], src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b64 src_flat_scratch_base_lo, 0
; CHECK-NEXT:    s_mov_b64 src_flat_scratch_base_lo, -1
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !7, i64 0)
  %read0 = call i64 @llvm.read_register.i64(metadata !7)
  call void asm sideeffect "; use $0", "s"(i64 %read0)
  call void @llvm.write_register.i64(metadata !7, i64 -1)
  %read1 = call i64 @llvm.read_register.i64(metadata !7)
  call void asm sideeffect "; use $0", "s"(i64 %read1)
  ret void
}

define void @write_imm_into_m0_and_store(ptr addrspace(1) %out) {
; CHECK-LABEL: write_imm_into_m0_and_store:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v2, 0x4d2
; CHECK-NEXT:    s_movk_i32 m0, 0x4d2
; CHECK-NEXT:    global_store_b32 v[0:1], v2, off
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use m0
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !0, i32 1234)
  store i32 1234, ptr addrspace(1) %out
  %read = call i32 @llvm.read_register.i32(metadata !0)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_imm_into_exec_and_store(ptr addrspace(1) %out) {
; SDAG-LABEL: write_imm_into_exec_and_store:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_mov_b64_e32 v[2:3], 0x1cbe991a14
; SDAG-NEXT:    s_mov_b64 exec, 0x1cbe991a14
; SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; SDAG-NEXT:    s_mov_b64 s[0:1], exec
; SDAG-NEXT:    global_store_b64 v[0:1], v[2:3], off
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[0:1]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_imm_into_exec_and_store:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    s_mov_b64 exec, 0x1cbe991a14
; GISEL-NEXT:    v_mov_b64_e32 v[2:3], 0x1cbe991a14
; GISEL-NEXT:    s_mov_b64 s[0:1], exec
; GISEL-NEXT:    global_store_b64 v[0:1], v[2:3], off
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[0:1]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !1, i64 123456789012)
  store i64 123456789012, ptr addrspace(1) %out
  %read = call i64 @llvm.read_register.i64(metadata !1)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

; write_register doesn't prevent us from trying to write a vgpr value
; into a scalar register. Insert a readfirstlane.

define void @write_sgpr_into_m0(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_m0:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 m0, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use m0
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !0, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !0)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_m0(i32 %x) {
; CHECK-LABEL: write_vgpr_into_m0:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 s0, v0
; CHECK-NEXT:    s_mov_b32 m0, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use m0
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !0, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !0)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_m0(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_m0:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 s0, v0
; CHECK-NEXT:    s_mov_b32 m0, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use m0
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !0, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !0)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_exec_lo(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_exec_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 exec_lo, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !5, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !5)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_exec_lo(i32 %x) {
; CHECK-LABEL: write_vgpr_into_exec_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 exec_lo, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !5, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !5)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_exec_lo(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_exec_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 exec_lo, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !5, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !5)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_exec_hi(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_exec_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 exec_hi, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !6, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !6)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_exec_hi(i32 %x) {
; CHECK-LABEL: write_vgpr_into_exec_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 exec_hi, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !6, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !6)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_exec_hi(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_exec_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 exec_hi, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use exec_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !6, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !6)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_flat_scratch_lo(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_flat_scratch_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 flat_scratch_lo, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !3, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !3)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_flat_scratch_lo(i32 %x) {
; CHECK-LABEL: write_vgpr_into_flat_scratch_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 flat_scratch_lo, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !3, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !3)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_flat_scratch_lo(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_flat_scratch_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 flat_scratch_lo, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !3, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !3)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_flat_scratch_hi(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_flat_scratch_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b32 flat_scratch_hi, s0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !4, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !4)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_flat_scratch_hi(i32 %x) {
; CHECK-LABEL: write_vgpr_into_flat_scratch_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 flat_scratch_hi, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !4, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !4)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_flat_scratch_hi(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_flat_scratch_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 flat_scratch_hi, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use flat_scratch_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !4, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !4)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_exec(i64 inreg %x) {
; CHECK-LABEL: write_sgpr_into_exec:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b64 exec, s[0:1]
; CHECK-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; CHECK-NEXT:    s_mov_b64 s[0:1], exec
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !1, i64 %x)
  %read = call i64 @llvm.read_register.i64(metadata !1)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_vgpr_into_exec(i64 %x) {
;
; SDAG-LABEL: write_vgpr_into_exec:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SDAG-NEXT:    s_mov_b64 exec, s[0:1]
; SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; SDAG-NEXT:    s_mov_b64 s[0:1], exec
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[0:1]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_vgpr_into_exec:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GISEL-NEXT:    v_readfirstlane_b32 s1, v1
; GISEL-NEXT:    s_mov_b64 exec, s[0:1]
; GISEL-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-NEXT:    s_mov_b64 s[0:1], exec
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[0:1]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !1, i64 %x)
  %read = call i64 @llvm.read_register.i64(metadata !1)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_uniform_vgpr_into_exec(ptr addrspace(3) inreg %ptr) {
;
; SDAG-LABEL: write_uniform_vgpr_into_exec:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_mov_b32_e32 v0, s0
; SDAG-NEXT:    ds_load_b64 v[0:1], v0
; SDAG-NEXT:    s_wait_dscnt 0x0
; SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SDAG-NEXT:    s_mov_b64 exec, s[0:1]
; SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; SDAG-NEXT:    s_mov_b64 s[0:1], exec
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[0:1]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_uniform_vgpr_into_exec:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    v_mov_b32_e32 v0, s0
; GISEL-NEXT:    ds_load_b64 v[0:1], v0
; GISEL-NEXT:    s_wait_dscnt 0x0
; GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GISEL-NEXT:    v_readfirstlane_b32 s1, v1
; GISEL-NEXT:    s_mov_b64 exec, s[0:1]
; GISEL-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-NEXT:    s_mov_b64 s[0:1], exec
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[0:1]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i64, ptr addrspace(3) %ptr
  call void @llvm.write_register.i64(metadata !1, i64 %load)
  %read = call i64 @llvm.read_register.i64(metadata !1)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_sgpr_into_flat_scratch(i64 inreg %x) {
; CHECK-LABEL: write_sgpr_into_flat_scratch:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b64 flat_scratch, s[0:1]
; CHECK-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; CHECK-NEXT:    s_mov_b64 s[0:1], flat_scratch
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !2, i64 %x)
  %read = call i64 @llvm.read_register.i64(metadata !2)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_vgpr_into_flat_scratch(i64 %x) {
;
; SDAG-LABEL: write_vgpr_into_flat_scratch:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SDAG-NEXT:    s_mov_b64 flat_scratch, s[0:1]
; SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; SDAG-NEXT:    s_mov_b64 s[0:1], flat_scratch
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[0:1]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_vgpr_into_flat_scratch:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GISEL-NEXT:    v_readfirstlane_b32 s1, v1
; GISEL-NEXT:    s_mov_b64 flat_scratch, s[0:1]
; GISEL-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-NEXT:    s_mov_b64 s[0:1], flat_scratch
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[0:1]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !2, i64 %x)
  %read = call i64 @llvm.read_register.i64(metadata !2)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_uniform_vgpr_into_flat_scratch(ptr addrspace(3) inreg %ptr) {
;
; SDAG-LABEL: write_uniform_vgpr_into_flat_scratch:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_mov_b32_e32 v0, s0
; SDAG-NEXT:    ds_load_b64 v[0:1], v0
; SDAG-NEXT:    s_wait_dscnt 0x0
; SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SDAG-NEXT:    s_mov_b64 flat_scratch, s[0:1]
; SDAG-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; SDAG-NEXT:    s_mov_b64 s[0:1], flat_scratch
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[0:1]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_uniform_vgpr_into_flat_scratch:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    v_mov_b32_e32 v0, s0
; GISEL-NEXT:    ds_load_b64 v[0:1], v0
; GISEL-NEXT:    s_wait_dscnt 0x0
; GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GISEL-NEXT:    v_readfirstlane_b32 s1, v1
; GISEL-NEXT:    s_mov_b64 flat_scratch, s[0:1]
; GISEL-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-NEXT:    s_mov_b64 s[0:1], flat_scratch
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[0:1]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i64, ptr addrspace(3) %ptr
  call void @llvm.write_register.i64(metadata !2, i64 %load)
  %read = call i64 @llvm.read_register.i64(metadata !2)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_sgpr_into_src_flat_scratch_base_lo(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_src_flat_scratch_base_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 src_flat_scratch_base_lo, s0
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !8, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !8)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_src_flat_scratch_base_lo(i32 %x) {
; CHECK-LABEL: write_vgpr_into_src_flat_scratch_base_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 src_flat_scratch_base_lo, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !8, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !8)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_src_flat_scratch_base_lo(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_src_flat_scratch_base_lo:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 src_flat_scratch_base_lo, v0
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !8, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !8)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_src_flat_scratch_base_hi(i32 inreg %x) {
; CHECK-LABEL: write_sgpr_into_src_flat_scratch_base_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b32 src_flat_scratch_base_hi, s0
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !9, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !9)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_vgpr_into_src_flat_scratch_base_hi(i32 %x) {
; CHECK-LABEL: write_vgpr_into_src_flat_scratch_base_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 src_flat_scratch_base_hi, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i32(metadata !9, i32 %x)
  %read = call i32 @llvm.read_register.i32(metadata !9)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_uniform_vgpr_into_src_flat_scratch_base_hi(ptr addrspace(3) inreg %ptr) {
; CHECK-LABEL: write_uniform_vgpr_into_src_flat_scratch_base_hi:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    v_mov_b32_e32 v0, s0
; CHECK-NEXT:    ds_load_b32 v0, v0
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use src_flat_scratch_base_hi
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_wait_dscnt 0x0
; CHECK-NEXT:    v_readfirstlane_b32 src_flat_scratch_base_hi, v0
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i32, ptr addrspace(3) %ptr
  call void @llvm.write_register.i32(metadata !9, i32 %load)
  %read = call i32 @llvm.read_register.i32(metadata !9)
  call void asm sideeffect "; use $0", "s"(i32 %read)
  ret void
}

define void @write_sgpr_into_src_flat_scratch_base(i64 inreg %x) {
; CHECK-LABEL: write_sgpr_into_src_flat_scratch_base:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_wait_loadcnt_dscnt 0x0
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_mov_b64 s[2:3], src_flat_scratch_base_lo
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[2:3]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_mov_b64 src_flat_scratch_base_lo, s[0:1]
; CHECK-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !7, i64 %x)
  %read = call i64 @llvm.read_register.i64(metadata !7)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_vgpr_into_src_flat_scratch_base(i64 %x) {
; SDAG-LABEL: write_vgpr_into_src_flat_scratch_base:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_readfirstlane_b32 s3, v1
; SDAG-NEXT:    v_readfirstlane_b32 s2, v0
; SDAG-NEXT:    s_mov_b64 s[0:1], src_flat_scratch_base_lo
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[0:1]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_mov_b64 src_flat_scratch_base_lo, s[2:3]
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_vgpr_into_src_flat_scratch_base:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    v_readfirstlane_b32 s2, v0
; GISEL-NEXT:    v_readfirstlane_b32 s3, v1
; GISEL-NEXT:    s_mov_b64 s[0:1], src_flat_scratch_base_lo
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[0:1]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_mov_b64 src_flat_scratch_base_lo, s[2:3]
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  call void @llvm.write_register.i64(metadata !7, i64 %x)
  %read = call i64 @llvm.read_register.i64(metadata !7)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

define void @write_uniform_vgpr_into_src_flat_scratch_base(ptr addrspace(3) inreg %ptr) {
; SDAG-LABEL: write_uniform_vgpr_into_src_flat_scratch_base:
; SDAG:       ; %bb.0:
; SDAG-NEXT:    s_wait_loadcnt_dscnt 0x0
; SDAG-NEXT:    s_wait_kmcnt 0x0
; SDAG-NEXT:    v_mov_b32_e32 v0, s0
; SDAG-NEXT:    s_mov_b64 s[2:3], src_flat_scratch_base_lo
; SDAG-NEXT:    ds_load_b64 v[0:1], v0
; SDAG-NEXT:    ;;#ASMSTART
; SDAG-NEXT:    ; use s[2:3]
; SDAG-NEXT:    ;;#ASMEND
; SDAG-NEXT:    s_wait_dscnt 0x0
; SDAG-NEXT:    v_readfirstlane_b32 s1, v1
; SDAG-NEXT:    v_readfirstlane_b32 s0, v0
; SDAG-NEXT:    s_mov_b64 src_flat_scratch_base_lo, s[0:1]
; SDAG-NEXT:    s_set_pc_i64 s[30:31]
;
; GISEL-LABEL: write_uniform_vgpr_into_src_flat_scratch_base:
; GISEL:       ; %bb.0:
; GISEL-NEXT:    s_wait_loadcnt_dscnt 0x0
; GISEL-NEXT:    s_wait_kmcnt 0x0
; GISEL-NEXT:    v_mov_b32_e32 v0, s0
; GISEL-NEXT:    s_mov_b64 s[2:3], src_flat_scratch_base_lo
; GISEL-NEXT:    ds_load_b64 v[0:1], v0
; GISEL-NEXT:    ;;#ASMSTART
; GISEL-NEXT:    ; use s[2:3]
; GISEL-NEXT:    ;;#ASMEND
; GISEL-NEXT:    s_wait_dscnt 0x0
; GISEL-NEXT:    v_readfirstlane_b32 s0, v0
; GISEL-NEXT:    v_readfirstlane_b32 s1, v1
; GISEL-NEXT:    s_mov_b64 src_flat_scratch_base_lo, s[0:1]
; GISEL-NEXT:    s_set_pc_i64 s[30:31]
  %load = load i64, ptr addrspace(3) %ptr
  call void @llvm.write_register.i64(metadata !7, i64 %load)
  %read = call i64 @llvm.read_register.i64(metadata !7)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

; FIXME: Use %val directly once #229778 is fixed. The add avoids the
; kernarg load being coalesced into flat_scratch.
define amdgpu_kernel void @write_kernarg_into_flat_scratch(i64 %val) {
; CHECK-LABEL: write_kernarg_into_flat_scratch:
; CHECK:       ; %bb.0:
; CHECK-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; CHECK-NEXT:    s_mov_b64 s[64:65], 0
; CHECK-NEXT:    v_nop
; CHECK-NEXT:    global_prefetch_b8 v0, s[64:65] scope:SCOPE_SE
; CHECK-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; CHECK-NEXT:    s_wait_kmcnt 0x0
; CHECK-NEXT:    s_add_nc_u64 flat_scratch, s[0:1], 1
; CHECK-NEXT:    s_delay_alu instid0(SALU_CYCLE_1)
; CHECK-NEXT:    s_mov_b64 s[0:1], flat_scratch
; CHECK-NEXT:    ;;#ASMSTART
; CHECK-NEXT:    ; use s[0:1]
; CHECK-NEXT:    ;;#ASMEND
; CHECK-NEXT:    s_endpgm
  %add = add i64 %val, 1
  call void @llvm.write_register.i64(metadata !2, i64 %add)
  %read = call i64 @llvm.read_register.i64(metadata !2)
  call void asm sideeffect "; use $0", "s"(i64 %read)
  ret void
}

!0 = !{!"m0"}
!1 = !{!"exec"}
!2 = !{!"flat_scratch"}
!3 = !{!"flat_scratch_lo"}
!4 = !{!"flat_scratch_hi"}
!5 = !{!"exec_lo"}
!6 = !{!"exec_hi"}
!7 = !{!"src_flat_scratch_base"}
!8 = !{!"src_flat_scratch_base_lo"}
!9 = !{!"src_flat_scratch_base_hi"}