llvm/test/CodeGen/AArch64/GlobalISel/sve-formal-argument.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -global-isel -global-isel-abort=1 -aarch64-enable-gisel-sve=1 %s -o - | FileCheck %s
;; vscale x 128-bit

define void @formal_argument_nxv16i8(<vscale x 16 x i8> %0, ptr %p) {
; CHECK-LABEL: formal_argument_nxv16i8:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.b
; CHECK-NEXT:    st1b { z0.b }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 16 x i8> %0, ptr %p, align 16
  ret void
}

define void @formal_argument_nxv8i16(<vscale x 8 x i16> %0, ptr %p) {
; CHECK-LABEL: formal_argument_nxv8i16:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.h
; CHECK-NEXT:    st1h { z0.h }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 8 x i16> %0, ptr %p, align 16
  ret void
}

define void @formal_argument_nxv4i32(<vscale x 4 x i32> %0, ptr %p) {
; CHECK-LABEL: formal_argument_nxv4i32:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.s
; CHECK-NEXT:    st1w { z0.s }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 4 x i32> %0, ptr %p, align 16
  ret void
}

define void @formal_argument_nxv2i64(<vscale x 2 x i64> %0, ptr %p) {
; CHECK-LABEL: formal_argument_nxv2i64:
; CHECK:       // %bb.0:
; CHECK-NEXT:    ptrue p0.d
; CHECK-NEXT:    st1d { z0.d }, p0, [x0]
; CHECK-NEXT:    ret
  store <vscale x 2 x i64> %0, ptr %p, align 16
  ret void
}

;; TODO: Add tests for other types when store is supported for them.