llvm/test/Transforms/SLPVectorizer/X86/ordered-reductions.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-apple-macosx12.0.0 < %s | FileCheck %s

define float @test1(<2 x float> %retval.i69.sroa.0.0.copyload.i.i) {
; CHECK-LABEL: define float @test1(
; CHECK-SAME: <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[A_I_SROA_5_8_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[A_I_SROA_0_0_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_I_I:%.*]] = fadd float [[A_I_SROA_0_0_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[A_I616_SROA_0_4_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_1_I_I:%.*]] = fadd float [[A_I616_SROA_0_4_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[ADD_I597_1_I_I:%.*]] = fadd float [[ADD_I629_1_I_I]], [[ADD_I629_1_I_I]]
; CHECK-NEXT:    [[A_I616_SROA_8_12_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_3_I_I:%.*]] = fadd float [[A_I616_SROA_8_12_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[ADD_I629_2_I_I:%.*]] = fadd float [[A_I_SROA_5_8_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[ADD_I195_1_I_I:%.*]] = fadd float [[ADD_I629_I_I]], [[ADD_I597_1_I_I]]
; CHECK-NEXT:    [[ADD_I195_2_I_I:%.*]] = fadd float [[ADD_I629_2_I_I]], [[ADD_I195_1_I_I]]
; CHECK-NEXT:    [[TMP3:%.*]] = fadd float [[ADD_I629_3_I_I]], [[ADD_I195_2_I_I]]
; CHECK-NEXT:    ret float [[TMP3]]
;
entry:
  %a.i.sroa.5.8.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %a.i.sroa.0.0.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.i.i = fadd float %a.i.sroa.0.0.vec.extract.i.i, 0.000000e+00
  %a.i616.sroa.0.4.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.1.i.i = fadd float %a.i616.sroa.0.4.vec.extract.i.i, 0.000000e+00
  %add.i597.1.i.i = fadd float %add.i629.1.i.i, %add.i629.1.i.i
  %a.i616.sroa.8.12.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.3.i.i = fadd float %a.i616.sroa.8.12.vec.extract.i.i, 0.000000e+00
  %add.i629.2.i.i = fadd float %a.i.sroa.5.8.vec.extract.i.i, 0.000000e+00
  %add.i195.1.i.i = fadd float %add.i629.i.i, %add.i597.1.i.i
  %add.i195.2.i.i = fadd float %add.i629.2.i.i, %add.i195.1.i.i
  %add.i195.3.i.i = fadd float %add.i629.3.i.i, %add.i195.2.i.i
  ret float %add.i195.3.i.i
}

define float @test2(<2 x float> %retval.i69.sroa.0.0.copyload.i.i) {
; CHECK-LABEL: define float @test2(
; CHECK-SAME: <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[A_I_SROA_5_8_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_2_I_I:%.*]] = fadd float [[A_I_SROA_5_8_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[A_I_SROA_0_0_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_I_I:%.*]] = fadd float [[A_I_SROA_0_0_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[ADD_I597_I_I:%.*]] = fadd float [[ADD_I629_I_I]], [[ADD_I629_I_I]]
; CHECK-NEXT:    [[A_I616_SROA_0_4_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_1_I_I:%.*]] = fadd float [[A_I616_SROA_0_4_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[ADD_I725_1_I_I:%.*]] = fadd float [[ADD_I629_1_I_I]], 1.000000e+00
; CHECK-NEXT:    [[ADD_I597_1_I_I:%.*]] = fadd float [[ADD_I629_1_I_I]], [[ADD_I725_1_I_I]]
; CHECK-NEXT:    [[A_I616_SROA_8_12_VEC_EXTRACT_I_I:%.*]] = extractelement <2 x float> [[RETVAL_I69_SROA_0_0_COPYLOAD_I_I]], i64 0
; CHECK-NEXT:    [[ADD_I629_3_I_I:%.*]] = fadd float [[A_I616_SROA_8_12_VEC_EXTRACT_I_I]], 0.000000e+00
; CHECK-NEXT:    [[ADD_I597_2_I_I:%.*]] = fadd float [[ADD_I629_2_I_I]], [[ADD_I629_2_I_I]]
; CHECK-NEXT:    [[ADD_I195_1_I_I:%.*]] = fadd float [[ADD_I597_I_I]], [[ADD_I597_1_I_I]]
; CHECK-NEXT:    [[ADD_I195_2_I_I:%.*]] = fadd float [[ADD_I597_2_I_I]], [[ADD_I195_1_I_I]]
; CHECK-NEXT:    [[TMP5:%.*]] = fadd float [[ADD_I629_3_I_I]], [[ADD_I195_2_I_I]]
; CHECK-NEXT:    ret float [[TMP5]]
;
entry:
  %a.i.sroa.5.8.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.2.i.i = fadd float %a.i.sroa.5.8.vec.extract.i.i, 0.000000e+00
  %a.i.sroa.0.0.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.i.i = fadd float %a.i.sroa.0.0.vec.extract.i.i, 0.000000e+00
  %add.i597.i.i = fadd float %add.i629.i.i, %add.i629.i.i
  %a.i616.sroa.0.4.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.1.i.i = fadd float %a.i616.sroa.0.4.vec.extract.i.i, 0.000000e+00
  %add.i725.1.i.i = fadd float %add.i629.1.i.i, 1.000000e+00
  %add.i597.1.i.i = fadd float %add.i629.1.i.i, %add.i725.1.i.i
  %a.i616.sroa.8.12.vec.extract.i.i = extractelement <2 x float> %retval.i69.sroa.0.0.copyload.i.i, i64 0
  %add.i629.3.i.i = fadd float %a.i616.sroa.8.12.vec.extract.i.i, 0.000000e+00
  %add.i597.2.i.i = fadd float %add.i629.2.i.i, %add.i629.2.i.i
  %add.i195.1.i.i = fadd float %add.i597.i.i, %add.i597.1.i.i
  %add.i195.2.i.i = fadd float %add.i597.2.i.i, %add.i195.1.i.i
  %add.i195.3.i.i = fadd float %add.i629.3.i.i, %add.i195.2.i.i
  ret float %add.i195.3.i.i
}