llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-before-execute.ll

; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=8 -force-vector-interleave=2 -disable-output -vplan-print-after=printOptimizedVPlan -S %s 2>&1 | FileCheck --check-prefixes=OPTIMIZE %s
; RUN: opt -passes=loop-vectorize -force-vector-width=8 -force-vector-interleave=2 -disable-output -vplan-print-after="printFinalVPlan$" -S %s 2>&1 | FileCheck --check-prefixes=FINAL %s

target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

; Check if the vector loop condition can be simplified to true for a given
; VF/IC combination.
define void @test_tc_less_than_16(ptr %A, i64 %N) {
; OPTIMIZE-LABEL: VPlan for loop in 'test_tc_less_than_16'
; OPTIMIZE:  VPlan 'Initial VPlan for VF={8},UF>=1' {
; OPTIMIZE-NEXT:  Live-in vp<[[VP0:%[0-9]+]]> = VF
; OPTIMIZE-NEXT:  Live-in vp<[[VP1:%[0-9]+]]> = VF * UF
; OPTIMIZE-NEXT:  Live-in vp<[[VP2:%[0-9]+]]> = vector-trip-count
; OPTIMIZE-NEXT:  Live-in ir<16> = original trip-count
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  ir-bb<entry>:
; OPTIMIZE-NEXT:  Successor(s): scalar.ph, vector.ph
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  vector.ph:
; OPTIMIZE-NEXT:    vp<[[VP3:%[0-9]+]]> = DERIVED-IV ir<16> + vp<[[VP2]]> * ir<-1>
; OPTIMIZE-NEXT:    vp<[[VP4:%[0-9]+]]> = DERIVED-IV ir<%A> + vp<[[VP2]]> * ir<1>
; OPTIMIZE-NEXT:  Successor(s): vector loop
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  <x1> vector loop: {
; OPTIMIZE-NEXT:  vp<[[VP5:%[0-9]+]]> = CANONICAL-IV
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:    vector.body:
; OPTIMIZE-NEXT:      vp<[[VP6:%[0-9]+]]> = SCALAR-STEPS vp<[[VP5]]>, ir<1>, vp<[[VP0]]>
; OPTIMIZE-NEXT:      EMIT vp<%next.gep> = ptradd ir<%A>, vp<[[VP6]]>
; OPTIMIZE-NEXT:      vp<[[VP7:%[0-9]+]]> = vector-pointer i8, vp<%next.gep>, ir<1>
; OPTIMIZE-NEXT:      WIDEN ir<%l> = load vp<[[VP7]]>
; OPTIMIZE-NEXT:      WIDEN ir<%add> = add nsw ir<%l>, ir<10>
; OPTIMIZE-NEXT:      WIDEN store vp<[[VP7]]>, ir<%add>
; OPTIMIZE-NEXT:      EMIT vp<%index.next> = add nuw vp<[[VP5]]>, vp<[[VP1]]>
; OPTIMIZE-NEXT:      EMIT branch-on-count vp<%index.next>, vp<[[VP2]]>
; OPTIMIZE-NEXT:    No successors
; OPTIMIZE-NEXT:  }
; OPTIMIZE-NEXT:  Successor(s): middle.block
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  middle.block:
; OPTIMIZE-NEXT:    EMIT vp<%cmp.n> = icmp eq ir<16>, vp<[[VP2]]>
; OPTIMIZE-NEXT:    EMIT branch-on-cond vp<%cmp.n>
; OPTIMIZE-NEXT:  Successor(s): ir-bb<exit>, scalar.ph
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  ir-bb<exit>:
; OPTIMIZE-NEXT:  No successors
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  scalar.ph:
; OPTIMIZE-NEXT:    EMIT-SCALAR vp<%bc.resume.val> = phi [ vp<[[VP3]]>, middle.block ], [ ir<16>, ir-bb<entry> ]
; OPTIMIZE-NEXT:    EMIT-SCALAR vp<%bc.resume.val>.1 = phi [ vp<[[VP4]]>, middle.block ], [ ir<%A>, ir-bb<entry> ]
; OPTIMIZE-NEXT:  Successor(s): ir-bb<loop>
; OPTIMIZE-EMPTY:
; OPTIMIZE-NEXT:  ir-bb<loop>:
; OPTIMIZE-NEXT:    IR   %iv = phi i64 [ 16, %entry ], [ %iv.next, %loop ] (extra operand: vp<%bc.resume.val> from scalar.ph)
; OPTIMIZE-NEXT:    IR   %p.src = phi ptr [ %A, %entry ], [ %p.src.next, %loop ] (extra operand: vp<%bc.resume.val>.1 from scalar.ph)
; OPTIMIZE-NEXT:    IR   %p.src.next = getelementptr inbounds i8, ptr %p.src, i64 1
; OPTIMIZE-NEXT:    IR   %l = load i8, ptr %p.src, align 1
; OPTIMIZE-NEXT:    IR   %add = add nsw i8 %l, 10
; OPTIMIZE-NEXT:    IR   store i8 %add, ptr %p.src, align 1
; OPTIMIZE-NEXT:    IR   %iv.next = add nsw i64 %iv, -1
; OPTIMIZE-NEXT:    IR   %cmp = icmp eq i64 %iv.next, 0
; OPTIMIZE-NEXT:  No successors
; OPTIMIZE-NEXT:  }
;
; FINAL-LABEL: VPlan for loop in 'test_tc_less_than_16'
; FINAL:  VPlan 'Final VPlan for VF={8},UF={2}' {
; FINAL-EMPTY:
; FINAL-NEXT:  ir-bb<entry>:
; FINAL-NEXT:  Successor(s): vector.ph
; FINAL-EMPTY:
; FINAL-NEXT:  vector.ph:
; FINAL-NEXT:  Successor(s): vector.body
; FINAL-EMPTY:
; FINAL-NEXT:  vector.body:
; FINAL-NEXT:    vp<[[VP1:%[0-9]+]]> = vector-pointer i8, ir<%A>, ir<1>, ir<8>
; FINAL-NEXT:    WIDEN ir<%l> = load ir<%A>
; FINAL-NEXT:    WIDEN ir<%l>.1 = load vp<[[VP1]]>
; FINAL-NEXT:    WIDEN ir<%add> = add nsw ir<%l>, ir<10>
; FINAL-NEXT:    WIDEN ir<%add>.1 = add nsw ir<%l>.1, ir<10>
; FINAL-NEXT:    WIDEN store ir<%A>, ir<%add>
; FINAL-NEXT:    WIDEN store vp<[[VP1]]>, ir<%add>.1
; FINAL-NEXT:  Successor(s): middle.block
; FINAL-EMPTY:
; FINAL-NEXT:  middle.block:
; FINAL-NEXT:  Successor(s): ir-bb<exit>
; FINAL-EMPTY:
; FINAL-NEXT:  ir-bb<exit>:
; FINAL-NEXT:  No successors
; FINAL-NEXT:  }
;
entry:
  br label %loop

loop:
  %iv = phi i64 [ 16, %entry ], [ %iv.next, %loop ]
  %p.src = phi ptr [ %A, %entry ], [ %p.src.next, %loop ]
  %p.src.next = getelementptr inbounds i8, ptr %p.src, i64 1
  %l = load i8, ptr %p.src, align 1
  %add = add nsw i8 %l, 10
  store i8 %add, ptr %p.src
  %iv.next = add nsw i64 %iv, -1
  %cmp = icmp eq i64 %iv.next, 0
  br i1 %cmp, label %exit, label %loop

exit:
  ret void
}