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llvm/llvm-project/f3d4f2aa601703166e75ec00a67624b073a613f2/./llvm/test/Transforms/LoopFusion/four_loops.ll
blob: 39dbbe6c020829c4f2ed1698263ea9c269672f41 [file]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-fusion -loop-fusion-disable-cost-model < %s | FileCheck %s
@A = common global [1024 x i32] zeroinitializer, align 16
@B = common global [1024 x i32] zeroinitializer, align 16
@C = common global [1024 x i32] zeroinitializer, align 16
@D = common global [1024 x i32] zeroinitializer, align 16
define void @dep_free() {
; CHECK-LABEL: define void @dep_free() {
; CHECK-NEXT: [[BB:.*]]:
; CHECK-NEXT: br label %[[BB15:.*]]
; CHECK: [[BB15]]:
; CHECK-NEXT: [[DOT08:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP23:%.*]], %[[BB61:.*]] ]
; CHECK-NEXT: [[INDVARS_IV107:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT11:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[DOT016:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP36:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[INDVARS_IV75:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT8:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[DOT024:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP49:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[INDVARS_IV43:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT5:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[DOT032:%.*]] = phi i32 [ 0, %[[BB]] ], [ [[TMP62:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 0, %[[BB]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[BB61]] ]
; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT08]], -3
; CHECK-NEXT: [[TMP16:%.*]] = add nuw nsw i64 [[INDVARS_IV107]], 3
; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP16]] to i32
; CHECK-NEXT: [[TMP18:%.*]] = mul nsw i32 [[TMP]], [[TMP17]]
; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[INDVARS_IV107]] to i32
; CHECK-NEXT: [[TMP20:%.*]] = srem i32 [[TMP18]], [[TMP19]]
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1024 x i32], ptr @A, i64 0, i64 [[INDVARS_IV107]]
; CHECK-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4
; CHECK-NEXT: br label %[[BB22:.*]]
; CHECK: [[BB22]]:
; CHECK-NEXT: [[TMP28:%.*]] = add nsw i32 [[DOT016]], -3
; CHECK-NEXT: [[TMP29:%.*]] = add nuw nsw i64 [[INDVARS_IV75]], 3
; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[TMP29]] to i32
; CHECK-NEXT: [[TMP31:%.*]] = mul nsw i32 [[TMP28]], [[TMP30]]
; CHECK-NEXT: [[TMP32:%.*]] = trunc i64 [[INDVARS_IV75]] to i32
; CHECK-NEXT: [[TMP33:%.*]] = srem i32 [[TMP31]], [[TMP32]]
; CHECK-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 [[INDVARS_IV75]]
; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP34]], align 4
; CHECK-NEXT: br label %[[BB35:.*]]
; CHECK: [[BB35]]:
; CHECK-NEXT: [[TMP41:%.*]] = add nsw i32 [[DOT024]], -3
; CHECK-NEXT: [[TMP42:%.*]] = add nuw nsw i64 [[INDVARS_IV43]], 3
; CHECK-NEXT: [[TMP43:%.*]] = trunc i64 [[TMP42]] to i32
; CHECK-NEXT: [[TMP44:%.*]] = mul nsw i32 [[TMP41]], [[TMP43]]
; CHECK-NEXT: [[TMP45:%.*]] = trunc i64 [[INDVARS_IV43]] to i32
; CHECK-NEXT: [[TMP46:%.*]] = srem i32 [[TMP44]], [[TMP45]]
; CHECK-NEXT: [[TMP47:%.*]] = getelementptr inbounds [1024 x i32], ptr @C, i64 0, i64 [[INDVARS_IV43]]
; CHECK-NEXT: store i32 [[TMP46]], ptr [[TMP47]], align 4
; CHECK-NEXT: br label %[[BB48:.*]]
; CHECK: [[BB48]]:
; CHECK-NEXT: [[TMP54:%.*]] = add nsw i32 [[DOT032]], -3
; CHECK-NEXT: [[TMP55:%.*]] = add nuw nsw i64 [[INDVARS_IV1]], 3
; CHECK-NEXT: [[TMP56:%.*]] = trunc i64 [[TMP55]] to i32
; CHECK-NEXT: [[TMP57:%.*]] = mul nsw i32 [[TMP54]], [[TMP56]]
; CHECK-NEXT: [[TMP58:%.*]] = trunc i64 [[INDVARS_IV1]] to i32
; CHECK-NEXT: [[TMP59:%.*]] = srem i32 [[TMP57]], [[TMP58]]
; CHECK-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1024 x i32], ptr @D, i64 0, i64 [[INDVARS_IV1]]
; CHECK-NEXT: store i32 [[TMP59]], ptr [[TMP60]], align 4
; CHECK-NEXT: br label %[[BB61]]
; CHECK: [[BB52:.*]]:
; CHECK-NEXT: br label %[[BB63:.*]]
; CHECK: [[BB61]]:
; CHECK-NEXT: [[INDVARS_IV_NEXT11]] = add nuw nsw i64 [[INDVARS_IV107]], 1
; CHECK-NEXT: [[TMP23]] = add nuw nsw i32 [[DOT08]], 1
; CHECK-NEXT: [[EXITCOND12:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT11]], 100
; CHECK-NEXT: [[INDVARS_IV_NEXT8]] = add nuw nsw i64 [[INDVARS_IV75]], 1
; CHECK-NEXT: [[TMP36]] = add nuw nsw i32 [[DOT016]], 1
; CHECK-NEXT: [[EXITCOND9:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT8]], 100
; CHECK-NEXT: [[INDVARS_IV_NEXT5]] = add nuw nsw i64 [[INDVARS_IV43]], 1
; CHECK-NEXT: [[TMP49]] = add nuw nsw i32 [[DOT024]], 1
; CHECK-NEXT: [[EXITCOND6:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT5]], 100
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
; CHECK-NEXT: [[TMP62]] = add nuw nsw i32 [[DOT032]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
; CHECK-NEXT: br i1 [[EXITCOND]], label %[[BB15]], label %[[BB52]]
; CHECK: [[BB63]]:
; CHECK-NEXT: ret void
;
bb:
br label %bb15
bb25.preheader: ; preds = %bb22
br label %bb27
bb15: ; preds = %bb, %bb22
%.08 = phi i32 [ 0, %bb ], [ %tmp23, %bb22 ]
%indvars.iv107 = phi i64 [ 0, %bb ], [ %indvars.iv.next11, %bb22 ]
%tmp = add nsw i32 %.08, -3
%tmp16 = add nuw nsw i64 %indvars.iv107, 3
%tmp17 = trunc i64 %tmp16 to i32
%tmp18 = mul nsw i32 %tmp, %tmp17
%tmp19 = trunc i64 %indvars.iv107 to i32
%tmp20 = srem i32 %tmp18, %tmp19
%tmp21 = getelementptr inbounds [1024 x i32], ptr @A, i64 0, i64 %indvars.iv107
store i32 %tmp20, ptr %tmp21, align 4
br label %bb22
bb22: ; preds = %bb15
%indvars.iv.next11 = add nuw nsw i64 %indvars.iv107, 1
%tmp23 = add nuw nsw i32 %.08, 1
%exitcond12 = icmp ne i64 %indvars.iv.next11, 100
br i1 %exitcond12, label %bb15, label %bb25.preheader
bb38.preheader: ; preds = %bb35
br label %bb40
bb27: ; preds = %bb25.preheader, %bb35
%.016 = phi i32 [ 0, %bb25.preheader ], [ %tmp36, %bb35 ]
%indvars.iv75 = phi i64 [ 0, %bb25.preheader ], [ %indvars.iv.next8, %bb35 ]
%tmp28 = add nsw i32 %.016, -3
%tmp29 = add nuw nsw i64 %indvars.iv75, 3
%tmp30 = trunc i64 %tmp29 to i32
%tmp31 = mul nsw i32 %tmp28, %tmp30
%tmp32 = trunc i64 %indvars.iv75 to i32
%tmp33 = srem i32 %tmp31, %tmp32
%tmp34 = getelementptr inbounds [1024 x i32], ptr @B, i64 0, i64 %indvars.iv75
store i32 %tmp33, ptr %tmp34, align 4
br label %bb35
bb35: ; preds = %bb27
%indvars.iv.next8 = add nuw nsw i64 %indvars.iv75, 1
%tmp36 = add nuw nsw i32 %.016, 1
%exitcond9 = icmp ne i64 %indvars.iv.next8, 100
br i1 %exitcond9, label %bb27, label %bb38.preheader
bb51.preheader: ; preds = %bb48
br label %bb53
bb40: ; preds = %bb38.preheader, %bb48
%.024 = phi i32 [ 0, %bb38.preheader ], [ %tmp49, %bb48 ]
%indvars.iv43 = phi i64 [ 0, %bb38.preheader ], [ %indvars.iv.next5, %bb48 ]
%tmp41 = add nsw i32 %.024, -3
%tmp42 = add nuw nsw i64 %indvars.iv43, 3
%tmp43 = trunc i64 %tmp42 to i32
%tmp44 = mul nsw i32 %tmp41, %tmp43
%tmp45 = trunc i64 %indvars.iv43 to i32
%tmp46 = srem i32 %tmp44, %tmp45
%tmp47 = getelementptr inbounds [1024 x i32], ptr @C, i64 0, i64 %indvars.iv43
store i32 %tmp46, ptr %tmp47, align 4
br label %bb48
bb48: ; preds = %bb40
%indvars.iv.next5 = add nuw nsw i64 %indvars.iv43, 1
%tmp49 = add nuw nsw i32 %.024, 1
%exitcond6 = icmp ne i64 %indvars.iv.next5, 100
br i1 %exitcond6, label %bb40, label %bb51.preheader
bb52: ; preds = %bb61
br label %bb63
bb53: ; preds = %bb51.preheader, %bb61
%.032 = phi i32 [ 0, %bb51.preheader ], [ %tmp62, %bb61 ]
%indvars.iv1 = phi i64 [ 0, %bb51.preheader ], [ %indvars.iv.next, %bb61 ]
%tmp54 = add nsw i32 %.032, -3
%tmp55 = add nuw nsw i64 %indvars.iv1, 3
%tmp56 = trunc i64 %tmp55 to i32
%tmp57 = mul nsw i32 %tmp54, %tmp56
%tmp58 = trunc i64 %indvars.iv1 to i32
%tmp59 = srem i32 %tmp57, %tmp58
%tmp60 = getelementptr inbounds [1024 x i32], ptr @D, i64 0, i64 %indvars.iv1
store i32 %tmp59, ptr %tmp60, align 4
br label %bb61
bb61: ; preds = %bb53
%indvars.iv.next = add nuw nsw i64 %indvars.iv1, 1
%tmp62 = add nuw nsw i32 %.032, 1
%exitcond = icmp ne i64 %indvars.iv.next, 100
br i1 %exitcond, label %bb53, label %bb52
bb63: ; preds = %bb52
ret void
}