llvm/test/CodeGen/AMDGPU/extra-lds-size.ll

; RUN: llc -mtriple=amdgpu10.10-amd-amdpal < %s | FileCheck -check-prefix=GFX10-PAL %s
; RUN: llc -mtriple=amdgpu10.10-mesa-mesa3d < %s | FileCheck -check-prefix=GFX10-MESA %s
; RUN: llc -mtriple=amdgpu11.00-amd-amdpal < %s | FileCheck -check-prefix=GFX11-PAL %s
; RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d < %s | FileCheck -check-prefix=GFX11-MESA %s
; RUN: llc -mtriple=amdgpu9.50-amd-amdpal < %s | FileCheck -check-prefix=GFX950-PAL %s
; RUN: llc -mtriple=amdgpu9.50-mesa-mesa3d < %s | FileCheck -check-prefix=GFX950-MESA %s
; RUN: llc -mtriple=amdgpu12.00-amd-amdpal < %s | FileCheck -check-prefix=GFX1200-PAL %s
; RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d < %s | FileCheck -check-prefix=GFX1200-MESA %s
; RUN: llc -mtriple=amdgpu12.50-amd-amdpal < %s | FileCheck -check-prefix=GFX1250-PAL %s
; RUN: llc -mtriple=amdgpu12.50-mesa-mesa3d < %s | FileCheck -check-prefix=GFX1250-MESA %s
; RUN: llc -mtriple=amdgpu13.10-amd-amdpal < %s | FileCheck -check-prefix=GFX1310-PAL %s
; RUN: llc -mtriple=amdgpu13.10-mesa-mesa3d < %s | FileCheck -check-prefix=GFX1310-MESA %s

; Check EXTRA_LDS_SIZE in SPI_SHADER_PGM_RSRC2_PS.

; GFX10-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x800

; GFX10-MESA: .long 45100
; GFX10-MESA-NEXT: .long 2048

; GFX11-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x400

; GFX11-MESA: .long 45100
; GFX11-MESA-NEXT: .long 1024

; GFX950-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x400

; GFX950-MESA: .long 45100
; GFX950-MESA-NEXT: .long 1024

; GFX1200-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x400

; GFX1200-MESA: .long 45100
; GFX1200-MESA-NEXT: .long 1024

; GFX1250-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x100

; GFX1250-MESA: .long 45100
; GFX1250-MESA-NEXT: .long 256

; GFX1310-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x200

; GFX1310-MESA: .long 45100
; GFX1310-MESA-NEXT: .long 512

@lds = internal addrspace(3) global [4096 x i8] poison

define amdgpu_ps void @global_store_saddr_uniform_ptr_in_vgprs(i32 %voffset) {
  %ptr = getelementptr [4096 x i8], ptr addrspace(3) @lds, i32 0, i32 %voffset
  store i8 0, ptr addrspace(3) %ptr
  ret void
}