llvm/test/CodeGen/PowerPC/fneg.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=LE
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=BE
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck %s -check-prefix=BE32

define double @test1(double %a, double %b, double %c, double %d) {
; LE-LABEL: test1:
; LE:       # %bb.0:
; LE-NEXT:    xsmuldp 0, 3, 4
; LE-NEXT:    xsmuldp 1, 1, 2
; LE-NEXT:    xsadddp 1, 1, 0
; LE-NEXT:    blr
;
; BE-LABEL: test1:
; BE:       # %bb.0:
; BE-NEXT:    fmul 0, 3, 4
; BE-NEXT:    fmul 1, 1, 2
; BE-NEXT:    fadd 1, 1, 0
; BE-NEXT:    blr
;
; BE32-LABEL: test1:
; BE32:       # %bb.0:
; BE32-NEXT:    fmul f0, f3, f4
; BE32-NEXT:    fmul f1, f1, f2
; BE32-NEXT:    fadd f1, f1, f0
; BE32-NEXT:    blr
  %tmp2 = fsub double -0.000000e+00, %c
  %tmp4 = fmul double %tmp2, %d
  %tmp7 = fmul double %a, %b
  %tmp9 = fsub double %tmp7, %tmp4
  ret double %tmp9
}

declare float @llvm.fmuladd.f32(float, float, float) #4

define float @fma_fneg_fneg(float %x, float %y, float %z) {
; LE-LABEL: fma_fneg_fneg:
; LE:       # %bb.0:
; LE-NEXT:    xsmaddasp 3, 1, 2
; LE-NEXT:    fmr 1, 3
; LE-NEXT:    blr
;
; BE-LABEL: fma_fneg_fneg:
; BE:       # %bb.0:
; BE-NEXT:    fmadds 1, 1, 2, 3
; BE-NEXT:    blr
;
; BE32-LABEL: fma_fneg_fneg:
; BE32:       # %bb.0:
; BE32-NEXT:    fmadds f1, f1, f2, f3
; BE32-NEXT:    blr
  %negx = fneg float %x
  %negy = fneg float %y
  %r = call float @llvm.fmuladd.f32(float %negx, float %negy, float %z)
  ret float %r
}

define float @fma_fneg_fsub(float %x, float %y0, float %y1, float %z) {
; LE-LABEL: fma_fneg_fsub:
; LE:       # %bb.0:
; LE-NEXT:    xssubsp 0, 3, 2
; LE-NEXT:    xsmaddasp 4, 1, 0
; LE-NEXT:    fmr 1, 4
; LE-NEXT:    blr
;
; BE-LABEL: fma_fneg_fsub:
; BE:       # %bb.0:
; BE-NEXT:    fsubs 0, 3, 2
; BE-NEXT:    fmadds 1, 1, 0, 4
; BE-NEXT:    blr
;
; BE32-LABEL: fma_fneg_fsub:
; BE32:       # %bb.0:
; BE32-NEXT:    fsubs f0, f3, f2
; BE32-NEXT:    fmadds f1, f1, f0, f4
; BE32-NEXT:    blr
  %negx = fneg float %x
  %negy = fsub nsz float %y0, %y1
  %r = call float @llvm.fmuladd.f32(float %negx, float %negy, float %z)
  ret float %r
}

; Verify that we didn't hit assertion for this case.
define double @fneg_no_ice(float %x) {
; LE-LABEL: fneg_no_ice:
; LE:       # %bb.0:
; LE-NEXT:    vspltisw 2, 1
; LE-NEXT:    xvcvsxwdp 0, 34
; LE-NEXT:    xssubsp 0, 0, 1
; LE-NEXT:    xsmuldp 1, 0, 0
; LE-NEXT:    xsmuldp 1, 0, 1
; LE-NEXT:    blr
;
; BE-LABEL: fneg_no_ice:
; BE:       # %bb.0:
; BE-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
; BE-NEXT:    lfs 0, .LCPI3_0@toc@l(3)
; BE-NEXT:    fsubs 0, 0, 1
; BE-NEXT:    fmul 1, 0, 0
; BE-NEXT:    fmul 1, 0, 1
; BE-NEXT:    blr
;
; BE32-LABEL: fneg_no_ice:
; BE32:       # %bb.0:
; BE32-NEXT:    lis r3, .LCPI3_0@ha
; BE32-NEXT:    lfs f0, .LCPI3_0@l(r3)
; BE32-NEXT:    fsubs f0, f0, f1
; BE32-NEXT:    fmul f1, f0, f0
; BE32-NEXT:    fmul f1, f0, f1
; BE32-NEXT:    blr
  %y = fsub fast float 1.0, %x
  %e = fpext float %y to double
  %e2 = fmul double %e, %e
  %e3 = fmul double %e, %e2
  ret double %e3
}

define double @fneg_fmul_const(double %x) {
; LE-LABEL: fneg_fmul_const:
; LE:       # %bb.0: # %entry
; LE-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
; LE-NEXT:    lfd 0, .LCPI4_0@toc@l(3)
; LE-NEXT:    xsmuldp 1, 1, 0
; LE-NEXT:    blr
;
; BE-LABEL: fneg_fmul_const:
; BE:       # %bb.0: # %entry
; BE-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
; BE-NEXT:    lfd 0, .LCPI4_0@toc@l(3)
; BE-NEXT:    fmul 1, 1, 0
; BE-NEXT:    blr
;
; BE32-LABEL: fneg_fmul_const:
; BE32:       # %bb.0: # %entry
; BE32-NEXT:    lis r3, .LCPI4_0@ha
; BE32-NEXT:    lfd f0, .LCPI4_0@l(r3)
; BE32-NEXT:    fmul f1, f1, f0
; BE32-NEXT:    blr
entry:
  %f = fmul double %x, 1.2345
  %s = fneg double %f
  ret double %s
}

define i1 @fneg_msb(ppc_fp128 nofpclass(nan ninf nsub nnorm nzero) %x) {
; LE-LABEL: fneg_msb:
; LE:       # %bb.0: # %entry
; LE-NEXT:    li 3, 1
; LE-NEXT:    blr
;
; BE-LABEL: fneg_msb:
; BE:       # %bb.0: # %entry
; BE-NEXT:    li 3, 1
; BE-NEXT:    blr
;
; BE32-LABEL: fneg_msb:
; BE32:       # %bb.0: # %entry
; BE32-NEXT:    li r3, 1
; BE32-NEXT:    blr
entry:
  %neg = fneg ppc_fp128 %x
  %v = bitcast ppc_fp128 %neg to i128
  %cmp = icmp slt i128 %v, 0
  ret i1 %cmp
}

define i1 @fneg_bit63(ppc_fp128 nofpclass(nan ninf nsub nnorm nzero) %x) {
; LE-LABEL: fneg_bit63:
; LE:       # %bb.0: # %entry
; LE-NEXT:    mffprd 3, 1
; LE-NEXT:    rldicl 3, 3, 1, 63
; LE-NEXT:    blr
;
; BE-LABEL: fneg_bit63:
; BE:       # %bb.0: # %entry
; BE-NEXT:    stfd 2, -8(1)
; BE-NEXT:    ld 3, -8(1)
; BE-NEXT:    not 3, 3
; BE-NEXT:    rldicl 3, 3, 1, 63
; BE-NEXT:    blr
;
; BE32-LABEL: fneg_bit63:
; BE32:       # %bb.0: # %entry
; BE32-NEXT:    stwu r1, -32(r1)
; BE32-NEXT:    .cfi_def_cfa_offset 32
; BE32-NEXT:    stfd f2, 16(r1)
; BE32-NEXT:    lwz r3, 16(r1)
; BE32-NEXT:    not r3, r3
; BE32-NEXT:    srwi r3, r3, 31
; BE32-NEXT:    addi r1, r1, 32
; BE32-NEXT:    blr
entry:
  %neg = fneg ppc_fp128 %x
  %v = bitcast ppc_fp128 %neg to i128
  %masked = and i128 %v, 9223372036854775808 ; 1 << 63
  %cmp = icmp ne i128 %masked, 0
  ret i1 %cmp
}

define i1 @fneg_fneg_msb(ppc_fp128 nofpclass(nan ninf nsub nnorm nzero) %x) {
; LE-LABEL: fneg_fneg_msb:
; LE:       # %bb.0: # %entry
; LE-NEXT:    mffprd 3, 1
; LE-NEXT:    rldicl 3, 3, 1, 63
; LE-NEXT:    blr
;
; BE-LABEL: fneg_fneg_msb:
; BE:       # %bb.0: # %entry
; BE-NEXT:    stfd 2, -8(1)
; BE-NEXT:    ld 3, -8(1)
; BE-NEXT:    rldicl 3, 3, 1, 63
; BE-NEXT:    blr
;
; BE32-LABEL: fneg_fneg_msb:
; BE32:       # %bb.0: # %entry
; BE32-NEXT:    stwu r1, -32(r1)
; BE32-NEXT:    .cfi_def_cfa_offset 32
; BE32-NEXT:    stfd f2, 16(r1)
; BE32-NEXT:    lwz r3, 16(r1)
; BE32-NEXT:    srwi r3, r3, 31
; BE32-NEXT:    addi r1, r1, 32
; BE32-NEXT:    blr
entry:
  %neg = fneg ppc_fp128 %x
  %neg2 = fneg ppc_fp128 %neg
  %v = bitcast ppc_fp128 %neg2 to i128
  %masked = and i128 %v, 9223372036854775808 ; 1 << 63
  %cmp = icmp ne i128 %masked, 0
  ret i1 %cmp
}