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llvm/llvm-project/f20e2829dfdd25bd2ea2cbef1617652878747cb5^!/.
commit
f20e2829dfdd25bd2ea2cbef1617652878747cb5
[log]
author
Farzon Lotfi <farzonlotfi@microsoft.com>
Thu Aug 27 09:56:48 2026 -0400
committer
GitHub <noreply@github.com>
Thu Aug 27 09:56:48 2026 -0400
tree
38ea95574deae3e891546ad367a4c577bd8bfcb5
parent
42e2f1692dc791c31195ff44b0d5a25f0724c935 [diff]
[DirectX][Scalarizer] Make sure TargetTransformInfoWrapperPass is setup (#216893)

fixes #216888

In the process of testing the scalarization of HLSL long vectors I
discoved that some intrinsics were crashing when used with llc but not
when used with opt -scalarizer. This change makes sure that we have
setup TargetTransformInfoWrapperPass so that we can call the DirectX
versions of `isTargetIntrinsicWithScalarOpAtArg` and
`isTargetIntrinsicWithOverloadTypeAtArg`.

resolves https://github.com/llvm/llvm-project/issues/216191
Because we are also turning off the scalarizer if sm 6.9

Assisted by Copilot with GPT 5.6-Sol
diff --git a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
index 1240e7c..bca6316 100644
--- a/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+++ b/llvm/lib/Target/DirectX/DirectXTargetMachine.cpp

@@ -34,6 +34,7 @@
 #include "DirectXSubtarget.h"
 #include "DirectXTargetTransformInfo.h"
 #include "TargetInfo/DirectXTargetInfo.h"
+#include "llvm/Analysis/TargetTransformInfo.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
@@ -47,6 +48,7 @@
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/VersionTuple.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Transforms/IPO/GlobalDCE.h"
 #include "llvm/Transforms/Scalar.h"
@@ -128,9 +130,12 @@
     addPass(createDXILResourceAccessLegacyPass());
     addPass(createDXILIntrinsicExpansionLegacyPass());
     addPass(createDXILDataScalarizationLegacyPass());
-    ScalarizerPassOptions DxilScalarOptions;
-    DxilScalarOptions.ScalarizeLoadStore = true;
-    addPass(createScalarizerPass(DxilScalarOptions));
+    if (getDirectXTargetMachine().getTargetTriple().getOSVersion() <
+        VersionTuple(6, 9)) {
+      ScalarizerPassOptions DxilScalarOptions;
+      DxilScalarOptions.ScalarizeLoadStore = true;
+      addPass(createScalarizerPass(DxilScalarOptions));
+    }
     addPass(createDXILFlattenArraysLegacyPass());
     addPass(createDXILForwardHandleAccessesLegacyPass());
     if (OptLevel != CodeGenOptLevel::None) {
@@ -170,6 +175,7 @@
     CodeGenFileType FileType, bool DisableVerify,
     MachineModuleInfoWrapperPass *MMIWP) {
   TargetPassConfig *PassConfig = createPassConfig(PM);
+  PM.add(createTargetTransformInfoWrapperPass(getTargetIRAnalysis()));
   PassConfig->addCodeGenPrepare();
 
   switch (FileType) {

diff --git a/llvm/lib/Transforms/Scalar/Scalarizer.cpp b/llvm/lib/Transforms/Scalar/Scalarizer.cpp
index 006f4c1..280a36c 100644
--- a/llvm/lib/Transforms/Scalar/Scalarizer.cpp
+++ b/llvm/lib/Transforms/Scalar/Scalarizer.cpp

@@ -364,6 +364,7 @@
 INITIALIZE_PASS_BEGIN(ScalarizerLegacyPass, "scalarizer",
                       "Scalarize vector operations", false, false)
 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
 INITIALIZE_PASS_END(ScalarizerLegacyPass, "scalarizer",
                     "Scalarize vector operations", false, false)
 

diff --git a/llvm/test/CodeGen/DirectX/LongVector/asdouble.ll b/llvm/test/CodeGen/DirectX/LongVector/asdouble.ll
new file mode 100644
index 0000000..492d079
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/asdouble.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x double> @test_asdouble(
+; CHECK-SCALAR-COUNT-17: call double @dx.op.makeDouble.f64(i32 101, i32 {{.*}}, i32 {{.*}})
+; CHECK-VECTOR: call <17 x double> @llvm.dx.asdouble.v17i32
+define <17 x double> @test_asdouble(<17 x i32> %a, <17 x i32> %b) {
+  %result = call <17 x double> @llvm.dx.asdouble.v17i32(<17 x i32> %a, <17 x i32> %b)
+  ret <17 x double> %result
+}
+declare <17 x double> @llvm.dx.asdouble.v17i32(<17 x i32>, <17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/ddx-coarse.ll b/llvm/test/CodeGen/DirectX/LongVector/ddx-coarse.ll
new file mode 100644
index 0000000..b7f9964
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/ddx-coarse.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_ddx_coarse(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 83, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.ddx.coarse.v17f32
+define <17 x float> @test_ddx_coarse(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.ddx.coarse.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.ddx.coarse.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/ddx-fine.ll b/llvm/test/CodeGen/DirectX/LongVector/ddx-fine.ll
new file mode 100644
index 0000000..b914b00
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/ddx-fine.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_ddx_fine(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 85, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.ddx.fine.v17f32
+define <17 x float> @test_ddx_fine(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.ddx.fine.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.ddx.fine.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/ddy-coarse.ll b/llvm/test/CodeGen/DirectX/LongVector/ddy-coarse.ll
new file mode 100644
index 0000000..6496332
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/ddy-coarse.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_ddy_coarse(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 84, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.ddy.coarse.v17f32
+define <17 x float> @test_ddy_coarse(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.ddy.coarse.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.ddy.coarse.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/ddy-fine.ll b/llvm/test/CodeGen/DirectX/LongVector/ddy-fine.ll
new file mode 100644
index 0000000..daeb1e6
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/ddy-fine.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_ddy_fine(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 86, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.ddy.fine.v17f32
+define <17 x float> @test_ddy_fine(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.ddy.fine.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.ddy.fine.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/firstbitlow.ll b/llvm/test/CodeGen/DirectX/LongVector/firstbitlow.ll
new file mode 100644
index 0000000..7bb2c5b
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/firstbitlow.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_firstbitlow(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.unaryBits.i32(i32 32, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.firstbitlow.v17i32
+define <17 x i32> @test_firstbitlow(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.firstbitlow.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.firstbitlow.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/firstbitshigh.ll b/llvm/test/CodeGen/DirectX/LongVector/firstbitshigh.ll
new file mode 100644
index 0000000..2287446
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/firstbitshigh.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_firstbitshigh(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.unaryBits.i32(i32 34, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.firstbitshigh.v17i32
+define <17 x i32> @test_firstbitshigh(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.firstbitshigh.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.firstbitshigh.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/firstbituhigh.ll b/llvm/test/CodeGen/DirectX/LongVector/firstbituhigh.ll
new file mode 100644
index 0000000..c99d5d0
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/firstbituhigh.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_firstbituhigh(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.unaryBits.i32(i32 33, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.firstbituhigh.v17i32
+define <17 x i32> @test_firstbituhigh(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.firstbituhigh.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.firstbituhigh.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/frac.ll b/llvm/test/CodeGen/DirectX/LongVector/frac.ll
new file mode 100644
index 0000000..50c23a3
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/frac.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_frac(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 22, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.frac.v17f32
+define <17 x float> @test_frac(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.frac.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.frac.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/imad.ll b/llvm/test/CodeGen/DirectX/LongVector/imad.ll
new file mode 100644
index 0000000..c81dd3db
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/imad.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_imad(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.tertiary.i32(i32 48, i32 {{.*}}, i32 {{.*}}, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.imad.v17i32
+define <17 x i32> @test_imad(<17 x i32> %a, <17 x i32> %b, <17 x i32> %c) {
+  %result = call <17 x i32> @llvm.dx.imad.v17i32(<17 x i32> %a, <17 x i32> %b, <17 x i32> %c)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.imad.v17i32(<17 x i32>, <17 x i32>, <17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/isinf.ll b/llvm/test/CodeGen/DirectX/LongVector/isinf.ll
new file mode 100644
index 0000000..8ba9d47
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/isinf.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i1> @test_isinf(
+; CHECK-SCALAR-COUNT-17: call i1 @dx.op.isSpecialFloat.f32(i32 9, float {{.*}})
+; CHECK-VECTOR: call <17 x i1> @llvm.dx.isinf.v17f32
+define <17 x i1> @test_isinf(<17 x float> %a) {
+  %result = call <17 x i1> @llvm.dx.isinf.v17f32(<17 x float> %a)
+  ret <17 x i1> %result
+}
+declare <17 x i1> @llvm.dx.isinf.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/isnan.ll b/llvm/test/CodeGen/DirectX/LongVector/isnan.ll
new file mode 100644
index 0000000..2aee925
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/isnan.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i1> @test_isnan(
+; CHECK-SCALAR-COUNT-17: call i1 @dx.op.isSpecialFloat.f32(i32 8, float {{.*}})
+; CHECK-VECTOR: call <17 x i1> @llvm.dx.isnan.v17f32
+define <17 x i1> @test_isnan(<17 x float> %a) {
+  %result = call <17 x i1> @llvm.dx.isnan.v17f32(<17 x float> %a)
+  ret <17 x i1> %result
+}
+declare <17 x i1> @llvm.dx.isnan.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/legacyf16tof32.ll b/llvm/test/CodeGen/DirectX/LongVector/legacyf16tof32.ll
new file mode 100644
index 0000000..ca2c3a0
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/legacyf16tof32.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_legacyf16tof32(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.legacyF16ToF32(i32 131, i32 {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.legacyf16tof32.v17i32
+define <17 x float> @test_legacyf16tof32(<17 x i32> %a) {
+  %result = call <17 x float> @llvm.dx.legacyf16tof32.v17i32(<17 x i32> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.legacyf16tof32.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/legacyf32tof16.ll b/llvm/test/CodeGen/DirectX/LongVector/legacyf32tof16.ll
new file mode 100644
index 0000000..3ac6d7b
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/legacyf32tof16.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_legacyf32tof16(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.legacyF32ToF16(i32 130, float {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.legacyf32tof16.v17f32
+define <17 x i32> @test_legacyf32tof16(<17 x float> %a) {
+  %result = call <17 x i32> @llvm.dx.legacyf32tof16.v17f32(<17 x float> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.legacyf32tof16.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-diagonal.ll b/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-diagonal.ll
new file mode 100644
index 0000000..d5f0c8b
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-diagonal.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_quad_read_across_diagonal(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.quadOp.i32(i32 123, i32 {{.*}}, i8 2)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.quad.read.across.diagonal.v17i32
+define <17 x i32> @test_quad_read_across_diagonal(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.quad.read.across.diagonal.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.quad.read.across.diagonal.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-x.ll b/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-x.ll
new file mode 100644
index 0000000..c198e3a
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-x.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_quad_read_across_x(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.quadOp.i32(i32 123, i32 {{.*}}, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.quad.read.across.x.v17i32
+define <17 x i32> @test_quad_read_across_x(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.quad.read.across.x.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.quad.read.across.x.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-y.ll b/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-y.ll
new file mode 100644
index 0000000..f488500
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/quad-read-across-y.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_quad_read_across_y(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.quadOp.i32(i32 123, i32 {{.*}}, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.quad.read.across.y.v17i32
+define <17 x i32> @test_quad_read_across_y(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.quad.read.across.y.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.quad.read.across.y.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/rsqrt.ll b/llvm/test/CodeGen/DirectX/LongVector/rsqrt.ll
new file mode 100644
index 0000000..b78aefa
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/rsqrt.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_rsqrt(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 25, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.rsqrt.v17f32
+define <17 x float> @test_rsqrt(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.rsqrt.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.rsqrt.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/saturate.ll b/llvm/test/CodeGen/DirectX/LongVector/saturate.ll
new file mode 100644
index 0000000..a2db511
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/saturate.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x float> @test_saturate(
+; CHECK-SCALAR-COUNT-17: call float @dx.op.unary.f32(i32 7, float {{.*}})
+; CHECK-VECTOR: call <17 x float> @llvm.dx.saturate.v17f32
+define <17 x float> @test_saturate(<17 x float> %a) {
+  %result = call <17 x float> @llvm.dx.saturate.v17f32(<17 x float> %a)
+  ret <17 x float> %result
+}
+declare <17 x float> @llvm.dx.saturate.v17f32(<17 x float>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/umad.ll b/llvm/test/CodeGen/DirectX/LongVector/umad.ll
new file mode 100644
index 0000000..fcca2b4
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/umad.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_umad(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.tertiary.i32(i32 49, i32 {{.*}}, i32 {{.*}}, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.umad.v17i32
+define <17 x i32> @test_umad(<17 x i32> %a, <17 x i32> %b, <17 x i32> %c) {
+  %result = call <17 x i32> @llvm.dx.umad.v17i32(<17 x i32> %a, <17 x i32> %b, <17 x i32> %c)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.umad.v17i32(<17 x i32>, <17 x i32>, <17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-all-equal.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-all-equal.ll
new file mode 100644
index 0000000..7f4a351
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-all-equal.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i1> @test_wave_all_equal(
+; CHECK-SCALAR-COUNT-17: call i1 @dx.op.waveActiveAllEqual.i32(i32 115, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i1> @llvm.dx.wave.all.equal.v17i32
+define <17 x i1> @test_wave_all_equal(<17 x i32> %a) {
+  %result = call <17 x i1> @llvm.dx.wave.all.equal.v17i32(<17 x i32> %a)
+  ret <17 x i1> %result
+}
+declare <17 x i1> @llvm.dx.wave.all.equal.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-product.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-product.ll
new file mode 100644
index 0000000..5dc62ab
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-product.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_prefix_product(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 {{.*}}, i8 1, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.prefix.product.v17i32
+define <17 x i32> @test_wave_prefix_product(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.prefix.product.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.prefix.product.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-sum.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-sum.ll
new file mode 100644
index 0000000..4ed4d5e
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-sum.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_prefix_sum(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 {{.*}}, i8 0, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.prefix.sum.v17i32
+define <17 x i32> @test_wave_prefix_sum(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.prefix.sum.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.prefix.sum.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-uproduct.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-uproduct.ll
new file mode 100644
index 0000000..93fe585
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-uproduct.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_prefix_uproduct(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 {{.*}}, i8 1, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.prefix.uproduct.v17i32
+define <17 x i32> @test_wave_prefix_uproduct(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.prefix.uproduct.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.prefix.uproduct.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-usum.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-usum.ll
new file mode 100644
index 0000000..e534c60
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-prefix-usum.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_prefix_usum(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.wavePrefixOp.i32(i32 121, i32 {{.*}}, i8 0, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.prefix.usum.v17i32
+define <17 x i32> @test_wave_prefix_usum(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.prefix.usum.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.prefix.usum.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-product.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-product.ll
new file mode 100644
index 0000000..0726d01
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-product.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_product(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 1, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.product.v17i32
+define <17 x i32> @test_wave_product(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.product.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.product.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-readlane.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-readlane.ll
new file mode 100644
index 0000000..a07cfc8
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-readlane.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_readlane(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveReadLaneAt.i32(i32 117, i32 {{.*}}, i32 {{.*}})
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.readlane.v17i32
+define <17 x i32> @test_wave_readlane(<17 x i32> %a, i32 %lane) {
+  %result = call <17 x i32> @llvm.dx.wave.readlane.v17i32(<17 x i32> %a, i32 %lane)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.readlane.v17i32(<17 x i32>, i32)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-and.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-and.ll
new file mode 100644
index 0000000..6dbad35
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-and.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_and(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveBit.i32(i32 120, i32 {{.*}}, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.and.v17i32
+define <17 x i32> @test_wave_reduce_and(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.and.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.and.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-max.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-max.ll
new file mode 100644
index 0000000..ef9adc1
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-max.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_max(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 3, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.max.v17i32
+define <17 x i32> @test_wave_reduce_max(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.max.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.max.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-min.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-min.ll
new file mode 100644
index 0000000..cff85cf
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-min.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_min(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 2, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.min.v17i32
+define <17 x i32> @test_wave_reduce_min(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.min.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.min.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-or.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-or.ll
new file mode 100644
index 0000000..fbc0e1e
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-or.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_or(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveBit.i32(i32 120, i32 {{.*}}, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.or.v17i32
+define <17 x i32> @test_wave_reduce_or(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.or.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.or.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-sum.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-sum.ll
new file mode 100644
index 0000000..d6c1180
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-sum.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_sum(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 0, i8 0)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.sum.v17i32
+define <17 x i32> @test_wave_reduce_sum(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.sum.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.sum.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-umax.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-umax.ll
new file mode 100644
index 0000000..e13ec89
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-umax.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_umax(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 3, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.umax.v17i32
+define <17 x i32> @test_wave_reduce_umax(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.umax.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.umax.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-umin.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-umin.ll
new file mode 100644
index 0000000..fb011d2
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-umin.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_umin(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 2, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.umin.v17i32
+define <17 x i32> @test_wave_reduce_umin(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.umin.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.umin.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-usum.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-usum.ll
new file mode 100644
index 0000000..426bf4b
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-usum.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_usum(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 0, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.usum.v17i32
+define <17 x i32> @test_wave_reduce_usum(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.usum.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.usum.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-xor.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-xor.ll
new file mode 100644
index 0000000..43c9ea2
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-reduce-xor.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_reduce_xor(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveBit.i32(i32 120, i32 {{.*}}, i8 2)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.reduce.xor.v17i32
+define <17 x i32> @test_wave_reduce_xor(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.reduce.xor.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.reduce.xor.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/LongVector/wave-uproduct.ll b/llvm/test/CodeGen/DirectX/LongVector/wave-uproduct.ll
new file mode 100644
index 0000000..04ccf57
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/LongVector/wave-uproduct.ll

@@ -0,0 +1,11 @@
+; RUN: llc -mtriple=dxil-pc-shadermodel6.8-library -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR
+; RUN: llc -mtriple=dxil-pc-shadermodel6.9-library -stop-before=dxil-op-lower -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR
+
+; CHECK-LABEL: define <17 x i32> @test_wave_uproduct(
+; CHECK-SCALAR-COUNT-17: call i32 @dx.op.waveActiveOp.i32(i32 119, i32 {{.*}}, i8 1, i8 1)
+; CHECK-VECTOR: call <17 x i32> @llvm.dx.wave.uproduct.v17i32
+define <17 x i32> @test_wave_uproduct(<17 x i32> %a) {
+  %result = call <17 x i32> @llvm.dx.wave.uproduct.v17i32(<17 x i32> %a)
+  ret <17 x i32> %result
+}
+declare <17 x i32> @llvm.dx.wave.uproduct.v17i32(<17 x i32>)

diff --git a/llvm/test/CodeGen/DirectX/llc-pipeline.ll b/llvm/test/CodeGen/DirectX/llc-pipeline.ll
index f575a9f..673df81 100644
--- a/llvm/test/CodeGen/DirectX/llc-pipeline.ll
+++ b/llvm/test/CodeGen/DirectX/llc-pipeline.ll

@@ -1,15 +1,16 @@
-; RUN: llc -filetype=asm -mtriple=dxil-pc-shadermodel6.3-library -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-ASM
-; RUN: llc -filetype=asm -mtriple=dxil-pc-shadermodel6.3-library -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-O1,CHECK-ASM
-; RUN: llc -filetype=obj -mtriple=dxil-pc-shadermodel6.3-library -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-OBJ
-; RUN: llc -filetype=obj -mtriple=dxil-pc-shadermodel6.3-library -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-O1,CHECK-OBJ
+; RUN: llc -filetype=asm -mtriple=dxil-pc-shadermodel6.3-library -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR,CHECK-ASM
+; RUN: llc -filetype=asm -mtriple=dxil-pc-shadermodel6.3-library -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR,CHECK-O1,CHECK-ASM
+; RUN: llc -filetype=asm -mtriple=dxil-pc-shadermodel6.9-library -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-VECTOR,CHECK-ASM
+; RUN: llc -filetype=obj -mtriple=dxil-pc-shadermodel6.3-library -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR,CHECK-OBJ
+; RUN: llc -filetype=obj -mtriple=dxil-pc-shadermodel6.3-library -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 | grep -v "Verify generated machine code" | FileCheck %s --check-prefixes=CHECK,CHECK-SCALAR,CHECK-O1,CHECK-OBJ
 
 ; REQUIRES: asserts
 
 ; CHECK-LABEL: Pass Arguments:
 ; CHECK-NEXT: Target Library Information
 ; CHECK-NEXT: Runtime Library Function Analysis
-; CHECK-NEXT: DXIL Resource Type Analysis
 ; CHECK-NEXT: Target Transform Information
+; CHECK-NEXT: DXIL Resource Type Analysis
 ; CHECK-O1-NEXT: Assumption Cache Tracker
 ; CHECK-OBJ-NEXT: Machine Module Information
 ; CHECK-OBJ-NEXT: Machine Branch Probability Analysis
@@ -27,9 +28,10 @@
 ; CHECK-NEXT:     DXIL Resource Access
 ; CHECK-NEXT:   DXIL Intrinsic Expansion
 ; CHECK-NEXT:   DXIL Data Scalarization
-; CHECK-NEXT:   FunctionPass Manager
-; CHECK-NEXT:     Dominator Tree Construction
-; CHECK-NEXT:     Scalarize vector operations
+; CHECK-SCALAR-NEXT: FunctionPass Manager
+; CHECK-SCALAR-NEXT:   Dominator Tree Construction
+; CHECK-SCALAR-NEXT:   Scalarize vector operations
+; CHECK-VECTOR-NOT:  Scalarize vector operations
 ; CHECK-NEXT:   DXIL Array Flattener
 ; CHECK-NEXT:   FunctionPass Manager
 ; CHECK-NEXT:     Dominator Tree Construction