| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6 |
| ; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -mattr=+ptx42 | FileCheck %s |
| ; RUN: %if ptxas-sm_20 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify -arch=sm_20 %} |
| |
| define float @add_sat_f32(float %a, float %b) { |
| ; CHECK-LABEL: add_sat_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<11>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [add_sat_f32_param_0]; |
| ; CHECK-NEXT: ld.param.b32 %r2, [add_sat_f32_param_1]; |
| ; CHECK-NEXT: add.rn.sat.f32 %r3, %r1, %r2; |
| ; CHECK-NEXT: add.rn.sat.ftz.f32 %r4, %r1, %r3; |
| ; CHECK-NEXT: add.rz.sat.f32 %r5, %r1, %r4; |
| ; CHECK-NEXT: add.rz.sat.ftz.f32 %r6, %r1, %r5; |
| ; CHECK-NEXT: add.rm.sat.f32 %r7, %r1, %r6; |
| ; CHECK-NEXT: add.rm.sat.ftz.f32 %r8, %r1, %r7; |
| ; CHECK-NEXT: add.rp.sat.f32 %r9, %r1, %r8; |
| ; CHECK-NEXT: add.rp.sat.ftz.f32 %r10, %r1, %r9; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r10; |
| ; CHECK-NEXT: ret; |
| %r1 = call float @llvm.nvvm.add.rn.sat.f(float %a, float %b) |
| %r2 = call float @llvm.nvvm.add.rn.ftz.sat.f(float %a, float %r1) |
| |
| %r3 = call float @llvm.nvvm.add.rz.sat.f(float %a, float %r2) |
| %r4 = call float @llvm.nvvm.add.rz.ftz.sat.f(float %a, float %r3) |
| |
| %r5 = call float @llvm.nvvm.add.rm.sat.f(float %a, float %r4) |
| %r6 = call float @llvm.nvvm.add.rm.ftz.sat.f(float %a, float %r5) |
| |
| %r7 = call float @llvm.nvvm.add.rp.sat.f(float %a, float %r6) |
| %r8 = call float @llvm.nvvm.add.rp.ftz.sat.f(float %a, float %r7) |
| |
| ret float %r8 |
| } |
| |
| define float @sub_sat_f32(float %a, float %b) { |
| ; CHECK-LABEL: sub_sat_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<11>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [sub_sat_f32_param_0]; |
| ; CHECK-NEXT: ld.param.b32 %r2, [sub_sat_f32_param_1]; |
| ; CHECK-NEXT: sub.rn.sat.f32 %r3, %r1, %r2; |
| ; CHECK-NEXT: sub.rn.sat.ftz.f32 %r4, %r1, %r3; |
| ; CHECK-NEXT: sub.rz.sat.f32 %r5, %r1, %r4; |
| ; CHECK-NEXT: sub.rz.sat.ftz.f32 %r6, %r1, %r5; |
| ; CHECK-NEXT: sub.rm.sat.f32 %r7, %r1, %r6; |
| ; CHECK-NEXT: sub.rm.sat.ftz.f32 %r8, %r1, %r7; |
| ; CHECK-NEXT: sub.rp.sat.f32 %r9, %r1, %r8; |
| ; CHECK-NEXT: sub.rp.sat.ftz.f32 %r10, %r1, %r9; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r10; |
| ; CHECK-NEXT: ret; |
| %f0 = fneg float %b |
| %r1 = call float @llvm.nvvm.add.rn.sat.f(float %a, float %f0) |
| |
| %f1 = fneg float %r1 |
| %r2 = call float @llvm.nvvm.add.rn.ftz.sat.f(float %a, float %f1) |
| |
| %f2 = fneg float %r2 |
| %r3 = call float @llvm.nvvm.add.rz.sat.f(float %a, float %f2) |
| |
| %f3 = fneg float %r3 |
| %r4 = call float @llvm.nvvm.add.rz.ftz.sat.f(float %a, float %f3) |
| |
| %f4 = fneg float %r4 |
| %r5 = call float @llvm.nvvm.add.rm.sat.f(float %a, float %f4) |
| |
| %f5 = fneg float %r5 |
| %r6 = call float @llvm.nvvm.add.rm.ftz.sat.f(float %a, float %f5) |
| |
| %f6 = fneg float %r6 |
| %r7 = call float @llvm.nvvm.add.rp.sat.f(float %a, float %f6) |
| |
| %f7 = fneg float %r7 |
| %r8 = call float @llvm.nvvm.add.rp.ftz.sat.f(float %a, float %f7) |
| |
| ret float %r8 |
| } |
| |
| define float @fma_sat_f32(float %a, float %b, float %c) { |
| ; CHECK-LABEL: fma_sat_f32( |
| ; CHECK: { |
| ; CHECK-NEXT: .reg .b32 %r<12>; |
| ; CHECK-EMPTY: |
| ; CHECK-NEXT: // %bb.0: |
| ; CHECK-NEXT: ld.param.b32 %r1, [fma_sat_f32_param_0]; |
| ; CHECK-NEXT: ld.param.b32 %r2, [fma_sat_f32_param_1]; |
| ; CHECK-NEXT: ld.param.b32 %r3, [fma_sat_f32_param_2]; |
| ; CHECK-NEXT: fma.rn.sat.f32 %r4, %r1, %r2, %r3; |
| ; CHECK-NEXT: fma.rn.ftz.sat.f32 %r5, %r1, %r2, %r4; |
| ; CHECK-NEXT: fma.rz.sat.f32 %r6, %r1, %r2, %r5; |
| ; CHECK-NEXT: fma.rz.ftz.sat.f32 %r7, %r1, %r2, %r6; |
| ; CHECK-NEXT: fma.rm.sat.f32 %r8, %r1, %r2, %r7; |
| ; CHECK-NEXT: fma.rm.ftz.sat.f32 %r9, %r1, %r2, %r8; |
| ; CHECK-NEXT: fma.rp.sat.f32 %r10, %r1, %r2, %r9; |
| ; CHECK-NEXT: fma.rp.ftz.sat.f32 %r11, %r1, %r2, %r10; |
| ; CHECK-NEXT: st.param.b32 [func_retval0], %r11; |
| ; CHECK-NEXT: ret; |
| %r1 = call float @llvm.nvvm.fma.rn.sat.f(float %a, float %b, float %c) |
| %r2 = call float @llvm.nvvm.fma.rn.ftz.sat.f(float %a, float %b, float %r1) |
| |
| %r3 = call float @llvm.nvvm.fma.rz.sat.f(float %a, float %b, float %r2) |
| %r4 = call float @llvm.nvvm.fma.rz.ftz.sat.f(float %a, float %b, float %r3) |
| |
| %r5 = call float @llvm.nvvm.fma.rm.sat.f(float %a, float %b, float %r4) |
| %r6 = call float @llvm.nvvm.fma.rm.ftz.sat.f(float %a, float %b, float %r5) |
| |
| %r7 = call float @llvm.nvvm.fma.rp.sat.f(float %a, float %b, float %r6) |
| %r8 = call float @llvm.nvvm.fma.rp.ftz.sat.f(float %a, float %b, float %r7) |
| |
| ret float %r8 |
| } |