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llvm/llvm-project/f1f5d9c88e9cba37ae033581be49d4ea202df24a/./llvm/test/CodeGen/AMDGPU/fptrunc.ll
blob: 95f97043ab5de2900d05526919cdcc358d0a7075 [file]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefixes=SI %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI-SDAG,VI-SAFE-SDAG %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=1 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI-GISEL,VI-SAFE-GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=tonga -global-isel=0 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=VI-SDAG,VI-UNSAFE-SDAG %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -global-isel=0 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX10-SDAG,GFX10-SAFE-SDAG %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -global-isel=1 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX10-GISEL,GFX10-SAFE-GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -global-isel=0 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX10-SDAG,GFX10-UNSAFE-SDAG %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-SDAG,GFX11-SAFE-SDAG %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global < %s | FileCheck -check-prefixes=GFX11-GISEL,GFX11-SAFE-GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global,+real-true16 < %s | FileCheck -check-prefixes=GFX11-SDAG,GFX11-UNSAFE-SDAG-TRUE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=0 -mattr=-flat-for-global,-real-true16 < %s | FileCheck -check-prefixes=GFX11-SDAG,GFX11-UNSAFE-SDAG-FAKE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global,+real-true16 < %s | FileCheck -check-prefixes=GFX11-GISEL,GFX11-UNSAFE-GISEL-TRUE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -global-isel=1 -mattr=-flat-for-global,-real-true16 < %s | FileCheck -check-prefixes=GFX11-GISEL,GFX11-UNSAFE-GISEL-FAKE16 %s
define amdgpu_kernel void @fptrunc_f64_to_f32(ptr addrspace(1) %out, double %in) {
; SI-LABEL: fptrunc_f64_to_f32:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_f64_to_f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s6, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; VI-SDAG-NEXT: s_mov_b32 s4, s0
; VI-SDAG-NEXT: s_mov_b32 s5, s1
; VI-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_f64_to_f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_f64_to_f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_f64_to_f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_f64_to_f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_f64_to_f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc double %in to float
store float %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_f64_to_f32_afn(ptr addrspace(1) %out, double %in) {
; SI-LABEL: fptrunc_f64_to_f32_afn:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_f64_to_f32_afn:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s6, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; VI-SDAG-NEXT: s_mov_b32 s4, s0
; VI-SDAG-NEXT: s_mov_b32 s5, s1
; VI-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_f64_to_f32_afn:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_f64_to_f32_afn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_f64_to_f32_afn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_f64_to_f32_afn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_f64_to_f32_afn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: buffer_store_b32 v0, off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc afn double %in to float
store float %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_f64_to_f16(ptr addrspace(1) %out, double %in) {
; SI-LABEL: fptrunc_f64_to_f16:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_movk_i32 s2, 0x7e00
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s0, s7, 8
; SI-NEXT: s_and_b32 s1, s7, 0x1ff
; SI-NEXT: s_and_b32 s8, s0, 0xffe
; SI-NEXT: s_or_b32 s0, s1, s6
; SI-NEXT: s_cselect_b64 s[0:1], -1, 0
; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[0:1]
; SI-NEXT: s_bfe_u32 s0, s7, 0xb0014
; SI-NEXT: v_readfirstlane_b32 s1, v0
; SI-NEXT: s_sub_i32 s6, 0x3f1, s0
; SI-NEXT: s_or_b32 s1, s8, s1
; SI-NEXT: v_med3_i32 v0, s6, 0, 13
; SI-NEXT: s_or_b32 s6, s1, 0x1000
; SI-NEXT: v_readfirstlane_b32 s8, v0
; SI-NEXT: s_lshr_b32 s9, s6, s8
; SI-NEXT: s_lshl_b32 s8, s9, s8
; SI-NEXT: s_cmp_lg_u32 s8, s6
; SI-NEXT: s_cselect_b32 s6, 1, 0
; SI-NEXT: s_addk_i32 s0, 0xfc10
; SI-NEXT: s_or_b32 s6, s9, s6
; SI-NEXT: s_lshl_b32 s8, s0, 12
; SI-NEXT: s_or_b32 s8, s1, s8
; SI-NEXT: s_cmp_lt_i32 s0, 1
; SI-NEXT: s_cselect_b32 s6, s6, s8
; SI-NEXT: s_and_b32 s8, s6, 7
; SI-NEXT: s_cmp_gt_i32 s8, 5
; SI-NEXT: s_cselect_b32 s9, 1, 0
; SI-NEXT: s_cmp_eq_u32 s8, 3
; SI-NEXT: s_cselect_b32 s8, 1, 0
; SI-NEXT: s_lshr_b32 s6, s6, 2
; SI-NEXT: s_or_b32 s8, s8, s9
; SI-NEXT: s_add_i32 s6, s6, s8
; SI-NEXT: s_cmp_lt_i32 s0, 31
; SI-NEXT: s_cselect_b32 s6, s6, 0x7c00
; SI-NEXT: s_cmp_lg_u32 s1, 0
; SI-NEXT: s_cselect_b32 s1, s2, 0x7c00
; SI-NEXT: s_cmpk_eq_i32 s0, 0x40f
; SI-NEXT: s_cselect_b32 s0, s1, s6
; SI-NEXT: s_lshr_b32 s1, s7, 16
; SI-NEXT: s_and_b32 s1, s1, 0x8000
; SI-NEXT: s_or_b32 s6, s1, s0
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_mov_b32 s0, s4
; SI-NEXT: s_mov_b32 s1, s5
; SI-NEXT: v_mov_b32_e32 v0, s6
; SI-NEXT: buffer_store_short v0, off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_f64_to_f16:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s2, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: s_mov_b32 s0, s4
; VI-SDAG-NEXT: s_lshr_b32 s4, s7, 8
; VI-SDAG-NEXT: s_and_b32 s8, s4, 0xffe
; VI-SDAG-NEXT: s_and_b32 s4, s7, 0x1ff
; VI-SDAG-NEXT: s_or_b32 s4, s4, s6
; VI-SDAG-NEXT: s_mov_b32 s1, s5
; VI-SDAG-NEXT: s_cselect_b64 s[4:5], -1, 0
; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]
; VI-SDAG-NEXT: v_readfirstlane_b32 s4, v0
; VI-SDAG-NEXT: s_bfe_u32 s6, s7, 0xb0014
; VI-SDAG-NEXT: s_or_b32 s4, s8, s4
; VI-SDAG-NEXT: s_sub_i32 s8, 0x3f1, s6
; VI-SDAG-NEXT: v_med3_i32 v0, s8, 0, 13
; VI-SDAG-NEXT: s_or_b32 s5, s4, 0x1000
; VI-SDAG-NEXT: v_readfirstlane_b32 s8, v0
; VI-SDAG-NEXT: s_lshr_b32 s9, s5, s8
; VI-SDAG-NEXT: s_lshl_b32 s8, s9, s8
; VI-SDAG-NEXT: s_cmp_lg_u32 s8, s5
; VI-SDAG-NEXT: s_cselect_b32 s5, 1, 0
; VI-SDAG-NEXT: s_addk_i32 s6, 0xfc10
; VI-SDAG-NEXT: s_lshl_b32 s8, s6, 12
; VI-SDAG-NEXT: s_or_b32 s5, s9, s5
; VI-SDAG-NEXT: s_or_b32 s8, s4, s8
; VI-SDAG-NEXT: s_cmp_lt_i32 s6, 1
; VI-SDAG-NEXT: s_cselect_b32 s5, s5, s8
; VI-SDAG-NEXT: s_and_b32 s8, s5, 7
; VI-SDAG-NEXT: s_cmp_gt_i32 s8, 5
; VI-SDAG-NEXT: s_cselect_b32 s9, 1, 0
; VI-SDAG-NEXT: s_cmp_eq_u32 s8, 3
; VI-SDAG-NEXT: s_cselect_b32 s8, 1, 0
; VI-SDAG-NEXT: s_or_b32 s8, s8, s9
; VI-SDAG-NEXT: s_lshr_b32 s5, s5, 2
; VI-SDAG-NEXT: s_add_i32 s5, s5, s8
; VI-SDAG-NEXT: s_cmp_lt_i32 s6, 31
; VI-SDAG-NEXT: s_cselect_b32 s5, s5, 0x7c00
; VI-SDAG-NEXT: s_cmp_lg_u32 s4, 0
; VI-SDAG-NEXT: s_movk_i32 s4, 0x7e00
; VI-SDAG-NEXT: s_cselect_b32 s4, s4, 0x7c00
; VI-SDAG-NEXT: s_cmpk_eq_i32 s6, 0x40f
; VI-SDAG-NEXT: s_cselect_b32 s4, s4, s5
; VI-SDAG-NEXT: s_lshr_b32 s5, s7, 16
; VI-SDAG-NEXT: s_and_b32 s5, s5, 0x8000
; VI-SDAG-NEXT: s_or_b32 s4, s5, s4
; VI-SDAG-NEXT: v_mov_b32_e32 v0, s4
; VI-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_f64_to_f16:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: s_bfe_u32 s4, s3, 0xb0014
; VI-GISEL-NEXT: s_lshr_b32 s5, s3, 8
; VI-GISEL-NEXT: s_and_b32 s6, s3, 0x1ff
; VI-GISEL-NEXT: s_addk_i32 s4, 0xfc10
; VI-GISEL-NEXT: s_and_b32 s5, s5, 0xffe
; VI-GISEL-NEXT: s_or_b32 s2, s6, s2
; VI-GISEL-NEXT: s_cselect_b32 s2, 1, 0
; VI-GISEL-NEXT: s_or_b32 s2, s5, s2
; VI-GISEL-NEXT: s_cselect_b32 s5, 1, 0
; VI-GISEL-NEXT: s_sub_i32 s7, 1, s4
; VI-GISEL-NEXT: s_lshl_b32 s6, s4, 12
; VI-GISEL-NEXT: s_max_i32 s7, s7, 0
; VI-GISEL-NEXT: s_or_b32 s6, s2, s6
; VI-GISEL-NEXT: s_min_i32 s7, s7, 13
; VI-GISEL-NEXT: s_bitset1_b32 s2, 12
; VI-GISEL-NEXT: s_lshl_b32 s5, s5, 9
; VI-GISEL-NEXT: s_lshr_b32 s8, s2, s7
; VI-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00
; VI-GISEL-NEXT: s_lshl_b32 s7, s8, s7
; VI-GISEL-NEXT: s_cmp_lg_u32 s7, s2
; VI-GISEL-NEXT: s_cselect_b32 s2, 1, 0
; VI-GISEL-NEXT: s_or_b32 s2, s8, s2
; VI-GISEL-NEXT: s_cmp_lt_i32 s4, 1
; VI-GISEL-NEXT: s_cselect_b32 s2, s2, s6
; VI-GISEL-NEXT: s_and_b32 s6, s2, 7
; VI-GISEL-NEXT: s_lshr_b32 s2, s2, 2
; VI-GISEL-NEXT: s_cmp_eq_u32 s6, 3
; VI-GISEL-NEXT: s_cselect_b32 s7, 1, 0
; VI-GISEL-NEXT: s_cmp_gt_i32 s6, 5
; VI-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; VI-GISEL-NEXT: s_or_b32 s6, s7, s6
; VI-GISEL-NEXT: s_cmp_lg_u32 s6, 0
; VI-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; VI-GISEL-NEXT: s_add_i32 s2, s2, s6
; VI-GISEL-NEXT: s_cmp_gt_i32 s4, 30
; VI-GISEL-NEXT: s_cselect_b32 s2, 0x7c00, s2
; VI-GISEL-NEXT: s_cmpk_eq_i32 s4, 0x40f
; VI-GISEL-NEXT: s_cselect_b32 s2, s5, s2
; VI-GISEL-NEXT: s_lshr_b32 s3, s3, 16
; VI-GISEL-NEXT: s_and_b32 s3, s3, 0x8000
; VI-GISEL-NEXT: s_or_b32 s2, s3, s2
; VI-GISEL-NEXT: v_mov_b32_e32 v0, s2
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_f64_to_f16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: s_lshr_b32 s4, s3, 8
; GFX10-SDAG-NEXT: s_and_b32 s5, s3, 0x1ff
; GFX10-SDAG-NEXT: s_and_b32 s4, s4, 0xffe
; GFX10-SDAG-NEXT: s_or_b32 s2, s5, s2
; GFX10-SDAG-NEXT: s_cselect_b32 s2, -1, 0
; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s2
; GFX10-SDAG-NEXT: s_bfe_u32 s2, s3, 0xb0014
; GFX10-SDAG-NEXT: s_sub_i32 s5, 0x3f1, s2
; GFX10-SDAG-NEXT: v_med3_i32 v1, s5, 0, 13
; GFX10-SDAG-NEXT: v_readfirstlane_b32 s5, v0
; GFX10-SDAG-NEXT: v_readfirstlane_b32 s6, v1
; GFX10-SDAG-NEXT: s_or_b32 s4, s4, s5
; GFX10-SDAG-NEXT: s_or_b32 s5, s4, 0x1000
; GFX10-SDAG-NEXT: s_lshr_b32 s7, s5, s6
; GFX10-SDAG-NEXT: s_lshl_b32 s6, s7, s6
; GFX10-SDAG-NEXT: s_cmp_lg_u32 s6, s5
; GFX10-SDAG-NEXT: s_cselect_b32 s5, 1, 0
; GFX10-SDAG-NEXT: s_addk_i32 s2, 0xfc10
; GFX10-SDAG-NEXT: s_or_b32 s5, s7, s5
; GFX10-SDAG-NEXT: s_lshl_b32 s6, s2, 12
; GFX10-SDAG-NEXT: s_or_b32 s6, s4, s6
; GFX10-SDAG-NEXT: s_cmp_lt_i32 s2, 1
; GFX10-SDAG-NEXT: s_cselect_b32 s5, s5, s6
; GFX10-SDAG-NEXT: s_and_b32 s6, s5, 7
; GFX10-SDAG-NEXT: s_cmp_gt_i32 s6, 5
; GFX10-SDAG-NEXT: s_cselect_b32 s7, 1, 0
; GFX10-SDAG-NEXT: s_cmp_eq_u32 s6, 3
; GFX10-SDAG-NEXT: s_cselect_b32 s6, 1, 0
; GFX10-SDAG-NEXT: s_lshr_b32 s5, s5, 2
; GFX10-SDAG-NEXT: s_or_b32 s6, s6, s7
; GFX10-SDAG-NEXT: s_add_i32 s5, s5, s6
; GFX10-SDAG-NEXT: s_cmp_lt_i32 s2, 31
; GFX10-SDAG-NEXT: s_movk_i32 s6, 0x7e00
; GFX10-SDAG-NEXT: s_cselect_b32 s5, s5, 0x7c00
; GFX10-SDAG-NEXT: s_cmp_lg_u32 s4, 0
; GFX10-SDAG-NEXT: s_cselect_b32 s4, s6, 0x7c00
; GFX10-SDAG-NEXT: s_cmpk_eq_i32 s2, 0x40f
; GFX10-SDAG-NEXT: s_cselect_b32 s2, s4, s5
; GFX10-SDAG-NEXT: s_lshr_b32 s3, s3, 16
; GFX10-SDAG-NEXT: s_and_b32 s3, s3, 0x8000
; GFX10-SDAG-NEXT: s_or_b32 s2, s3, s2
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_f64_to_f16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: s_bfe_u32 s4, s3, 0xb0014
; GFX10-GISEL-NEXT: s_lshr_b32 s5, s3, 8
; GFX10-GISEL-NEXT: s_and_b32 s6, s3, 0x1ff
; GFX10-GISEL-NEXT: s_addk_i32 s4, 0xfc10
; GFX10-GISEL-NEXT: s_and_b32 s5, s5, 0xffe
; GFX10-GISEL-NEXT: s_or_b32 s2, s6, s2
; GFX10-GISEL-NEXT: s_cselect_b32 s2, 1, 0
; GFX10-GISEL-NEXT: s_or_b32 s2, s5, s2
; GFX10-GISEL-NEXT: s_cselect_b32 s5, 1, 0
; GFX10-GISEL-NEXT: s_sub_i32 s6, 1, s4
; GFX10-GISEL-NEXT: s_or_b32 s8, s2, 0x1000
; GFX10-GISEL-NEXT: s_max_i32 s6, s6, 0
; GFX10-GISEL-NEXT: s_lshl_b32 s7, s4, 12
; GFX10-GISEL-NEXT: s_min_i32 s6, s6, 13
; GFX10-GISEL-NEXT: s_lshl_b32 s5, s5, 9
; GFX10-GISEL-NEXT: s_lshr_b32 s9, s8, s6
; GFX10-GISEL-NEXT: s_or_b32 s2, s2, s7
; GFX10-GISEL-NEXT: s_lshl_b32 s6, s9, s6
; GFX10-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00
; GFX10-GISEL-NEXT: s_cmp_lg_u32 s6, s8
; GFX10-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; GFX10-GISEL-NEXT: s_or_b32 s6, s9, s6
; GFX10-GISEL-NEXT: s_cmp_lt_i32 s4, 1
; GFX10-GISEL-NEXT: s_cselect_b32 s2, s6, s2
; GFX10-GISEL-NEXT: s_and_b32 s6, s2, 7
; GFX10-GISEL-NEXT: s_lshr_b32 s2, s2, 2
; GFX10-GISEL-NEXT: s_cmp_eq_u32 s6, 3
; GFX10-GISEL-NEXT: s_cselect_b32 s7, 1, 0
; GFX10-GISEL-NEXT: s_cmp_gt_i32 s6, 5
; GFX10-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; GFX10-GISEL-NEXT: s_or_b32 s6, s7, s6
; GFX10-GISEL-NEXT: s_cmp_lg_u32 s6, 0
; GFX10-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; GFX10-GISEL-NEXT: s_add_i32 s2, s2, s6
; GFX10-GISEL-NEXT: s_cmp_gt_i32 s4, 30
; GFX10-GISEL-NEXT: s_cselect_b32 s2, 0x7c00, s2
; GFX10-GISEL-NEXT: s_cmpk_eq_i32 s4, 0x40f
; GFX10-GISEL-NEXT: s_cselect_b32 s2, s5, s2
; GFX10-GISEL-NEXT: s_lshr_b32 s3, s3, 16
; GFX10-GISEL-NEXT: s_and_b32 s3, s3, 0x8000
; GFX10-GISEL-NEXT: s_or_b32 s2, s3, s2
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s2
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_f64_to_f16:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: s_lshr_b32 s4, s3, 8
; GFX11-SDAG-NEXT: s_and_b32 s5, s3, 0x1ff
; GFX11-SDAG-NEXT: s_and_b32 s4, s4, 0xffe
; GFX11-SDAG-NEXT: s_or_b32 s2, s5, s2
; GFX11-SDAG-NEXT: s_cselect_b32 s2, -1, 0
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, s2
; GFX11-SDAG-NEXT: s_bfe_u32 s2, s3, 0xb0014
; GFX11-SDAG-NEXT: s_sub_i32 s5, 0x3f1, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT: v_med3_i32 v1, s5, 0, 13
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s5, v0
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s6, v1
; GFX11-SDAG-NEXT: s_or_b32 s4, s4, s5
; GFX11-SDAG-NEXT: s_or_b32 s5, s4, 0x1000
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_lshr_b32 s7, s5, s6
; GFX11-SDAG-NEXT: s_lshl_b32 s6, s7, s6
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_cmp_lg_u32 s6, s5
; GFX11-SDAG-NEXT: s_cselect_b32 s5, 1, 0
; GFX11-SDAG-NEXT: s_addk_i32 s2, 0xfc10
; GFX11-SDAG-NEXT: s_or_b32 s5, s7, s5
; GFX11-SDAG-NEXT: s_lshl_b32 s6, s2, 12
; GFX11-SDAG-NEXT: s_or_b32 s6, s4, s6
; GFX11-SDAG-NEXT: s_cmp_lt_i32 s2, 1
; GFX11-SDAG-NEXT: s_cselect_b32 s5, s5, s6
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_b32 s6, s5, 7
; GFX11-SDAG-NEXT: s_cmp_gt_i32 s6, 5
; GFX11-SDAG-NEXT: s_cselect_b32 s7, 1, 0
; GFX11-SDAG-NEXT: s_cmp_eq_u32 s6, 3
; GFX11-SDAG-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-SDAG-NEXT: s_lshr_b32 s5, s5, 2
; GFX11-SDAG-NEXT: s_or_b32 s6, s6, s7
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_add_i32 s5, s5, s6
; GFX11-SDAG-NEXT: s_cmp_lt_i32 s2, 31
; GFX11-SDAG-NEXT: s_movk_i32 s6, 0x7e00
; GFX11-SDAG-NEXT: s_cselect_b32 s5, s5, 0x7c00
; GFX11-SDAG-NEXT: s_cmp_lg_u32 s4, 0
; GFX11-SDAG-NEXT: s_cselect_b32 s4, s6, 0x7c00
; GFX11-SDAG-NEXT: s_cmpk_eq_i32 s2, 0x40f
; GFX11-SDAG-NEXT: s_cselect_b32 s2, s4, s5
; GFX11-SDAG-NEXT: s_lshr_b32 s3, s3, 16
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: s_and_b32 s3, s3, 0x8000
; GFX11-SDAG-NEXT: s_or_b32 s2, s3, s2
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s2
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-SAFE-GISEL-LABEL: fptrunc_f64_to_f16:
; GFX11-SAFE-GISEL: ; %bb.0:
; GFX11-SAFE-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SAFE-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SAFE-GISEL-NEXT: s_bfe_u32 s4, s3, 0xb0014
; GFX11-SAFE-GISEL-NEXT: s_lshr_b32 s5, s3, 8
; GFX11-SAFE-GISEL-NEXT: s_and_b32 s6, s3, 0x1ff
; GFX11-SAFE-GISEL-NEXT: s_addk_i32 s4, 0xfc10
; GFX11-SAFE-GISEL-NEXT: s_and_b32 s5, s5, 0xffe
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s2, s6, s2
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s2, s5, s2
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s5, 1, 0
; GFX11-SAFE-GISEL-NEXT: s_sub_i32 s6, 1, s4
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s8, s2, 0x1000
; GFX11-SAFE-GISEL-NEXT: s_max_i32 s6, s6, 0
; GFX11-SAFE-GISEL-NEXT: s_lshl_b32 s7, s4, 12
; GFX11-SAFE-GISEL-NEXT: s_min_i32 s6, s6, 13
; GFX11-SAFE-GISEL-NEXT: s_lshl_b32 s5, s5, 9
; GFX11-SAFE-GISEL-NEXT: s_lshr_b32 s9, s8, s6
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s2, s2, s7
; GFX11-SAFE-GISEL-NEXT: s_lshl_b32 s6, s9, s6
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s5, s5, 0x7c00
; GFX11-SAFE-GISEL-NEXT: s_cmp_lg_u32 s6, s8
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s6, s9, s6
; GFX11-SAFE-GISEL-NEXT: s_cmp_lt_i32 s4, 1
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s2, s6, s2
; GFX11-SAFE-GISEL-NEXT: s_and_b32 s6, s2, 7
; GFX11-SAFE-GISEL-NEXT: s_lshr_b32 s2, s2, 2
; GFX11-SAFE-GISEL-NEXT: s_cmp_eq_u32 s6, 3
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s7, 1, 0
; GFX11-SAFE-GISEL-NEXT: s_cmp_gt_i32 s6, 5
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s6, s7, s6
; GFX11-SAFE-GISEL-NEXT: s_cmp_lg_u32 s6, 0
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SAFE-GISEL-NEXT: s_add_i32 s2, s2, s6
; GFX11-SAFE-GISEL-NEXT: s_cmp_gt_i32 s4, 30
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s2, 0x7c00, s2
; GFX11-SAFE-GISEL-NEXT: s_cmpk_eq_i32 s4, 0x40f
; GFX11-SAFE-GISEL-NEXT: s_cselect_b32 s2, s5, s2
; GFX11-SAFE-GISEL-NEXT: s_lshr_b32 s3, s3, 16
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-SAFE-GISEL-NEXT: s_and_b32 s3, s3, 0x8000
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s2, s3, s2
; GFX11-SAFE-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SAFE-GISEL-NEXT: v_mov_b16_e32 v0.l, s2
; GFX11-SAFE-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-SAFE-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-SAFE-GISEL-NEXT: s_endpgm
;
; GFX11-UNSAFE-GISEL-TRUE16-LABEL: fptrunc_f64_to_f16:
; GFX11-UNSAFE-GISEL-TRUE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_bfe_u32 s4, s3, 0xb0014
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshr_b32 s5, s3, 8
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_and_b32 s6, s3, 0x1ff
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_addk_i32 s4, 0xfc10
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_and_b32 s5, s5, 0xffe
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s2, s6, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s2, s5, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s5, 1, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_sub_i32 s6, 1, s4
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s8, s2, 0x1000
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_max_i32 s6, s6, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshl_b32 s7, s4, 12
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_min_i32 s6, s6, 13
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshl_b32 s5, s5, 9
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshr_b32 s9, s8, s6
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s2, s2, s7
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshl_b32 s6, s9, s6
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s5, s5, 0x7c00
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s6, s8
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s6, s9, s6
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmp_lt_i32 s4, 1
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s2, s6, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_and_b32 s6, s2, 7
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshr_b32 s2, s2, 2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmp_eq_u32 s6, 3
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s7, 1, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s6, 5
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s6, s7, s6
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmp_lg_u32 s6, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_add_i32 s2, s2, s6
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmp_gt_i32 s4, 30
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s2, 0x7c00, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cmpk_eq_i32 s4, 0x40f
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_cselect_b32 s2, s5, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_and_b32 s3, s3, 0x8000
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s2, s3, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_endpgm
;
; GFX11-UNSAFE-GISEL-FAKE16-LABEL: fptrunc_f64_to_f16:
; GFX11-UNSAFE-GISEL-FAKE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_bfe_u32 s4, s3, 0xb0014
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshr_b32 s5, s3, 8
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_and_b32 s6, s3, 0x1ff
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_addk_i32 s4, 0xfc10
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_and_b32 s5, s5, 0xffe
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s2, s6, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s2, 1, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s2, s5, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s5, 1, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_sub_i32 s6, 1, s4
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s8, s2, 0x1000
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_max_i32 s6, s6, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshl_b32 s7, s4, 12
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_min_i32 s6, s6, 13
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshl_b32 s5, s5, 9
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshr_b32 s9, s8, s6
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s2, s2, s7
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshl_b32 s6, s9, s6
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s5, s5, 0x7c00
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s6, s8
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s6, s9, s6
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmp_lt_i32 s4, 1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s2, s6, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_and_b32 s6, s2, 7
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshr_b32 s2, s2, 2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmp_eq_u32 s6, 3
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s7, 1, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s6, 5
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s6, s7, s6
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmp_lg_u32 s6, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s6, 1, 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_add_i32 s2, s2, s6
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmp_gt_i32 s4, 30
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s2, 0x7c00, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cmpk_eq_i32 s4, 0x40f
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_cselect_b32 s2, s5, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_lshr_b32 s3, s3, 16
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_and_b32 s3, s3, 0x8000
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s2, s3, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_mov_b32_e32 v0, s2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_mov_b32 s2, -1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_endpgm
%result = fptrunc double %in to half
%result_i16 = bitcast half %result to i16
store i16 %result_i16, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_f64_to_f16_afn(ptr addrspace(1) %out, double %in) {
; SI-LABEL: fptrunc_f64_to_f16_afn:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s4, s0
; SI-NEXT: s_mov_b32 s5, s1
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: buffer_store_short v0, off, s[4:7], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_f64_to_f16_afn:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s2, -1
; VI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_f64_to_f16_afn:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_f64_to_f16_afn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-SDAG-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_f64_to_f16_afn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-GISEL-NEXT: buffer_store_short v0, off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SAFE-SDAG-LABEL: fptrunc_f64_to_f16_afn:
; GFX11-SAFE-SDAG: ; %bb.0:
; GFX11-SAFE-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SAFE-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SAFE-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-SAFE-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SAFE-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-SDAG-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-SAFE-SDAG-NEXT: s_endpgm
;
; GFX11-SAFE-GISEL-LABEL: fptrunc_f64_to_f16_afn:
; GFX11-SAFE-GISEL: ; %bb.0:
; GFX11-SAFE-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-SAFE-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SAFE-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-SAFE-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-SAFE-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-GISEL-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-SAFE-GISEL-NEXT: s_endpgm
;
; GFX11-UNSAFE-SDAG-TRUE16-LABEL: fptrunc_f64_to_f16_afn:
; GFX11-UNSAFE-SDAG-TRUE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_endpgm
;
; GFX11-UNSAFE-SDAG-FAKE16-LABEL: fptrunc_f64_to_f16_afn:
; GFX11-UNSAFE-SDAG-FAKE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_mov_b32 s2, -1
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_endpgm
;
; GFX11-UNSAFE-GISEL-TRUE16-LABEL: fptrunc_f64_to_f16_afn:
; GFX11-UNSAFE-GISEL-TRUE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_mov_b32 s2, -1
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_endpgm
;
; GFX11-UNSAFE-GISEL-FAKE16-LABEL: fptrunc_f64_to_f16_afn:
; GFX11-UNSAFE-GISEL-FAKE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cvt_f32_f64_e32 v0, s[2:3]
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_mov_b32 s2, -1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: buffer_store_b16 v0, off, s[0:3], 0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_endpgm
%result = fptrunc afn double %in to half
%result_i16 = bitcast half %result to i16
store i16 %result_i16, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v2f64_to_v2f32(ptr addrspace(1) %out, <2 x double> %in) {
; SI-LABEL: fptrunc_v2f64_to_v2f32:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v2f64_to_v2f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; VI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s6, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; VI-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v2f64_to_v2f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; VI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s6, -1
; VI-GISEL-NEXT: s_mov_b32 s7, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; VI-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v2f64_to_v2f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v2f64_to_v2f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v2f64_to_v2f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v2f64_to_v2f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc <2 x double> %in to <2 x float>
store <2 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v2f64_to_v2f32_afn(ptr addrspace(1) %out, <2 x double> %in) {
; SI-LABEL: fptrunc_v2f64_to_v2f32_afn:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v2f64_to_v2f32_afn:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; VI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s6, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; VI-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v2f64_to_v2f32_afn:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; VI-GISEL-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s6, -1
; VI-GISEL-NEXT: s_mov_b32 s7, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; VI-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v2f64_to_v2f32_afn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v2f64_to_v2f32_afn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v2f64_to_v2f32_afn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v2f64_to_v2f32_afn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x34
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: buffer_store_b64 v[0:1], off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc afn <2 x double> %in to <2 x float>
store <2 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v3f64_to_v3f32(ptr addrspace(1) %out, <3 x double> %in) {
; SI-LABEL: fptrunc_v3f64_to_v3f32:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x11
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x15
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; SI-NEXT: v_cvt_f32_f64_e32 v2, s[4:5]
; SI-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:8
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v3f64_to_v3f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x54
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x44
; VI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[6:7]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s6, -1
; VI-SDAG-NEXT: buffer_store_dwordx3 v[0:2], off, s[4:7], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v3f64_to_v3f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-GISEL-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v3f64_to_v3f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x54
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x44
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[6:7]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v3f64_to_v3f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-GISEL-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v3f64_to_v3f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x54
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[6:7]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: buffer_store_b96 v[0:2], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v3f64_to_v3f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b256 s[8:15], s[4:5], 0x44
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-GISEL-NEXT: buffer_store_b96 v[0:2], off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc <3 x double> %in to <3 x float>
store <3 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v3f64_to_v3f32_afn(ptr addrspace(1) %out, <3 x double> %in) {
; SI-LABEL: fptrunc_v3f64_to_v3f32_afn:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x11
; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x15
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; SI-NEXT: v_cvt_f32_f64_e32 v2, s[4:5]
; SI-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:8
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v3f64_to_v3f32_afn:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x54
; VI-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x44
; VI-SDAG-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[6:7]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; VI-SDAG-NEXT: s_mov_b32 s7, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s6, -1
; VI-SDAG-NEXT: buffer_store_dwordx3 v[0:2], off, s[4:7], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v3f64_to_v3f32_afn:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-GISEL-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v3f64_to_v3f32_afn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x54
; GFX10-SDAG-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x44
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[6:7]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v3f64_to_v3f32_afn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-GISEL-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v3f64_to_v3f32_afn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b64 s[6:7], s[4:5], 0x54
; GFX11-SDAG-NEXT: s_load_b128 s[0:3], s[4:5], 0x44
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[6:7]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[2:3]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[0:1]
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: buffer_store_b96 v[0:2], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v3f64_to_v3f32_afn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b256 s[8:15], s[4:5], 0x44
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-GISEL-NEXT: buffer_store_b96 v[0:2], off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc afn <3 x double> %in to <3 x float>
store <3 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v4f64_to_v4f32(ptr addrspace(1) %out, <4 x double> %in) {
; SI-LABEL: fptrunc_v4f64_to_v4f32:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x11
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; SI-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v4f64_to_v4f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; VI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s2, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v4f64_to_v4f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v4f64_to_v4f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v4f64_to_v4f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v4f64_to_v4f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b256 s[8:15], s[4:5], 0x44
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v4f64_to_v4f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b256 s[8:15], s[4:5], 0x44
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc <4 x double> %in to <4 x float>
store <4 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v4f64_to_v4f32_afn(ptr addrspace(1) %out, <4 x double> %in) {
; SI-LABEL: fptrunc_v4f64_to_v4f32_afn:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x11
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; SI-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v4f64_to_v4f32_afn:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; VI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s2, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v4f64_to_v4f32_afn:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v4f64_to_v4f32_afn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v4f64_to_v4f32_afn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v4f64_to_v4f32_afn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b256 s[8:15], s[4:5], 0x44
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v4f64_to_v4f32_afn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b256 s[8:15], s[4:5], 0x44
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc afn <4 x double> %in to <4 x float>
store <4 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v8f64_to_v8f32(ptr addrspace(1) %out, <8 x double> %in) {
; SI-LABEL: fptrunc_v8f64_to_v8f32:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x19
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; SI-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; SI-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; SI-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; SI-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; SI-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v8f64_to_v8f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; VI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s2, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; VI-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v8f64_to_v8f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; VI-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v8f64_to_v8f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX10-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v8f64_to_v8f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX10-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v8f64_to_v8f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], 0 offset:16
; GFX11-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v8f64_to_v8f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-GISEL-NEXT: buffer_store_b128 v[4:7], off, s[0:3], 0 offset:16
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc <8 x double> %in to <8 x float>
store <8 x float> %result, ptr addrspace(1) %out
ret void
}
define amdgpu_kernel void @fptrunc_v8f64_to_v8f32_afn(ptr addrspace(1) %out, <8 x double> %in) {
; SI-LABEL: fptrunc_v8f64_to_v8f32_afn:
; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x19
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9
; SI-NEXT: s_mov_b32 s3, 0xf000
; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; SI-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; SI-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; SI-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; SI-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; SI-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; SI-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; SI-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm
;
; VI-SDAG-LABEL: fptrunc_v8f64_to_v8f32_afn:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; VI-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-SDAG-NEXT: s_mov_b32 s3, 0xf000
; VI-SDAG-NEXT: s_mov_b32 s2, -1
; VI-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; VI-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-SDAG-NEXT: s_endpgm
;
; VI-GISEL-LABEL: fptrunc_v8f64_to_v8f32_afn:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_mov_b32 s3, 0xf000
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; VI-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; VI-GISEL-NEXT: s_endpgm
;
; GFX10-SDAG-LABEL: fptrunc_v8f64_to_v8f32_afn:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_clause 0x1
; GFX10-SDAG-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX10-SDAG-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-SDAG-NEXT: s_mov_b32 s2, -1
; GFX10-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-SDAG-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX10-SDAG-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-SDAG-NEXT: s_endpgm
;
; GFX10-GISEL-LABEL: fptrunc_v8f64_to_v8f32_afn:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_clause 0x1
; GFX10-GISEL-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x64
; GFX10-GISEL-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
; GFX10-GISEL-NEXT: s_mov_b32 s2, -1
; GFX10-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX10-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX10-GISEL-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX10-GISEL-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16
; GFX10-GISEL-NEXT: s_endpgm
;
; GFX11-SDAG-LABEL: fptrunc_v8f64_to_v8f32_afn:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
; GFX11-SDAG-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-SDAG-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-SDAG-NEXT: s_mov_b32 s2, -1
; GFX11-SDAG-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-SDAG-NEXT: s_clause 0x1
; GFX11-SDAG-NEXT: buffer_store_b128 v[4:7], off, s[0:3], 0 offset:16
; GFX11-SDAG-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-SDAG-NEXT: s_endpgm
;
; GFX11-GISEL-LABEL: fptrunc_v8f64_to_v8f32_afn:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: s_load_b512 s[8:23], s[4:5], 0x64
; GFX11-GISEL-NEXT: s_load_b64 s[0:1], s[4:5], 0x24
; GFX11-GISEL-NEXT: s_mov_b32 s2, -1
; GFX11-GISEL-NEXT: s_mov_b32 s3, 0x31016000
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, s[8:9]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, s[10:11]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v2, s[12:13]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v3, s[14:15]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v4, s[16:17]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v5, s[18:19]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v6, s[20:21]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v7, s[22:23]
; GFX11-GISEL-NEXT: s_clause 0x1
; GFX11-GISEL-NEXT: buffer_store_b128 v[0:3], off, s[0:3], 0
; GFX11-GISEL-NEXT: buffer_store_b128 v[4:7], off, s[0:3], 0 offset:16
; GFX11-GISEL-NEXT: s_endpgm
%result = fptrunc <8 x double> %in to <8 x float>
store <8 x float> %result, ptr addrspace(1) %out
ret void
}
define float @fabs_fptrunc_f64_to_f32(double %x) {
; SI-LABEL: fabs_fptrunc_f64_to_f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; SI-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_f64_to_f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_f64_to_f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_f64_to_f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_f64_to_f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: fabs_fptrunc_f64_to_f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: fabs_fptrunc_f64_to_f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc double %x to float
%a = call float @llvm.fabs.f32(float %t)
ret float %a
}
define float @fneg_fabs_fptrunc_f64_to_f32(double %x) {
; SI-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; SI-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-SDAG-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-GISEL-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-SDAG-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-GISEL-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: fneg_fabs_fptrunc_f64_to_f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_or_b32_e32 v0, 0x80000000, v0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc double %x to float
%a = call float @llvm.fabs.f32(float %t)
%n = fneg float %a
ret float %n
}
; fabs sunk through fptrunc f32 -> f16 (fabs legal on the f32 source).
define half @fabs_fptrunc_f32_to_f16(float %x) {
; SI-LABEL: fabs_fptrunc_f32_to_f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_f32_to_f16:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_f32_to_f16:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_f32_to_f16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_f32_to_f16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-SDAG-LABEL: fabs_fptrunc_f32_to_f16:
; GFX11-SAFE-SDAG: ; %bb.0:
; GFX11-SAFE-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-SDAG-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-SAFE-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-GISEL-LABEL: fabs_fptrunc_f32_to_f16:
; GFX11-SAFE-GISEL: ; %bb.0:
; GFX11-SAFE-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-GISEL-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-SAFE-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-TRUE16-LABEL: fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-SDAG-TRUE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-FAKE16-LABEL: fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-SDAG-FAKE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-TRUE16-LABEL: fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-GISEL-TRUE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-FAKE16-LABEL: fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-GISEL-FAKE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc float %x to half
%a = call half @llvm.fabs.f16(half %t)
ret half %a
}
define half @fneg_fabs_fptrunc_f32_to_f16(float %x) {
; SI-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_or_b32_e32 v0, 0xffff8000, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-SDAG-NEXT: v_or_b32_e32 v0, 0x8000, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-GISEL-NEXT: v_or_b32_e32 v0, 0x8000, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-SDAG-NEXT: v_or_b32_e32 v0, 0x8000, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-GISEL-NEXT: v_or_b32_e32 v0, 0x8000, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-SDAG-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX11-SAFE-SDAG: ; %bb.0:
; GFX11-SAFE-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-SDAG-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_or_b16 v0.l, 0x8000, v0.l
; GFX11-SAFE-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-GISEL-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX11-SAFE-GISEL: ; %bb.0:
; GFX11-SAFE-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-GISEL-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_or_b16 v0.l, 0x8000, v0.l
; GFX11-SAFE-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-TRUE16-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-SDAG-TRUE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_or_b16 v0.l, 0x8000, v0.l
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-FAKE16-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-SDAG-FAKE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_or_b32_e32 v0, 0x8000, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-TRUE16-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-GISEL-TRUE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_or_b16 v0.l, 0x8000, v0.l
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-FAKE16-LABEL: fneg_fabs_fptrunc_f32_to_f16:
; GFX11-UNSAFE-GISEL-FAKE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_or_b32_e32 v0, 0x8000, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc float %x to half
%a = call half @llvm.fabs.f16(half %t)
%n = fneg half %a
ret half %n
}
; Single fp_round f64 -> f16.
define half @fabs_fptrunc_f64_to_f16(double %x) {
; SI-LABEL: fabs_fptrunc_f64_to_f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_and_b32_e32 v2, 0x1ff, v1
; SI-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; SI-NEXT: v_bfe_u32 v1, v1, 20, 11
; SI-NEXT: s_movk_i32 s4, 0xfc10
; SI-NEXT: v_mov_b32_e32 v4, 0x7c00
; SI-NEXT: v_mov_b32_e32 v5, 0x7e00
; SI-NEXT: s_movk_i32 s5, 0x40f
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_and_b32_e32 v2, 0xffe, v3
; SI-NEXT: v_sub_i32_e32 v3, vcc, 0x3f1, v1
; SI-NEXT: v_add_i32_e32 v1, vcc, s4, v1
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; SI-NEXT: v_med3_i32 v3, v3, 0, 13
; SI-NEXT: v_lshlrev_b32_e32 v6, 12, v1
; SI-NEXT: v_or_b32_e32 v0, v2, v0
; SI-NEXT: v_or_b32_e32 v2, 0x1000, v0
; SI-NEXT: v_or_b32_e32 v6, v0, v6
; SI-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; SI-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc
; SI-NEXT: v_lshrrev_b32_e32 v5, v3, v2
; SI-NEXT: v_lshlrev_b32_e32 v3, v3, v5
; SI-NEXT: v_cmp_ne_u32_e32 vcc, v3, v2
; SI-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; SI-NEXT: v_or_b32_e32 v2, v5, v2
; SI-NEXT: v_cmp_gt_i32_e32 vcc, 1, v1
; SI-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc
; SI-NEXT: v_and_b32_e32 v3, 7, v2
; SI-NEXT: v_lshrrev_b32_e32 v2, 2, v2
; SI-NEXT: v_cmp_lt_i32_e32 vcc, 5, v3
; SI-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc
; SI-NEXT: v_cmp_eq_u32_e32 vcc, 3, v3
; SI-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; SI-NEXT: v_or_b32_e32 v3, v3, v5
; SI-NEXT: v_add_i32_e32 v2, vcc, v2, v3
; SI-NEXT: v_cmp_gt_i32_e32 vcc, 31, v1
; SI-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
; SI-NEXT: v_cmp_eq_u32_e32 vcc, s5, v1
; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
; SI-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_f64_to_f16:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_and_b32_e32 v2, 0x1ff, v1
; VI-SDAG-NEXT: v_or_b32_e32 v0, v2, v0
; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; VI-SDAG-NEXT: v_lshrrev_b32_e32 v2, 8, v1
; VI-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; VI-SDAG-NEXT: v_and_b32_e32 v2, 0xffe, v2
; VI-SDAG-NEXT: v_bfe_u32 v3, v1, 20, 11
; VI-SDAG-NEXT: v_or_b32_e32 v0, v2, v0
; VI-SDAG-NEXT: v_sub_u32_e32 v4, vcc, 0x3f1, v3
; VI-SDAG-NEXT: v_or_b32_e32 v2, 0x1000, v0
; VI-SDAG-NEXT: v_med3_i32 v4, v4, 0, 13
; VI-SDAG-NEXT: v_lshrrev_b32_e32 v5, v4, v2
; VI-SDAG-NEXT: v_lshlrev_b32_e32 v4, v4, v5
; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, v4, v2
; VI-SDAG-NEXT: s_movk_i32 s4, 0xfc10
; VI-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; VI-SDAG-NEXT: v_add_u32_e32 v3, vcc, s4, v3
; VI-SDAG-NEXT: v_lshlrev_b32_e32 v4, 12, v3
; VI-SDAG-NEXT: v_or_b32_e32 v2, v5, v2
; VI-SDAG-NEXT: v_or_b32_e32 v4, v0, v4
; VI-SDAG-NEXT: v_cmp_gt_i32_e32 vcc, 1, v3
; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
; VI-SDAG-NEXT: v_and_b32_e32 v4, 7, v2
; VI-SDAG-NEXT: v_cmp_lt_i32_e32 vcc, 5, v4
; VI-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc
; VI-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 3, v4
; VI-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc
; VI-SDAG-NEXT: v_or_b32_e32 v4, v4, v5
; VI-SDAG-NEXT: v_lshrrev_b32_e32 v2, 2, v2
; VI-SDAG-NEXT: v_add_u32_e32 v2, vcc, v2, v4
; VI-SDAG-NEXT: v_mov_b32_e32 v4, 0x7c00
; VI-SDAG-NEXT: v_cmp_gt_i32_e32 vcc, 31, v3
; VI-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc
; VI-SDAG-NEXT: v_mov_b32_e32 v5, 0x7e00
; VI-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; VI-SDAG-NEXT: s_movk_i32 s4, 0x40f
; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc
; VI-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, s4, v3
; VI-SDAG-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
; VI-SDAG-NEXT: v_mov_b32_e32 v2, 0x8000
; VI-SDAG-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-SDAG-NEXT: v_or_b32_e32 v0, v1, v0
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_f64_to_f16:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_bfe_u32 v2, v1, 20, 11
; VI-GISEL-NEXT: v_and_b32_e32 v4, 0x1ff, v1
; VI-GISEL-NEXT: v_add_u32_e32 v2, vcc, 0xfffffc10, v2
; VI-GISEL-NEXT: v_or_b32_e32 v0, v4, v0
; VI-GISEL-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; VI-GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; VI-GISEL-NEXT: v_and_b32_e32 v3, 0xffe, v3
; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; VI-GISEL-NEXT: v_or_b32_e32 v0, v3, v0
; VI-GISEL-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; VI-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; VI-GISEL-NEXT: v_lshlrev_b32_e32 v5, 12, v2
; VI-GISEL-NEXT: v_sub_u32_e32 v6, vcc, 1, v2
; VI-GISEL-NEXT: v_or_b32_e32 v5, v0, v5
; VI-GISEL-NEXT: v_med3_i32 v6, v6, 0, 13
; VI-GISEL-NEXT: v_or_b32_e32 v0, 0x1000, v0
; VI-GISEL-NEXT: v_lshrrev_b32_e32 v7, v6, v0
; VI-GISEL-NEXT: v_lshlrev_b32_e32 v6, v6, v7
; VI-GISEL-NEXT: v_cmp_ne_u32_e32 vcc, v6, v0
; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; VI-GISEL-NEXT: v_or_b32_e32 v0, v7, v0
; VI-GISEL-NEXT: v_cmp_gt_i32_e32 vcc, 1, v2
; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc
; VI-GISEL-NEXT: v_and_b32_e32 v5, 7, v0
; VI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 3, v5
; VI-GISEL-NEXT: v_cmp_lt_i32_e64 s[4:5], 5, v5
; VI-GISEL-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
; VI-GISEL-NEXT: v_lshrrev_b32_e32 v0, 2, v0
; VI-GISEL-NEXT: v_cndmask_b32_e64 v5, 0, 1, s[4:5]
; VI-GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v5
; VI-GISEL-NEXT: v_mov_b32_e32 v4, 0x7c00
; VI-GISEL-NEXT: v_cmp_lt_i32_e32 vcc, 30, v2
; VI-GISEL-NEXT: v_lshlrev_b32_e32 v3, 9, v3
; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
; VI-GISEL-NEXT: v_mov_b32_e32 v4, 0x40f
; VI-GISEL-NEXT: v_or_b32_e32 v3, 0x7c00, v3
; VI-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4
; VI-GISEL-NEXT: v_mov_b32_e32 v2, 0x8000
; VI-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
; VI-GISEL-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-GISEL-NEXT: v_or_b32_e32 v0, v1, v0
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_f64_to_f16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX10-SDAG-NEXT: v_lshrrev_b32_e32 v2, 8, v1
; GFX10-SDAG-NEXT: v_bfe_u32 v3, v1, 20, 11
; GFX10-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX10-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX10-SDAG-NEXT: v_sub_nc_u32_e32 v4, 0x3f1, v3
; GFX10-SDAG-NEXT: v_add_nc_u32_e32 v3, 0xfffffc10, v3
; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX10-SDAG-NEXT: v_and_or_b32 v0, 0xffe, v2, v0
; GFX10-SDAG-NEXT: v_med3_i32 v2, v4, 0, 13
; GFX10-SDAG-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX10-SDAG-NEXT: v_lshrrev_b32_e32 v5, v2, v4
; GFX10-SDAG-NEXT: v_lshlrev_b32_e32 v2, v2, v5
; GFX10-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v4
; GFX10-SDAG-NEXT: v_lshl_or_b32 v4, v3, 12, v0
; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; GFX10-SDAG-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v3
; GFX10-SDAG-NEXT: v_or_b32_e32 v2, v5, v2
; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc_lo
; GFX10-SDAG-NEXT: v_and_b32_e32 v4, 7, v2
; GFX10-SDAG-NEXT: v_lshrrev_b32_e32 v2, 2, v2
; GFX10-SDAG-NEXT: v_cmp_lt_i32_e32 vcc_lo, 5, v4
; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
; GFX10-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX10-SDAG-NEXT: v_or_b32_e32 v4, v4, v5
; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 0x7e00
; GFX10-SDAG-NEXT: v_add_nc_u32_e32 v2, v2, v4
; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x7c00, v5, vcc_lo
; GFX10-SDAG-NEXT: v_cmp_gt_i32_e32 vcc_lo, 31, v3
; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x7c00, v2, vcc_lo
; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v3
; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
; GFX10-SDAG-NEXT: v_and_or_b32 v0, 0x8000, v1, v0
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_f64_to_f16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX10-GISEL-NEXT: v_bfe_u32 v2, v1, 20, 11
; GFX10-GISEL-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX10-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX10-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v2, 0xfffffc10, v2
; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX10-GISEL-NEXT: v_sub_nc_u32_e32 v4, 1, v2
; GFX10-GISEL-NEXT: v_and_or_b32 v0, 0xffe, v3, v0
; GFX10-GISEL-NEXT: v_med3_i32 v3, v4, 0, 13
; GFX10-GISEL-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX10-GISEL-NEXT: v_lshrrev_b32_e32 v5, v3, v4
; GFX10-GISEL-NEXT: v_lshlrev_b32_e32 v3, v3, v5
; GFX10-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, v3, v4
; GFX10-GISEL-NEXT: v_lshl_or_b32 v4, v2, 12, v0
; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; GFX10-GISEL-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v2
; GFX10-GISEL-NEXT: v_or_b32_e32 v3, v5, v3
; GFX10-GISEL-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
; GFX10-GISEL-NEXT: v_and_b32_e32 v4, 7, v3
; GFX10-GISEL-NEXT: v_lshrrev_b32_e32 v3, 2, v3
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX10-GISEL-NEXT: v_cmp_lt_i32_e64 s4, 5, v4
; GFX10-GISEL-NEXT: s_or_b32 s4, vcc_lo, s4
; GFX10-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, s4
; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v3, v3, v4
; GFX10-GISEL-NEXT: v_cmp_lt_i32_e32 vcc_lo, 30, v2
; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v0, 9, 0x7c00
; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v3, v3, 0x7c00, vcc_lo
; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v2
; GFX10-GISEL-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo
; GFX10-GISEL-NEXT: v_and_or_b32 v0, 0x8000, v1, v0
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-SDAG-LABEL: fabs_fptrunc_f64_to_f16:
; GFX11-SAFE-SDAG: ; %bb.0:
; GFX11-SAFE-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-SDAG-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX11-SAFE-SDAG-NEXT: v_lshrrev_b32_e32 v2, 8, v1
; GFX11-SAFE-SDAG-NEXT: v_bfe_u32 v3, v1, 20, 11
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SAFE-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-SAFE-SDAG-NEXT: v_sub_nc_u32_e32 v4, 0x3f1, v3
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-SAFE-SDAG-NEXT: v_and_or_b32 v0, 0xffe, v2, v0
; GFX11-SAFE-SDAG-NEXT: v_med3_i32 v2, v4, 0, 13
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX11-SAFE-SDAG-NEXT: v_lshrrev_b32_e32 v5, v2, v4
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_lshlrev_b32_e32 v2, v2, v5
; GFX11-SAFE-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v4
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_or_b32_e32 v2, v5, v2
; GFX11-SAFE-SDAG-NEXT: v_add_nc_u32_e32 v3, 0xfffffc10, v3
; GFX11-SAFE-SDAG-NEXT: v_lshl_or_b32 v4, v3, 12, v0
; GFX11-SAFE-SDAG-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v3
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc_lo
; GFX11-SAFE-SDAG-NEXT: v_and_b32_e32 v4, 7, v2
; GFX11-SAFE-SDAG-NEXT: v_lshrrev_b32_e32 v2, 2, v2
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
; GFX11-SAFE-SDAG-NEXT: v_cmp_lt_i32_e32 vcc_lo, 5, v4
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; GFX11-SAFE-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
; GFX11-SAFE-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-SAFE-SDAG-NEXT: v_or_b32_e32 v4, v4, v5
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_dual_mov_b32 v5, 0x7e00 :: v_dual_add_nc_u32 v2, v2, v4
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x7c00, v5, vcc_lo
; GFX11-SAFE-SDAG-NEXT: v_cmp_gt_i32_e32 vcc_lo, 31, v3
; GFX11-SAFE-SDAG-NEXT: v_mov_b16_e32 v4.h, 0
; GFX11-SAFE-SDAG-NEXT: v_mov_b16_e32 v4.l, v1.h
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x7c00, v2, vcc_lo
; GFX11-SAFE-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v3
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
; GFX11-SAFE-SDAG-NEXT: v_and_or_b32 v0, 0x8000, v4, v0
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-SAFE-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-GISEL-LABEL: fabs_fptrunc_f64_to_f16:
; GFX11-SAFE-GISEL: ; %bb.0:
; GFX11-SAFE-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-GISEL-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX11-SAFE-GISEL-NEXT: v_bfe_u32 v2, v1, 20, 11
; GFX11-SAFE-GISEL-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX11-SAFE-GISEL-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-SAFE-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-SAFE-GISEL-NEXT: v_add_nc_u32_e32 v2, 0xfffffc10, v2
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SAFE-GISEL-NEXT: v_sub_nc_u32_e32 v4, 1, v2
; GFX11-SAFE-GISEL-NEXT: v_and_or_b32 v0, 0xffe, v3, v0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SAFE-GISEL-NEXT: v_med3_i32 v3, v4, 0, 13
; GFX11-SAFE-GISEL-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_lshrrev_b32_e32 v5, v3, v4
; GFX11-SAFE-GISEL-NEXT: v_lshlrev_b32_e32 v3, v3, v5
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-SAFE-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, v3, v4
; GFX11-SAFE-GISEL-NEXT: v_lshl_or_b32 v4, v2, 12, v0
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; GFX11-SAFE-GISEL-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v2
; GFX11-SAFE-GISEL-NEXT: v_or_b32_e32 v3, v5, v3
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
; GFX11-SAFE-GISEL-NEXT: v_and_b32_e32 v4, 7, v3
; GFX11-SAFE-GISEL-NEXT: v_lshrrev_b32_e32 v3, 2, v3
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-SAFE-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX11-SAFE-GISEL-NEXT: v_cmp_lt_i32_e64 s0, 5, v4
; GFX11-SAFE-GISEL-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-SAFE-GISEL-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, s0
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-SAFE-GISEL-NEXT: v_add_nc_u32_e32 v3, v3, v4
; GFX11-SAFE-GISEL-NEXT: v_cmp_lt_i32_e32 vcc_lo, 30, v2
; GFX11-SAFE-GISEL-NEXT: v_lshl_or_b32 v0, v0, 9, 0x7c00
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e64 v3, v3, 0x7c00, vcc_lo
; GFX11-SAFE-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v2
; GFX11-SAFE-GISEL-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_and_or_b32 v0, 0x8000, v1, v0
; GFX11-SAFE-GISEL-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-SAFE-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-TRUE16-LABEL: fabs_fptrunc_f64_to_f16:
; GFX11-UNSAFE-SDAG-TRUE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 8, v1
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v1, 20, 11
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_sub_nc_u32_e32 v4, 0x3f1, v3
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_or_b32 v0, 0xffe, v2, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_med3_i32 v2, v4, 0, 13
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v2, v4
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v2, v2, v5
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v4
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, v5, v2
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0xfffffc10, v3
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_lshl_or_b32 v4, v3, 12, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v3
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 7, v2
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 2, v2
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_lt_i32_e32 vcc_lo, 5, v4
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_dual_mov_b32 v5, 0x7e00 :: v_dual_add_nc_u32 v2, v2, v4
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, 0x7c00, v5, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 31, v3
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, 0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v1.h
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v2, 0x7c00, v2, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v3
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_or_b32 v0, 0x8000, v4, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-FAKE16-LABEL: fabs_fptrunc_f64_to_f16:
; GFX11-UNSAFE-SDAG-FAKE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 8, v1
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v1, 20, 11
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_sub_nc_u32_e32 v4, 0x3f1, v3
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_or_b32 v0, 0xffe, v2, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_med3_i32 v2, v4, 0, 13
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v2, v4
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, v2, v5
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v4
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, v5, v2
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0xfffffc10, v3
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_lshl_or_b32 v4, v3, 12, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v3
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_b32_e32 v4, 7, v2
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 2, v2
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_lt_i32_e32 vcc_lo, 5, v4
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, v4, v5
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_dual_mov_b32 v5, 0x7e00 :: v_dual_add_nc_u32 v2, v2, v4
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x7c00, v5, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 31, v3
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x7c00, v2, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v3
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_or_b32 v0, 0x8000, v1, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-TRUE16-LABEL: fabs_fptrunc_f64_to_f16:
; GFX11-UNSAFE-GISEL-TRUE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_bfe_u32 v2, v1, 20, 11
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0xfffffc10, v2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_sub_nc_u32_e32 v4, 1, v2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_or_b32 v0, 0xffe, v3, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_med3_i32 v3, v4, 0, 13
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v5, v3, v4
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v3, v3, v5
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v3, v4
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshl_or_b32 v4, v2, 12, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_or_b32_e32 v3, v5, v3
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_b32_e32 v4, 7, v3
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 2, v3
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_lt_i32_e64 s0, 5, v4
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v4, 0, 1, s0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v4
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_lt_i32_e32 vcc_lo, 30, v2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_lshl_or_b32 v0, v0, 9, 0x7c00
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v3, v3, 0x7c00, vcc_lo
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v2
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_or_b32 v0, 0x8000, v1, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_b16 v0.l, 0x7fff, v0.l
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-FAKE16-LABEL: fabs_fptrunc_f64_to_f16:
; GFX11-UNSAFE-GISEL-FAKE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_or_b32 v0, 0x1ff, v1, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_bfe_u32 v2, v1, 20, 11
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0xfffffc10, v2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_sub_nc_u32_e32 v4, 1, v2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_or_b32 v0, 0xffe, v3, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_med3_i32 v3, v4, 0, 13
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_or_b32_e32 v4, 0x1000, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v5, v3, v4
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v3, v3, v5
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, v3, v4
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshl_or_b32 v4, v2, 12, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_or_b32_e32 v3, v5, v3
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc_lo
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_b32_e32 v4, 7, v3
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 2, v3
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v4
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_lt_i32_e64 s0, 5, v4
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_or_b32 s0, vcc_lo, s0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v4, 0, 1, s0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v4
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_lt_i32_e32 vcc_lo, 30, v2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v0, 9, 0x7c00
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v3, v3, 0x7c00, vcc_lo
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0x40f, v2
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_or_b32 v0, 0x8000, v1, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc double %x to half
%a = call half @llvm.fabs.f16(half %t)
ret half %a
}
; Vector v2f64 -> v2f32.
define <2 x float> @fabs_fptrunc_v2f64_to_v2f32(<2 x double> %x) {
; SI-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v2, v[2:3]
; SI-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; SI-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; SI-NEXT: v_and_b32_e32 v1, 0x7fffffff, v2
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v1, v[2:3]
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v1, v[2:3]
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, v[2:3]
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, v[2:3]
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, v[2:3]
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-SDAG-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: fabs_fptrunc_v2f64_to_v2f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, v[2:3]
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-GISEL-NEXT: v_and_b32_e32 v1, 0x7fffffff, v1
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc <2 x double> %x to <2 x float>
%a = call <2 x float> @llvm.fabs.v2f32(<2 x float> %t)
ret <2 x float> %a
}
; Vector v2f32 -> v2f16.
define <2 x half> @fabs_fptrunc_v2f32_to_v2f16(<2 x float> %x) {
; SI-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_or_b32_e32 v0, v0, v1
; SI-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
; VI-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-SDAG-NEXT: v_or_b32_e32 v0, v0, v1
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; VI-GISEL-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
; VI-GISEL-NEXT: v_or_b32_e32 v0, v0, v1
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
; GFX10-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX10-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
; GFX10-GISEL-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-SDAG-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX11-SAFE-SDAG: ; %bb.0:
; GFX11-SAFE-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-SDAG-NEXT: v_cvt_f16_f32_e32 v1.h, v1
; GFX11-SAFE-SDAG-NEXT: v_cvt_f16_f32_e32 v1.l, v0
; GFX11-SAFE-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v1
; GFX11-SAFE-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SAFE-GISEL-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX11-SAFE-GISEL: ; %bb.0:
; GFX11-SAFE-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SAFE-GISEL-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-SAFE-GISEL-NEXT: v_cvt_f16_f32_e32 v0.h, v1
; GFX11-SAFE-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SAFE-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX11-SAFE-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-TRUE16-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX11-UNSAFE-SDAG-TRUE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v1.h, v1
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_cvt_f16_f32_e32 v1.l, v0
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v1
; GFX11-UNSAFE-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-SDAG-FAKE16-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX11-UNSAFE-SDAG-FAKE16: ; %bb.0:
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX11-UNSAFE-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-TRUE16-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX11-UNSAFE-GISEL-TRUE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX11-UNSAFE-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-UNSAFE-GISEL-FAKE16-LABEL: fabs_fptrunc_v2f32_to_v2f16:
; GFX11-UNSAFE-GISEL-FAKE16: ; %bb.0:
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX11-UNSAFE-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc <2 x float> %x to <2 x half>
%a = call <2 x half> @llvm.fabs.v2f16(<2 x half> %t)
ret <2 x half> %a
}
; Negative: the fp_round result has more than one use, so the combine must NOT
; fire (performFAbsCombine bails on !N0.hasOneUse()).
define float @fabs_fptrunc_f64_to_f32_multiuse(double %x, ptr addrspace(1) %p) {
; SI-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, 0
; SI-NEXT: v_cvt_f32_f64_e32 v1, v[0:1]
; SI-NEXT: s_mov_b32 s4, s6
; SI-NEXT: s_mov_b32 s5, s6
; SI-NEXT: v_and_b32_e32 v0, 0x7fffffff, v1
; SI-NEXT: buffer_store_dword v1, v[2:3], s[4:7], 0 addr64
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-SDAG-NEXT: flat_store_dword v[2:3], v0
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-SDAG-NEXT: s_waitcnt vmcnt(0)
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-GISEL-NEXT: flat_store_dword v[2:3], v0
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-GISEL-NEXT: s_waitcnt vmcnt(0)
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v1, v[0:1]
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v1
; GFX10-SDAG-NEXT: global_store_dword v[2:3], v1, off
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v1, v[0:1]
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v1
; GFX10-GISEL-NEXT: global_store_dword v[2:3], v1, off
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v1, v[0:1]
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v1
; GFX11-SDAG-NEXT: global_store_b32 v[2:3], v1, off
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: fabs_fptrunc_f64_to_f32_multiuse:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v1, v[0:1]
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v1
; GFX11-GISEL-NEXT: global_store_b32 v[2:3], v1, off
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc double %x to float
store float %t, ptr addrspace(1) %p
%a = call float @llvm.fabs.f32(float %t)
ret float %a
}
; The abs result feeds an fadd; check the sunk fabs still folds as a source
; modifier rather than materializing a separate bitwise abs.
define float @fabs_fptrunc_f64_to_f32_used_by_fadd(double %x, float %y) {
; SI-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; SI-NEXT: v_add_f32_e64 v0, |v0|, v2
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v2
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; VI-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v2
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v2
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX10-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v2
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_add_f32_e64 v0, |v0|, v2
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: fabs_fptrunc_f64_to_f32_used_by_fadd:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_add_f32_e64 v0, |v0|, v2
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%t = fptrunc double %x to float
%a = call float @llvm.fabs.f32(float %t)
%r = fadd float %a, %y
ret float %r
}
; fabs of an already-negated source: (fabs (fptrunc (fneg x))). The inner fneg
; is dead under fabs; exercises interaction with the fneg fp_round combine.
define float @fabs_fptrunc_fneg_f64_to_f32(double %x) {
; SI-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; SI-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; SI-NEXT: s_setpc_b64 s[30:31]
;
; VI-SDAG-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; VI-SDAG: ; %bb.0:
; VI-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-SDAG-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; VI-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; VI-GISEL-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; VI-GISEL: ; %bb.0:
; VI-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-GISEL-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; VI-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; VI-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-SDAG-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; GFX10-SDAG: ; %bb.0:
; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-SDAG-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX10-GISEL-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; GFX10-GISEL: ; %bb.0:
; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-GISEL-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-SDAG-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: fabs_fptrunc_fneg_f64_to_f32:
; GFX11-GISEL: ; %bb.0:
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-GISEL-NEXT: v_cvt_f32_f64_e64 v0, -v[0:1]
; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]
%n = fneg double %x
%t = fptrunc double %n to float
%a = call float @llvm.fabs.f32(float %t)
ret float %a
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; GFX10-SAFE-GISEL: {{.*}}
; GFX10-SAFE-SDAG: {{.*}}
; GFX10-UNSAFE-SDAG: {{.*}}
; VI-SAFE-GISEL: {{.*}}
; VI-SAFE-SDAG: {{.*}}
; VI-UNSAFE-SDAG: {{.*}}