| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -O0 -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s |
| --- |
| name: test_div |
| body: | |
| bb.0.entry: |
| ; CHECK-LABEL: name: test_div |
| ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 |
| ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) |
| ; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC]], 8 |
| ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) |
| ; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC1]], 8 |
| ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[SEXT_INREG]], [[SEXT_INREG1]] |
| ; CHECK: $w0 = COPY [[SDIV]](s32) |
| ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 |
| ; CHECK: [[TRUNC2:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) |
| ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC2]], [[C]] |
| ; CHECK: [[TRUNC3:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) |
| ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC3]], [[C]] |
| ; CHECK: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[AND]], [[AND1]] |
| ; CHECK: $w0 = COPY [[UDIV]](s32) |
| %0:_(s64) = COPY $x0 |
| %1:_(s64) = COPY $x1 |
| %2:_(s8) = G_TRUNC %0(s64) |
| %3:_(s8) = G_TRUNC %1(s64) |
| %4:_(s8) = G_SDIV %2, %3 |
| %6:_(s32) = G_ANYEXT %4(s8) |
| $w0 = COPY %6(s32) |
| %5:_(s8) = G_UDIV %2, %3 |
| %7:_(s32) = G_ANYEXT %5(s8) |
| $w0 = COPY %7(s32) |
| |
| ... |
| --- |
| name: sdiv_v4s32 |
| alignment: 4 |
| tracksRegLiveness: true |
| machineFunctionInfo: {} |
| body: | |
| bb.1: |
| liveins: $q0, $q1 |
| |
| ; CHECK-LABEL: name: sdiv_v4s32 |
| ; CHECK: liveins: $q0, $q1 |
| ; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0 |
| ; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s32>) = COPY $q1 |
| ; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) |
| ; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<4 x s32>) |
| ; CHECK: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[UV]], [[UV4]] |
| ; CHECK: [[SDIV1:%[0-9]+]]:_(s32) = G_SDIV [[UV1]], [[UV5]] |
| ; CHECK: [[SDIV2:%[0-9]+]]:_(s32) = G_SDIV [[UV2]], [[UV6]] |
| ; CHECK: [[SDIV3:%[0-9]+]]:_(s32) = G_SDIV [[UV3]], [[UV7]] |
| ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[SDIV]](s32), [[SDIV1]](s32), [[SDIV2]](s32), [[SDIV3]](s32) |
| ; CHECK: $q0 = COPY [[BUILD_VECTOR]](<4 x s32>) |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %0:_(<4 x s32>) = COPY $q0 |
| %1:_(<4 x s32>) = COPY $q1 |
| %2:_(<4 x s32>) = G_SDIV %0, %1 |
| $q0 = COPY %2(<4 x s32>) |
| RET_ReallyLR implicit $q0 |
| |
| ... |