llvm/test/CodeGen/AArch64/peephole-substitute-cmp-adcs.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=aarch64-unknown-linux -run-pass=peephole-opt -verify-machineinstrs %s -o - | FileCheck %s
# RUN: llc -mtriple=aarch64-unknown-linux -passes=peephole-opt %s -o - | FileCheck %s
#
# Exercise sForm-driven substituteCmpToZero for:
# - ADCSXr / ADCSWr (carry chain + redundant ADDS*ri #0)
# - SBCSXr / SBCSWr (borrow chain + redundant ADDS*ri #0)
# - ADDWrs / ADDXrs / SUBWrs / SUBXrs (shifted reg without flags -> *S*rs;
#   redundant ADDS*ri #0 or SUBS*ri #0)

---
name:            peephole_substitute_cmp_adcs
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: gpr64 }
  - { id: 3, class: gpr64 }
  - { id: 4, class: gpr64 }
  - { id: 5, class: gpr64common }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr64 }
body:             |
  bb.0:
    liveins: $x0, $x1, $x2, $x3

    ; CHECK-LABEL: name: peephole_substitute_cmp_adcs
    ; CHECK: liveins: $x0, $x1, $x2, $x3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3
    ; CHECK-NEXT: [[ADDSXrr:%[0-9]+]]:gpr64 = ADDSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[ADCSXr:%[0-9]+]]:gpr64common = ADCSXr [[COPY2]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:gpr64 = COPY $x2
    %3:gpr64 = COPY $x3
    %4:gpr64 = ADDSXrr %0, %1, implicit-def $nzcv
    %5:gpr64common = ADCSXr %2, %3, implicit-def $nzcv, implicit $nzcv
    dead %7:gpr64 = ADDSXri killed %5:gpr64common, 0, 0, implicit-def $nzcv
    %6:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %6
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_adcswr
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: gpr32 }
  - { id: 3, class: gpr32 }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32common }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
body:             |
  bb.0:
    liveins: $w0, $w1, $w2, $w3

    ; CHECK-LABEL: name: peephole_substitute_cmp_adcswr
    ; CHECK: liveins: $w0, $w1, $w2, $w3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $w3
    ; CHECK-NEXT: [[ADDSWrr:%[0-9]+]]:gpr32 = ADDSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[ADCSWr:%[0-9]+]]:gpr32common = ADCSWr [[COPY2]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr32 = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32 = COPY $w2
    %3:gpr32 = COPY $w3
    %4:gpr32 = ADDSWrr %0, %1, implicit-def $nzcv
    %5:gpr32common = ADCSWr %2, %3, implicit-def $nzcv, implicit $nzcv
    dead %7:gpr32 = ADDSWri killed %5:gpr32common, 0, 0, implicit-def $nzcv
    %6:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %6
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_sbcsxr
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: gpr64 }
  - { id: 3, class: gpr64 }
  - { id: 4, class: gpr64 }
  - { id: 5, class: gpr64common }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr64 }
body:             |
  bb.0:
    liveins: $x0, $x1, $x2, $x3

    ; CHECK-LABEL: name: peephole_substitute_cmp_sbcsxr
    ; CHECK: liveins: $x0, $x1, $x2, $x3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY $x3
    ; CHECK-NEXT: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[SBCSXr:%[0-9]+]]:gpr64common = SBCSXr [[COPY2]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:gpr64 = COPY $x2
    %3:gpr64 = COPY $x3
    %4:gpr64 = SUBSXrr %0, %1, implicit-def $nzcv
    %5:gpr64common = SBCSXr %2, %3, implicit-def $nzcv, implicit $nzcv
    dead %7:gpr64 = ADDSXri killed %5:gpr64common, 0, 0, implicit-def $nzcv
    %6:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %6
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_addwrs
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: gpr32common }
  - { id: 3, class: gpr32 }
  - { id: 4, class: gpr32 }
body:             |
  bb.0:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: peephole_substitute_cmp_addwrs
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[ADDSWrs:%[0-9]+]]:gpr32common = ADDSWrs [[COPY]], [[COPY1]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr32 = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32common = ADDWrs %0, %1, 0
    dead %4:gpr32 = ADDSWri killed %2:gpr32common, 0, 0, implicit-def $nzcv
    %3:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %3
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_addxrs
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: gpr64common }
  - { id: 3, class: gpr32 }
  - { id: 4, class: gpr64 }
body:             |
  bb.0:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: peephole_substitute_cmp_addxrs
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[ADDSXrs:%[0-9]+]]:gpr64common = ADDSXrs [[COPY]], [[COPY1]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:gpr64common = ADDXrs %0, %1, 0
    dead %4:gpr64 = ADDSXri killed %2:gpr64common, 0, 0, implicit-def $nzcv
    %3:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %3
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_subwrs
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: gpr32common }
  - { id: 3, class: gpr32 }
  - { id: 4, class: gpr32 }
body:             |
  bb.0:
    liveins: $w0, $w1

    ; CHECK-LABEL: name: peephole_substitute_cmp_subwrs
    ; CHECK: liveins: $w0, $w1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[SUBSWrs:%[0-9]+]]:gpr32common = SUBSWrs [[COPY]], [[COPY1]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr32 = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32common = SUBWrs %0, %1, 0
    dead %4:gpr32 = SUBSWri killed %2:gpr32common, 0, 0, implicit-def $nzcv
    %3:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %3
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_subxrs
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr64 }
  - { id: 1, class: gpr64 }
  - { id: 2, class: gpr64common }
  - { id: 3, class: gpr32 }
  - { id: 4, class: gpr64 }
body:             |
  bb.0:
    liveins: $x0, $x1

    ; CHECK-LABEL: name: peephole_substitute_cmp_subxrs
    ; CHECK: liveins: $x0, $x1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
    ; CHECK-NEXT: [[SUBSXrs:%[0-9]+]]:gpr64common = SUBSXrs [[COPY]], [[COPY1]], 0, implicit-def $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr64 = COPY $x0
    %1:gpr64 = COPY $x1
    %2:gpr64common = SUBXrs %0, %1, 0
    dead %4:gpr64 = SUBSXri killed %2:gpr64common, 0, 0, implicit-def $nzcv
    %3:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %3
    RET_ReallyLR implicit $w0
...
---
name:            peephole_substitute_cmp_sbcswr
tracksRegLiveness: true
registers:
  - { id: 0, class: gpr32 }
  - { id: 1, class: gpr32 }
  - { id: 2, class: gpr32 }
  - { id: 3, class: gpr32 }
  - { id: 4, class: gpr32 }
  - { id: 5, class: gpr32common }
  - { id: 6, class: gpr32 }
  - { id: 7, class: gpr32 }
body:             |
  bb.0:
    liveins: $w0, $w1, $w2, $w3

    ; CHECK-LABEL: name: peephole_substitute_cmp_sbcswr
    ; CHECK: liveins: $w0, $w1, $w2, $w3
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY $w3
    ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY]], [[COPY1]], implicit-def $nzcv
    ; CHECK-NEXT: [[SBCSWr:%[0-9]+]]:gpr32common = SBCSWr [[COPY2]], [[COPY3]], implicit-def $nzcv, implicit $nzcv
    ; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    ; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
    ; CHECK-NEXT: RET_ReallyLR implicit $w0
    %0:gpr32 = COPY $w0
    %1:gpr32 = COPY $w1
    %2:gpr32 = COPY $w2
    %3:gpr32 = COPY $w3
    %4:gpr32 = SUBSWrr %0, %1, implicit-def $nzcv
    %5:gpr32common = SBCSWr %2, %3, implicit-def $nzcv, implicit $nzcv
    dead %7:gpr32 = ADDSWri killed %5:gpr32common, 0, 0, implicit-def $nzcv
    %6:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
    $w0 = COPY %6
    RET_ReallyLR implicit $w0
...