blob: 77e697781c00621fc39505a1db6523938560a1ac [file]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-linux-gnu -O3 -o - < %s | FileCheck %s
declare void @foo()
define i1 @eq_imm(i128 %x) {
; CHECK-LABEL: eq_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x0, #5
; CHECK-NEXT: ccmp x1, #0, #0, eq
; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%cmp = icmp eq i128 %x, 5
ret i1 %cmp
}
define i1 @ne_imm(i128 %x) {
; CHECK-LABEL: ne_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x0, #5
; CHECK-NEXT: ccmp x1, #0, #0, eq
; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%cmp = icmp ne i128 %x, 5
ret i1 %cmp
}
define i1 @eq_or_xor_zero_hi(i64 %lo, i64 %hi) {
; CHECK-LABEL: eq_or_xor_zero_hi:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x0, #5
; CHECK-NEXT: ccmp x1, #0, #0, eq
; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%xorlo = xor i64 %lo, 5
%or = or i64 %xorlo, %hi
%cmp = icmp eq i64 %or, 0
ret i1 %cmp
}
define i1 @ne_or_xor_zero_hi(i64 %lo, i64 %hi) {
; CHECK-LABEL: ne_or_xor_zero_hi:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x0, #5
; CHECK-NEXT: ccmp x1, #0, #0, eq
; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%xorlo = xor i64 %lo, 5
%or = or i64 %xorlo, %hi
%cmp = icmp ne i64 %or, 0
ret i1 %cmp
}
define void @eq_or_xor_large_cmp_imm_branch(i64 %lo, i64 %hi) {
; CHECK-LABEL: eq_or_xor_large_cmp_imm_branch:
; CHECK: // %bb.0:
; CHECK-NEXT: eor x8, x1, #0x8000000000000000
; CHECK-NEXT: orr x8, x0, x8
; CHECK-NEXT: cbz x8, .LBB4_2
; CHECK-NEXT: // %bb.1: // %common.ret
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB4_2: // %true
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl foo
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%xor = xor i64 %hi, -9223372036854775808
%or = or i64 %lo, %xor
%cmp = icmp eq i64 %or, 0
br i1 %cmp, label %true, label %false
true:
call void @foo()
ret void
false:
ret void
}
define void @eq_or_xor_large_condcmp_imm_branch(i64 %a, i64 %b, i64 %c, i64 %d) {
; CHECK-LABEL: eq_or_xor_large_condcmp_imm_branch:
; CHECK: // %bb.0:
; CHECK-NEXT: eor x8, x3, #0xff
; CHECK-NEXT: orr x9, x0, x1
; CHECK-NEXT: orr x8, x2, x8
; CHECK-NEXT: orr x8, x9, x8
; CHECK-NEXT: cbz x8, .LBB5_2
; CHECK-NEXT: // %bb.1: // %common.ret
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB5_2: // %true
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl foo
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%xor = xor i64 %d, 255
%or0 = or i64 %a, %b
%or1 = or i64 %c, %xor
%or = or i64 %or0, %or1
%cmp = icmp eq i64 %or, 0
br i1 %cmp, label %true, label %false
true:
call void @foo()
ret void
false:
ret void
}
define i1 @eq_or_xor_two_condcmp_imm_reordered(i64 %zero, i64 %value) {
; CHECK-LABEL: eq_or_xor_two_condcmp_imm_reordered:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x1, #255
; CHECK-NEXT: ccmp x0, #0, #0, eq
; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%xor = xor i64 %value, 255
%or = or i64 %zero, %xor
%cmp = icmp eq i64 %or, 0
ret i1 %cmp
}
define void @eq_or_xor_multiple_large_condcmp_imm_branch(i64 %a, i64 %b, i64 %c, i64 %d) {
; CHECK-LABEL: eq_or_xor_multiple_large_condcmp_imm_branch:
; CHECK: // %bb.0:
; CHECK-NEXT: eor x8, x1, #0xff
; CHECK-NEXT: eor x9, x3, #0xffff
; CHECK-NEXT: orr x8, x0, x8
; CHECK-NEXT: orr x9, x2, x9
; CHECK-NEXT: orr x8, x8, x9
; CHECK-NEXT: cbz x8, .LBB7_2
; CHECK-NEXT: // %bb.1: // %common.ret
; CHECK-NEXT: ret
; CHECK-NEXT: .LBB7_2: // %true
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl foo
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%xorb = xor i64 %b, 255
%xord = xor i64 %d, 65535
%or0 = or i64 %a, %xorb
%or1 = or i64 %c, %xord
%or = or i64 %or0, %or1
%cmp = icmp eq i64 %or, 0
br i1 %cmp, label %true, label %false
true:
call void @foo()
ret void
false:
ret void
}
define i1 @ult_imm(i128 %x) {
; CHECK-LABEL: ult_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x1, #0
; CHECK-NEXT: ccmp x0, #5, #2, eq
; CHECK-NEXT: cset w0, lo
; CHECK-NEXT: ret
%cmp = icmp ult i128 %x, 5
ret i1 %cmp
}
define i1 @ule_imm(i128 %x) {
; CHECK-LABEL: ule_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x1, #0
; CHECK-NEXT: ccmp x0, #6, #2, eq
; CHECK-NEXT: cset w0, lo
; CHECK-NEXT: ret
%cmp = icmp ule i128 %x, 5
ret i1 %cmp
}
define i1 @ugt_imm(i128 %x) {
; CHECK-LABEL: ugt_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x1, #0
; CHECK-NEXT: ccmp x0, #5, #2, eq
; CHECK-NEXT: cset w0, hi
; CHECK-NEXT: ret
%cmp = icmp ugt i128 %x, 5
ret i1 %cmp
}
define i1 @uge_imm(i128 %x) {
; CHECK-LABEL: uge_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: cmp x1, #0
; CHECK-NEXT: ccmp x0, #4, #2, eq
; CHECK-NEXT: cset w0, hi
; CHECK-NEXT: ret
%cmp = icmp uge i128 %x, 5
ret i1 %cmp
}