Sign in
llvm
/
llvm-project
/
ee655ca27aad466bcc54f6eba03f7e564940ad5a
/
.
/
llvm
/
test
/
Transforms
/
PhaseOrdering
/
AArch64
tree: 878edf56fd61806d0a3b95e50ed7e85a3045d7c9
block_scaling_decompr_8bit.ll
constraint-elimination-placement.ll
extra-unroll-simplifications.ll
globals-aa-required-for-vectorization.ll
hoist-runtime-checks.ll
hoisting-sinking-required-for-vectorization.ll
indvars-vectorization.ll
infer-align-from-assumption.ll
interleavevectorization.ll
lit.local.cfg
loopflatten.ll
matrix-extract-insert.ll
memcpy-constant-size.ll
mul-ov.ll
peel-multiple-unreachable-exits-for-vectorization.ll
predicated-reduction.ll
quant_4x4.ll
sinking-vs-if-conversion.ll
slpordering.ll
sve-interleave-vectorization.ll
udotabd.ll