| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -run-pass post-RA-hazard-rec,amdgpu-wait-sgpr-hazards -amdgpu-sgpr-hazard-boundary-cull=0 -o - %s | FileCheck -check-prefixes=GCN,NOBC,NOMEMC %s |
| # RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -run-pass post-RA-hazard-rec,amdgpu-wait-sgpr-hazards -amdgpu-sgpr-hazard-boundary-cull=1 -o - %s | FileCheck -check-prefixes=GCN,BC,NOMEMC %s |
| # RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs -run-pass post-RA-hazard-rec,amdgpu-wait-sgpr-hazards -amdgpu-sgpr-hazard-boundary-cull=0 -amdgpu-sgpr-hazard-mem-wait-cull=1 -amdgpu-sgpr-hazard-mem-wait-cull-threshold=1 -o - %s | FileCheck -check-prefixes=GCN,NOBC,MEMC %s |
| |
| --- | |
| @mem = internal unnamed_addr addrspace(4) constant [4 x <4 x i32>] [<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>] |
| |
| define amdgpu_gs void @hazard_getpc1() { ret void } |
| define amdgpu_gs void @hazard_getpc2() { ret void } |
| define amdgpu_gs void @hazard_getpc3() { ret void } |
| define amdgpu_gs void @hazard_getpc4() { ret void } |
| define amdgpu_gs void @hazard_vcc1() { ret void } |
| define amdgpu_gs void @hazard_vcc2() { ret void } |
| define amdgpu_gs void @hazard_vcc3() { ret void } |
| define amdgpu_gs void @hazard_merge_vcc() { ret void } |
| define amdgpu_gs void @hazard_addc1() { ret void } |
| define amdgpu_gs void @hazard_addc2() { ret void } |
| define amdgpu_gs void @hazard_addc3() { ret void } |
| define amdgpu_gs void @hazard_addc4() { ret void } |
| define amdgpu_gs void @hazard_addc5() { ret void } |
| define amdgpu_gs void @hazard_addc6() { ret void } |
| define amdgpu_gs void @hazard_vaddc1() { ret void } |
| define amdgpu_gs void @hazard_gap1() { ret void } |
| define amdgpu_gs void @hazard_gap2() { ret void } |
| define amdgpu_gs void @hazard_gap3() { ret void } |
| define amdgpu_gs void @hazard_gap4_no_hazard() { ret void } |
| define amdgpu_gs void @hazard_valu_write1_no_hazard() { ret void } |
| define amdgpu_gs void @hazard_post_order1() { ret void } |
| define amdgpu_gs void @hazard_post_order2() { ret void } |
| define amdgpu_gs void @hazard_post_order_cycle() { ret void } |
| define amdgpu_cs void @hazard_calls() { ret void } |
| define void @hazard_callee1() { ret void } |
| define void @hazard_callee2() { ret void } |
| define amdgpu_cs void @hazard_carry_vcc() { ret void } |
| define amdgpu_cs void @hazard_carry_vcc_no_hazard() { ret void } |
| define amdgpu_cs void @hazard_carry_sgpr() { ret void } |
| define amdgpu_cs void @hazard_carry_sgpr_no_hazard1() { ret void } |
| define amdgpu_cs void @hazard_carry_sgpr_no_hazard2() { ret void } |
| define amdgpu_cs void @hazard_carry_sgpr_no_hazard3() { ret void } |
| define amdgpu_cs void @hazard_cull_vmem() { ret void } |
| define amdgpu_cs void @hazard_cull_sample() { ret void } |
| define amdgpu_cs void @hazard_cull_bvh() { ret void } |
| define amdgpu_cs void @hazard_nocull_scratch() { ret void } |
| define amdgpu_cs void @hazard_cull_global() { ret void } |
| define amdgpu_cs void @hazard_nocull_flat() { ret void } |
| define amdgpu_cs void @hazard_existing_cull() { ret void } |
| ... |
| |
| --- |
| name: hazard_getpc1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_getpc1 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_getpc2 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_getpc2 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr1, implicit $exec |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr1, implicit $exec |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_getpc3 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_getpc3 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 { |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc |
| ; GCN-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 16, implicit-def $scc, implicit $scc |
| ; GCN-NEXT: } |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| BUNDLE implicit-def $sgpr0_sgpr1 { |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 4, implicit-def $scc |
| $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 12, implicit-def $scc, implicit $scc |
| } |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_getpc4 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_getpc4 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 { |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr1 = S_SEXT_I32_I16 $sgpr1 |
| ; GCN-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 12, implicit-def $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 24, implicit-def $scc, implicit $scc |
| ; GCN-NEXT: } |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| BUNDLE implicit-def $sgpr0_sgpr1 { |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr1 = S_SEXT_I32_I16 $sgpr1 |
| $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc |
| $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-hi) @mem + 16, implicit-def $scc, implicit $scc |
| } |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vcc1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_vcc1 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2, implicit $exec |
| ; GCN-NEXT: $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2, implicit $exec |
| $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vcc2 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_vcc2 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr4 = S_ADD_U32 $vcc_lo, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec |
| $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $vcc_lo, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vcc3 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_vcc3 |
| ; GCN: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec |
| $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_merge_vcc |
| body: | |
| ; GCN-LABEL: name: hazard_merge_vcc |
| ; GCN: bb.0: |
| ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: S_CBRANCH_SCC0 %bb.1, implicit $scc |
| ; GCN-NEXT: S_BRANCH %bb.2 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.1: |
| ; GCN-NEXT: successors: %bb.3(0x80000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_BRANCH %bb.3 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.2: |
| ; GCN-NEXT: successors: %bb.3(0x80000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: $vcc_lo = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| ; GCN-NEXT: S_BRANCH %bb.3 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.3: |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65532 |
| ; GCN-NEXT: $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| bb.0: |
| $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec |
| S_CBRANCH_SCC0 %bb.1, implicit $scc |
| S_BRANCH %bb.2 |
| bb.1: |
| $vcc_lo = S_CSELECT_B32 -1, 0, implicit $scc |
| S_BRANCH %bb.3 |
| bb.2: |
| $vcc_lo = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| S_BRANCH %bb.3 |
| bb.3: |
| $vgpr3 = V_CNDMASK_B32_e32 $vgpr4, $vgpr5, implicit $vcc, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_addc1 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc2 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_addc2 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| ; GCN-NEXT: $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| $sgpr0 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc3 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_addc3 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc4 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_addc4 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr3, 0, implicit $exec |
| ; GCN-NEXT: $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr3, 0, implicit $exec |
| $sgpr3 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc5 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_addc5 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr32 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr16 = S_MOV_B32 0 |
| $sgpr32 = S_MOV_B32 0 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_addc6 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_addc6 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr32 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr48 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr80 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr96 = S_MOV_B32 0 |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr16 = S_MOV_B32 0 |
| $sgpr32 = S_MOV_B32 0 |
| $sgpr48 = S_MOV_B32 0 |
| $sgpr80 = S_MOV_B32 0 |
| $sgpr96 = S_MOV_B32 0 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_vaddc1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_vaddc1 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $vgpr2, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $vgpr2, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr1, 0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_gap1 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap2 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_gap2 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| S_NOP 0 |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap3 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_gap3 |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_gap4_no_hazard |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_gap4_no_hazard |
| ; GCN: $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr18 = S_ADD_U32 $sgpr17, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr20 = S_ADD_U32 $sgpr19, 0, implicit-def $scc |
| ; GCN-NEXT: $sgpr22 = S_ADD_U32 $sgpr21, 0, implicit-def $scc |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $vcc_lo = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr4 = S_ADD_U32 $sgpr3, 0, implicit-def $scc |
| $sgpr6 = S_ADD_U32 $sgpr5, 0, implicit-def $scc |
| $sgpr8 = S_ADD_U32 $sgpr7, 0, implicit-def $scc |
| $sgpr10 = S_ADD_U32 $sgpr9, 0, implicit-def $scc |
| $sgpr12 = S_ADD_U32 $sgpr11, 0, implicit-def $scc |
| $sgpr14 = S_ADD_U32 $sgpr13, 0, implicit-def $scc |
| $sgpr16 = S_ADD_U32 $sgpr15, 0, implicit-def $scc |
| $sgpr18 = S_ADD_U32 $sgpr17, 0, implicit-def $scc |
| $sgpr20 = S_ADD_U32 $sgpr19, 0, implicit-def $scc |
| $sgpr22 = S_ADD_U32 $sgpr21, 0, implicit-def $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_valu_write1_no_hazard |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_valu_write1_no_hazard |
| ; GCN: $sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| ; GCN-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; GCN-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $sgpr1 = V_CMP_EQ_F32_e64 0, $vgpr0, 0, $vgpr1, 1, implicit $mode, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_post_order1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_post_order1 |
| ; GCN: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_post_order2 |
| body: | |
| ; GCN-LABEL: name: hazard_post_order2 |
| ; GCN: bb.0: |
| ; GCN-NEXT: successors: %bb.1(0x80000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_BRANCH %bb.1 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.1: |
| ; GCN-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| bb.0: |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_post_order_cycle |
| body: | |
| ; GCN-LABEL: name: hazard_post_order_cycle |
| ; GCN: bb.0: |
| ; GCN-NEXT: successors: %bb.1(0x80000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: S_NOP 0 |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.1: |
| ; GCN-NEXT: successors: %bb.2(0x80000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.2: |
| ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.3(0x40000000) |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| ; GCN-NEXT: S_CBRANCH_SCC0 %bb.1, implicit $scc |
| ; GCN-NEXT: {{ $}} |
| ; GCN-NEXT: bb.3: |
| ; GCN-NEXT: S_ENDPGM 0 |
| bb.0: |
| S_NOP 0 |
| |
| bb.1: |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| |
| bb.2: |
| $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0, implicit $exec |
| S_CBRANCH_SCC0 %bb.1, implicit $scc |
| |
| bb.3: |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_calls |
| frameInfo: |
| hasCalls: true |
| body: | |
| ; NOBC-LABEL: name: hazard_calls |
| ; NOBC: bb.0: |
| ; NOBC-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: $vgpr0 = V_WRITELANE_B32 0, $sgpr4, $vgpr0 |
| ; NOBC-NEXT: $vgpr0 = V_WRITELANE_B32 1, $sgpr8, $vgpr0 |
| ; NOBC-NEXT: $vgpr0 = V_WRITELANE_B32 2, $sgpr16, $vgpr0 |
| ; NOBC-NEXT: $vgpr0 = V_WRITELANE_B32 3, $sgpr18, $vgpr0 |
| ; NOBC-NEXT: $vgpr0 = V_WRITELANE_B32 4, $sgpr20, $vgpr0 |
| ; NOBC-NEXT: $vgpr0 = V_WRITELANE_B32 5, $sgpr22, $vgpr0 |
| ; NOBC-NEXT: S_CBRANCH_SCC0 %bb.2, implicit $scc |
| ; NOBC-NEXT: S_BRANCH %bb.1 |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: bb.1: |
| ; NOBC-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000) |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: S_CBRANCH_SCC0 %bb.3, implicit $scc |
| ; NOBC-NEXT: S_BRANCH %bb.4 |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: bb.2: |
| ; NOBC-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: S_SETPC_B64 $sgpr0_sgpr1 |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: bb.3: |
| ; NOBC-NEXT: $sgpr18 = S_MOV_B32 0 |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: S_SETPC_B64_return $sgpr0_sgpr1 |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: bb.4: |
| ; NOBC-NEXT: successors: %bb.5(0x80000000) |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: $vcc_lo = S_MOV_B32 0 |
| ; NOBC-NEXT: $sgpr20 = S_MOV_B32 0 |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: $sgpr4_sgpr5 = S_SWAPPC_B64 $sgpr2_sgpr3 |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: $sgpr4 = S_ADD_U32 $sgpr4, 0, implicit-def $scc |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: bb.5: |
| ; NOBC-NEXT: successors: %bb.6(0x80000000) |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: $sgpr8_sgpr9 = S_CALL_B64 0 |
| ; NOBC-NEXT: {{ $}} |
| ; NOBC-NEXT: bb.6: |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: $sgpr22 = S_MOV_B32 $sgpr8 |
| ; NOBC-NEXT: S_ENDPGM 0 |
| ; |
| ; BC-LABEL: name: hazard_calls |
| ; BC: bb.0: |
| ; BC-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: $vgpr0 = V_WRITELANE_B32 0, $sgpr4, $vgpr0 |
| ; BC-NEXT: $vgpr0 = V_WRITELANE_B32 1, $sgpr8, $vgpr0 |
| ; BC-NEXT: $vgpr0 = V_WRITELANE_B32 2, $sgpr16, $vgpr0 |
| ; BC-NEXT: $vgpr0 = V_WRITELANE_B32 3, $sgpr18, $vgpr0 |
| ; BC-NEXT: $vgpr0 = V_WRITELANE_B32 4, $sgpr20, $vgpr0 |
| ; BC-NEXT: $vgpr0 = V_WRITELANE_B32 5, $sgpr22, $vgpr0 |
| ; BC-NEXT: S_CBRANCH_SCC0 %bb.2, implicit $scc |
| ; BC-NEXT: S_BRANCH %bb.1 |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: bb.1: |
| ; BC-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000) |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: S_CBRANCH_SCC0 %bb.3, implicit $scc |
| ; BC-NEXT: S_BRANCH %bb.4 |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: bb.2: |
| ; BC-NEXT: $sgpr16 = S_MOV_B32 0 |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; BC-NEXT: S_SETPC_B64 $sgpr0_sgpr1 |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: bb.3: |
| ; BC-NEXT: $sgpr18 = S_MOV_B32 0 |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; BC-NEXT: S_SETPC_B64_return $sgpr0_sgpr1 |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: bb.4: |
| ; BC-NEXT: successors: %bb.5(0x80000000) |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: $vcc_lo = S_MOV_B32 0 |
| ; BC-NEXT: $sgpr20 = S_MOV_B32 0 |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; BC-NEXT: $sgpr4_sgpr5 = S_SWAPPC_B64 $sgpr2_sgpr3 |
| ; BC-NEXT: $sgpr4 = S_ADD_U32 $sgpr4, 0, implicit-def $scc |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: bb.5: |
| ; BC-NEXT: successors: %bb.6(0x80000000) |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: $sgpr8_sgpr9 = S_CALL_B64 0 |
| ; BC-NEXT: {{ $}} |
| ; BC-NEXT: bb.6: |
| ; BC-NEXT: $sgpr22 = S_MOV_B32 $sgpr8 |
| ; BC-NEXT: S_ENDPGM 0 |
| bb.0: |
| $vgpr0 = V_WRITELANE_B32 0, $sgpr4, $vgpr0 |
| $vgpr0 = V_WRITELANE_B32 1, $sgpr8, $vgpr0 |
| $vgpr0 = V_WRITELANE_B32 2, $sgpr16, $vgpr0 |
| $vgpr0 = V_WRITELANE_B32 3, $sgpr18, $vgpr0 |
| $vgpr0 = V_WRITELANE_B32 4, $sgpr20, $vgpr0 |
| $vgpr0 = V_WRITELANE_B32 5, $sgpr22, $vgpr0 |
| S_CBRANCH_SCC0 %bb.2, implicit $scc |
| S_BRANCH %bb.1 |
| |
| bb.1: |
| S_CBRANCH_SCC0 %bb.3, implicit $scc |
| S_BRANCH %bb.4 |
| |
| bb.2: |
| $sgpr16 = S_MOV_B32 0 |
| S_SETPC_B64 $sgpr0_sgpr1 |
| |
| bb.3: |
| $sgpr18 = S_MOV_B32 0 |
| S_SETPC_B64_return $sgpr0_sgpr1 |
| |
| bb.4: |
| $vcc_lo = S_MOV_B32 0 |
| $sgpr20 = S_MOV_B32 0 |
| $sgpr4_sgpr5 = S_SWAPPC_B64 $sgpr2_sgpr3 |
| $sgpr4 = S_ADD_U32 $sgpr4, 0, implicit-def $scc |
| |
| bb.5: |
| $sgpr8_sgpr9 = S_CALL_B64 0 |
| |
| bb.6: |
| $sgpr22 = S_MOV_B32 $sgpr8 |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_callee1 |
| body: | |
| bb.0: |
| ; NOBC-LABEL: name: hazard_callee1 |
| ; NOBC: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: S_SETPC_B64_return $sgpr30_sgpr31 |
| ; |
| ; BC-LABEL: name: hazard_callee1 |
| ; BC: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; BC-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; BC-NEXT: S_SETPC_B64_return $sgpr30_sgpr31 |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_SETPC_B64_return $sgpr30_sgpr31 |
| ... |
| |
| --- |
| name: hazard_callee2 |
| body: | |
| bb.0: |
| ; NOBC-LABEL: name: hazard_callee2 |
| ; NOBC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; NOBC-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; NOBC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOBC-NEXT: S_SETPC_B64_return $sgpr30_sgpr31 |
| ; |
| ; BC-LABEL: name: hazard_callee2 |
| ; BC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; BC-NEXT: $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| ; BC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; BC-NEXT: $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; BC-NEXT: S_SETPC_B64_return $sgpr30_sgpr31 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $sgpr1 = S_CSELECT_B32 -1, 0, implicit $scc |
| $sgpr2 = S_ADD_U32 $sgpr1, 0, implicit-def $scc |
| S_SETPC_B64_return $sgpr30_sgpr31 |
| ... |
| |
| --- |
| name: hazard_carry_vcc |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_carry_vcc |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $vcc_lo, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, $vgpr1, implicit-def $vcc_lo, implicit $exec |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65533 |
| ; GCN-NEXT: $vgpr1 = V_ADDC_U32_e32 $vgpr2, $vgpr3, implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $vcc_lo, 0, implicit $exec |
| $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, $vgpr1, implicit-def $vcc, implicit $exec |
| $vgpr1 = V_ADDC_U32_e32 $vgpr2, $vgpr3, implicit-def $vcc, implicit $vcc, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_carry_vcc_no_hazard |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_carry_vcc_no_hazard |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $vcc_lo, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, $vgpr1, implicit-def $vcc_lo, implicit $exec |
| ; GCN-NEXT: $sgpr8 = S_MOV_B32 $vcc_lo |
| ; GCN-NEXT: $vgpr1 = V_ADDC_U32_e32 $vgpr2, $vgpr3, implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $vcc_lo, 0, implicit $exec |
| $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, $vgpr1, implicit-def $vcc, implicit $exec |
| $sgpr8 = S_MOV_B32 $vcc_lo |
| $vgpr1 = V_ADDC_U32_e32 $vgpr2, $vgpr3, implicit-def $vcc, implicit $vcc, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_carry_sgpr |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_carry_sgpr |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 61951 |
| ; GCN-NEXT: $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_carry_sgpr_no_hazard1 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_carry_sgpr_no_hazard1 |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| ; GCN-NEXT: $sgpr8 = S_MOV_B32 $sgpr0 |
| ; GCN-NEXT: $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| $sgpr8 = S_MOV_B32 $sgpr0 |
| $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_carry_sgpr_no_hazard2 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_carry_sgpr_no_hazard2 |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| ; GCN-NEXT: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, 0, 0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, 0, 0, 0, implicit $exec |
| $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_carry_sgpr_no_hazard3 |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_carry_sgpr_no_hazard3 |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| ; GCN-NEXT: $sgpr8 = S_LOAD_DWORD_IMM $sgpr6_sgpr7, 0, 0 |
| ; GCN-NEXT: $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0, $sgpr0 = V_ADD_CO_U32_e64 $vgpr0, $vgpr1, 0, implicit $exec |
| $sgpr8 = S_LOAD_DWORD_IMM $sgpr6_sgpr7, 0, 0 |
| $vgpr1, $sgpr1 = V_ADDC_U32_e64 $vgpr2, $vgpr3, $sgpr0, 0, implicit $exec |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_cull_vmem |
| body: | |
| bb.0: |
| ; NOMEMC-LABEL: name: hazard_cull_vmem |
| ; NOMEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; NOMEMC-NEXT: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, 0, 0, 0, implicit $exec |
| ; NOMEMC-NEXT: S_WAIT_LOADCNT 0 |
| ; NOMEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; NOMEMC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOMEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; NOMEMC-NEXT: S_ENDPGM 0 |
| ; |
| ; MEMC-LABEL: name: hazard_cull_vmem |
| ; MEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; MEMC-NEXT: $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, 0, 0, 0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: S_WAIT_LOADCNT 0 |
| ; MEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; MEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; MEMC-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr3 = BUFFER_LOAD_DWORD_OFFSET $sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8, 0, 0, 0, implicit $exec |
| S_WAIT_LOADCNT 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_cull_sample |
| body: | |
| bb.0: |
| ; NOMEMC-LABEL: name: hazard_cull_sample |
| ; NOMEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; NOMEMC-NEXT: $vgpr10 = IMAGE_SAMPLE_LZ_V1_V2_gfx12 $vgpr3, $vgpr4, $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9_sgpr10_sgpr11, 1, 1, -1, 0, 0, 0, 0, 0, 0, implicit $exec :: (load (s128)) |
| ; NOMEMC-NEXT: S_WAIT_SAMPLECNT 0 |
| ; NOMEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; NOMEMC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOMEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; NOMEMC-NEXT: S_ENDPGM 0 |
| ; |
| ; MEMC-LABEL: name: hazard_cull_sample |
| ; MEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; MEMC-NEXT: $vgpr10 = IMAGE_SAMPLE_LZ_V1_V2_gfx12 $vgpr3, $vgpr4, $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9_sgpr10_sgpr11, 1, 1, -1, 0, 0, 0, 0, 0, 0, implicit $exec :: (load (s128)) |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: S_WAIT_SAMPLECNT 0 |
| ; MEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; MEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; MEMC-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr10 = IMAGE_SAMPLE_LZ_V1_V2_gfx12 $vgpr3, $vgpr4, $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, $sgpr8_sgpr9_sgpr10_sgpr11, 1, 1, -1, 0, 0, 0, 0, 0, 0, implicit $exec :: (load (s128)) |
| S_WAIT_SAMPLECNT 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_cull_bvh |
| body: | |
| bb.0: |
| ; NOMEMC-LABEL: name: hazard_cull_bvh |
| ; NOMEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; NOMEMC-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMAGE_BVH_INTERSECT_RAY_sa_gfx11 $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, implicit $exec :: (dereferenceable load (s128), addrspace 7) |
| ; NOMEMC-NEXT: S_WAIT_BVHCNT 0 |
| ; NOMEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; NOMEMC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOMEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; NOMEMC-NEXT: S_ENDPGM 0 |
| ; |
| ; MEMC-LABEL: name: hazard_cull_bvh |
| ; MEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; MEMC-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMAGE_BVH_INTERSECT_RAY_sa_gfx11 $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, implicit $exec :: (dereferenceable load (s128), addrspace 7) |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: S_WAIT_BVHCNT 0 |
| ; MEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; MEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; MEMC-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0_vgpr1_vgpr2_vgpr3 = IMAGE_BVH_INTERSECT_RAY_sa_gfx11 $vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14, renamable $sgpr0_sgpr1_sgpr2_sgpr3, 0, implicit $exec :: (dereferenceable load (s128), addrspace 7) |
| S_WAIT_BVHCNT 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_nocull_scratch |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_nocull_scratch |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD $vgpr0, 0, 0, implicit $exec, implicit $flat_scr |
| ; GCN-NEXT: S_WAIT_LOADCNT 0 |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0 = SCRATCH_LOAD_DWORD $vgpr0, 0, 0, implicit $exec, implicit $flat_scr |
| S_WAIT_LOADCNT 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_cull_global |
| body: | |
| bb.0: |
| ; NOMEMC-LABEL: name: hazard_cull_global |
| ; NOMEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; NOMEMC-NEXT: $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec |
| ; NOMEMC-NEXT: S_WAIT_LOADCNT 0 |
| ; NOMEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; NOMEMC-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; NOMEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; NOMEMC-NEXT: S_ENDPGM 0 |
| ; |
| ; MEMC-LABEL: name: hazard_cull_global |
| ; MEMC: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; MEMC-NEXT: $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; MEMC-NEXT: S_WAIT_LOADCNT 0 |
| ; MEMC-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; MEMC-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; MEMC-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec |
| S_WAIT_LOADCNT 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_nocull_flat |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_nocull_flat |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: $vgpr0 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr |
| ; GCN-NEXT: S_WAIT_LOADCNT 0 |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: S_WAITCNT_DEPCTR 65534 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| $vgpr0 = FLAT_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec, implicit $flat_scr |
| S_WAIT_LOADCNT 0 |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |
| |
| --- |
| name: hazard_existing_cull |
| body: | |
| bb.0: |
| ; GCN-LABEL: name: hazard_existing_cull |
| ; GCN: $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| ; GCN-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; GCN-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; GCN-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; GCN-NEXT: DS_NOP implicit $m0, implicit $exec |
| ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64 |
| ; GCN-NEXT: $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| ; GCN-NEXT: S_ENDPGM 0 |
| $vgpr1, $sgpr0 = V_ADDC_U32_e64 0, $vgpr1, $sgpr0, 0, implicit $exec |
| DS_NOP implicit $m0, implicit $exec |
| DS_NOP implicit $m0, implicit $exec |
| DS_NOP implicit $m0, implicit $exec |
| DS_NOP implicit $m0, implicit $exec |
| $sgpr0_sgpr1 = S_GETPC_B64 |
| $sgpr3 = S_ADD_U32 $sgpr0, 0, implicit-def $scc |
| S_ENDPGM 0 |
| ... |