| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: opt -passes=loop-vectorize -prefer-predicate-over-epilogue=predicate-else-scalar-epilogue -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s |
| |
| ; Make sure we don't crash when transforming a VPWidenCastRecipe created without |
| ; an underlying value to an EVL recipe. This occurs in this test via |
| ; VPlanTransforms::truncateToMinimalBitwidths |
| |
| define void @truncate_to_minimal_bitwidths_widen_cast_recipe(ptr %src) { |
| ; CHECK-LABEL: define void @truncate_to_minimal_bitwidths_widen_cast_recipe( |
| ; CHECK-SAME: ptr [[SRC:%.*]]) #[[ATTR0:[0-9]+]] { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 9, %[[VECTOR_PH]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 8, i1 true) |
| ; CHECK-NEXT: call void @llvm.vp.scatter.nxv8i8.nxv8p0(<vscale x 8 x i8> zeroinitializer, <vscale x 8 x ptr> align 1 zeroinitializer, <vscale x 8 x i1> splat (i1 true), i32 [[TMP7]]) |
| ; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[TMP7]] to i64 |
| ; CHECK-NEXT: [[AVL_NEXT]] = sub nuw i64 [[AVL]], [[TMP9]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[AVL_NEXT]], 0 |
| ; CHECK-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: br label %[[EXIT:.*]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: ; preds = %loop, %entry |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| %gep.src = getelementptr i8, ptr %src, i64 %iv |
| %0 = load i8, ptr %gep.src, align 1 |
| %conv = zext i8 %0 to i32 |
| %mul16 = mul i32 0, %conv |
| %shr35 = lshr i32 %mul16, 1 |
| %conv36 = trunc i32 %shr35 to i8 |
| store i8 %conv36, ptr null, align 1 |
| %iv.next = add i64 %iv, 1 |
| %ec = icmp eq i64 %iv, 8 |
| br i1 %ec, label %exit, label %loop |
| |
| exit: ; preds = %loop |
| ret void |
| } |
| |
| ; Test case for https://github.com/llvm/llvm-project/issues/162374. |
| define void @truncate_i16_to_i8_cse(ptr noalias %src, ptr noalias %dst) { |
| ; CHECK-LABEL: define void @truncate_i16_to_i8_cse( |
| ; CHECK-SAME: ptr noalias [[SRC:%.*]], ptr noalias [[DST:%.*]]) #[[ATTR0]] { |
| ; CHECK-NEXT: [[ENTRY:.*]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 3 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 4294967296, [[TMP1]] |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64() |
| ; CHECK-NEXT: [[TMP3:%.*]] = mul nuw i64 [[TMP2]], 8 |
| ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 4294967296, [[TMP3]] |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 4294967296, [[N_MOD_VF]] |
| ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[N_VEC]] to i32 |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[SRC]], align 2 |
| ; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 8 x i16> poison, i16 [[TMP5]], i64 0 |
| ; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 8 x i16> [[BROADCAST_SPLATINSERT]], <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer |
| ; CHECK-NEXT: [[TMP6:%.*]] = trunc <vscale x 8 x i16> [[BROADCAST_SPLAT]] to <vscale x 8 x i8> |
| ; CHECK-NEXT: [[TMP7:%.*]] = call i32 @llvm.vscale.i32() |
| ; CHECK-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP7]], 8 |
| ; CHECK-NEXT: [[TMP9:%.*]] = sub i32 [[TMP8]], 1 |
| ; CHECK-NEXT: [[TMP10:%.*]] = extractelement <vscale x 8 x i8> [[TMP6]], i32 [[TMP9]] |
| ; CHECK-NEXT: store i8 [[TMP10]], ptr null, align 1 |
| ; CHECK-NEXT: store i8 [[TMP10]], ptr [[DST]], align 1 |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]] |
| ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 4294967296, [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; CHECK-NEXT: [[BC_RESUME_VAL1:%.*]] = phi i32 [ [[TMP4]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ] |
| ; CHECK-NEXT: br label %[[LOOP:.*]] |
| ; CHECK: [[LOOP]]: |
| ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ] |
| ; CHECK-NEXT: [[COUNT:%.*]] = phi i32 [ [[BC_RESUME_VAL1]], %[[SCALAR_PH]] ], [ [[COUNT_NEXT:%.*]], %[[LOOP]] ] |
| ; CHECK-NEXT: [[VAL:%.*]] = load i16, ptr [[SRC]], align 2 |
| ; CHECK-NEXT: [[VAL_ZEXT:%.*]] = zext i16 [[VAL]] to i64 |
| ; CHECK-NEXT: [[VAL_TRUNC_ZEXT:%.*]] = trunc i64 [[VAL_ZEXT]] to i8 |
| ; CHECK-NEXT: store i8 [[VAL_TRUNC_ZEXT]], ptr null, align 1 |
| ; CHECK-NEXT: [[VAL_TRUNC:%.*]] = trunc i16 [[VAL]] to i8 |
| ; CHECK-NEXT: store i8 [[VAL_TRUNC]], ptr [[DST]], align 1 |
| ; CHECK-NEXT: [[COUNT_NEXT]] = add i32 [[COUNT]], 1 |
| ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[COUNT_NEXT]], 0 |
| ; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1 |
| ; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT]], label %[[LOOP]], !llvm.loop [[LOOP4:![0-9]+]] |
| ; CHECK: [[EXIT]]: |
| ; CHECK-NEXT: ret void |
| ; |
| entry: |
| br label %loop |
| |
| loop: ; preds = %loop, %entry |
| %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| %count = phi i32 [ 0, %entry ], [ %count.next, %loop ] |
| %val = load i16, ptr %src, align 2 |
| %val.zext = zext i16 %val to i64 |
| %val.trunc.zext = trunc i64 %val.zext to i8 |
| store i8 %val.trunc.zext, ptr null, align 1 |
| %val.trunc = trunc i16 %val to i8 |
| store i8 %val.trunc, ptr %dst, align 1 |
| %count.next = add i32 %count, 1 |
| %exitcond = icmp eq i32 %count.next, 0 |
| %iv.next = add i64 %iv, 1 |
| br i1 %exitcond, label %exit, label %loop |
| |
| exit: ; preds = %loop |
| ret void |
| } |
| |
| ;. |
| ; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]} |
| ; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1} |
| ; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"} |
| ; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META1]], [[META2]]} |
| ; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META2]], [[META1]]} |
| ;. |
