llvm/test/CodeGen/AArch64/GlobalISel/select-bit.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s

...
---
name:            BITv8i8_v2s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1, $d2

    ; CHECK-LABEL: name: BITv8i8_v2s32
    ; CHECK: liveins: $d0, $d1, $d2
    ; CHECK: %lhs:fpr64 = COPY $d0
    ; CHECK: %mhs:fpr64 = COPY $d1
    ; CHECK: %rhs:fpr64 = COPY $d2
    ; CHECK: %bit:fpr64 = BITv8i8 %lhs, %mhs, %rhs
    ; CHECK: $d0 = COPY %bit
    ; CHECK: RET_ReallyLR implicit $d0
    %lhs:fpr(<2 x s32>) = COPY $d0
    %mhs:fpr(<2 x s32>) = COPY $d1
    %rhs:fpr(<2 x s32>) = COPY $d2
    %bit:fpr(<2 x s32>) = G_BIT %lhs, %mhs, %rhs
    $d0 = COPY %bit(<2 x s32>)
    RET_ReallyLR implicit $d0

...
---
name:            BITv8i8_v4s16
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1, $d2
    ; CHECK-LABEL: name: BITv8i8_v4s16
    ; CHECK: liveins: $d0, $d1, $d2
    ; CHECK: %lhs:fpr64 = COPY $d0
    ; CHECK: %mhs:fpr64 = COPY $d1
    ; CHECK: %rhs:fpr64 = COPY $d2
    ; CHECK: %bit:fpr64 = BITv8i8 %lhs, %mhs, %rhs
    ; CHECK: $d0 = COPY %bit
    ; CHECK: RET_ReallyLR implicit $d0
    %lhs:fpr(<4 x s16>) = COPY $d0
    %mhs:fpr(<4 x s16>) = COPY $d1
    %rhs:fpr(<4 x s16>) = COPY $d2
    %bit:fpr(<4 x s16>) = G_BIT %lhs, %mhs, %rhs
    $d0 = COPY %bit(<4 x s16>)
    RET_ReallyLR implicit $d0

...
---
name:            BITv16i8_v2s64
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1, $q2

    ; CHECK-LABEL: name: BITv16i8_v2s64
    ; CHECK: liveins: $q0, $q1, $q2
    ; CHECK: %lhs:fpr128 = COPY $q0
    ; CHECK: %mhs:fpr128 = COPY $q1
    ; CHECK: %rhs:fpr128 = COPY $q2
    ; CHECK: %bit:fpr128 = BITv16i8 %lhs, %mhs, %rhs
    ; CHECK: $q0 = COPY %bit
    ; CHECK: RET_ReallyLR implicit $q0
    %lhs:fpr(<2 x s64>) = COPY $q0
    %mhs:fpr(<2 x s64>) = COPY $q1
    %rhs:fpr(<2 x s64>) = COPY $q2
    %bit:fpr(<2 x s64>) = G_BIT %lhs, %mhs, %rhs
    $q0 = COPY %bit(<2 x s64>)
    RET_ReallyLR implicit $q0

...
---
name:            BITv16i8_v4s32
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1, $q2

    ; CHECK-LABEL: name: BITv16i8_v4s32
    ; CHECK: liveins: $q0, $q1, $q2
    ; CHECK: %lhs:fpr128 = COPY $q0
    ; CHECK: %mhs:fpr128 = COPY $q1
    ; CHECK: %rhs:fpr128 = COPY $q2
    ; CHECK: %bit:fpr128 = BITv16i8 %lhs, %mhs, %rhs
    ; CHECK: $q0 = COPY %bit
    ; CHECK: RET_ReallyLR implicit $q0
    %lhs:fpr(<4 x s32>) = COPY $q0
    %mhs:fpr(<4 x s32>) = COPY $q1
    %rhs:fpr(<4 x s32>) = COPY $q2
    %bit:fpr(<4 x s32>) = G_BIT %lhs, %mhs, %rhs
    $q0 = COPY %bit(<4 x s32>)
    RET_ReallyLR implicit $q0

...
---
name:            BITv16i8_v8s16
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1, $q2

    ; CHECK-LABEL: name: BITv16i8_v8s16
    ; CHECK: liveins: $q0, $q1, $q2
    ; CHECK: %lhs:fpr128 = COPY $q0
    ; CHECK: %mhs:fpr128 = COPY $q1
    ; CHECK: %rhs:fpr128 = COPY $q2
    ; CHECK: %bit:fpr128 = BITv16i8 %lhs, %mhs, %rhs
    ; CHECK: $q0 = COPY %bit
    ; CHECK: RET_ReallyLR implicit $q0
    %lhs:fpr(<8 x s16>) = COPY $q0
    %mhs:fpr(<8 x s16>) = COPY $q1
    %rhs:fpr(<8 x s16>) = COPY $q2
    %bit:fpr(<8 x s16>) = G_BIT %lhs, %mhs, %rhs
    $q0 = COPY %bit(<8 x s16>)
    RET_ReallyLR implicit $q0

...
---
name:            BITv16i8_v16s8
legalized:       true
regBankSelected: true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1, $q2

    ; CHECK-LABEL: name: BITv16i8_v16s8
    ; CHECK: liveins: $q0, $q1, $q2
    ; CHECK: %lhs:fpr128 = COPY $q0
    ; CHECK: %mhs:fpr128 = COPY $q1
    ; CHECK: %rhs:fpr128 = COPY $q2
    ; CHECK: %bit:fpr128 = BITv16i8 %lhs, %mhs, %rhs
    ; CHECK: $q0 = COPY %bit
    ; CHECK: RET_ReallyLR implicit $q0
    %lhs:fpr(<16 x s8>) = COPY $q0
    %mhs:fpr(<16 x s8>) = COPY $q1
    %rhs:fpr(<16 x s8>) = COPY $q2
    %bit:fpr(<16 x s8>) = G_BIT %lhs, %mhs, %rhs
    $q0 = COPY %bit(<16 x s8>)
    RET_ReallyLR implicit $q0