Revert "(reland) [GlobalISel] Diagnose inline assembly constraint lowering errors (#139049)" This reverts commit 534d221b63bb52f64e1f3ad3c40cfb87323d28ec.
diff --git a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp index ec3fc47..81f25b2 100644 --- a/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp +++ b/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
@@ -16,7 +16,6 @@ #include "llvm/CodeGen/MachineOperand.h" #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/CodeGen/TargetLowering.h" -#include "llvm/IR/DiagnosticInfo.h" #include "llvm/IR/Module.h" #define DEBUG_TYPE "inline-asm-lowering" @@ -232,19 +231,6 @@ TargetLowering::AsmOperandInfoVector TargetConstraints = TLI->ParseConstraints(DL, TRI, Call); - const auto ConstraintError = [&](const GISelAsmOperandInfo &Info, Twine Msg) { - // Use warnings in combination with a "return false" to trigger the fallback - // path. If fallback isn't enabled, then another error will be emitted later - // and the warnings will provide context as to why the error occured. - LLVMContext &Ctx = MIRBuilder.getContext(); - Ctx.diagnose(DiagnosticInfoInlineAsm( - Call, "invalid constraint '" + Info.ConstraintCode + "': " + Msg, - DS_Warning)); - // TODO: If we could detect that the fallback isn't enabled, we could - // recover here by defining all result registers as G_IMPLICIT_DEF. - return false; - }; - ExtraFlags ExtraInfo(Call); unsigned ArgNo = 0; // ArgNo - The argument of the CallInst. unsigned ResNo = 0; // ResNo - The result number of the next output. @@ -257,8 +243,8 @@ OpInfo.CallOperandVal = const_cast<Value *>(Call.getArgOperand(ArgNo)); if (isa<BasicBlock>(OpInfo.CallOperandVal)) { - return ConstraintError(OpInfo, - "basic block input operands not supported yet"); + LLVM_DEBUG(dbgs() << "Basic block input operands not supported yet\n"); + return false; } Type *OpTy = OpInfo.CallOperandVal->getType(); @@ -272,8 +258,9 @@ // FIXME: Support aggregate input operands if (!OpTy->isSingleValueType()) { - return ConstraintError(OpInfo, - "aggregate input operands not supported yet"); + LLVM_DEBUG( + dbgs() << "Aggregate input operands are not supported yet\n"); + return false; } OpInfo.ConstraintVT = @@ -357,8 +344,9 @@ // Find a register that we can use. if (OpInfo.Regs.empty()) { - return ConstraintError( - OpInfo, "could not allocate output register for constraint"); + LLVM_DEBUG(dbgs() + << "Couldn't allocate output register for constraint\n"); + return false; } // Add information to the INLINEASM instruction to know that this @@ -401,13 +389,13 @@ const InlineAsm::Flag MatchedOperandFlag(Inst->getOperand(InstFlagIdx).getImm()); if (MatchedOperandFlag.isMemKind()) { - return ConstraintError( - OpInfo, - "matching input constraint to mem operand not supported; this " - "should be target specific"); + LLVM_DEBUG(dbgs() << "Matching input constraint to mem operand not " + "supported. This should be target specific.\n"); + return false; } if (!MatchedOperandFlag.isRegDefKind() && !MatchedOperandFlag.isRegDefEarlyClobberKind()) { - return ConstraintError(OpInfo, "unknown matching constraint"); + LLVM_DEBUG(dbgs() << "Unknown matching constraint\n"); + return false; } // We want to tie input to register in next operand. @@ -437,10 +425,9 @@ if (OpInfo.ConstraintType == TargetLowering::C_Other && OpInfo.isIndirect) { - return ConstraintError( - OpInfo, - "indirect input operands with unknown constraint not supported " - "yet"); + LLVM_DEBUG(dbgs() << "Indirect input operands with unknown constraint " + "not supported yet\n"); + return false; } if (OpInfo.ConstraintType == TargetLowering::C_Immediate || @@ -450,7 +437,9 @@ if (!lowerAsmOperandForConstraint(OpInfo.CallOperandVal, OpInfo.ConstraintCode, Ops, MIRBuilder)) { - return ConstraintError(OpInfo, "unsupported constraint"); + LLVM_DEBUG(dbgs() << "Don't support constraint: " + << OpInfo.ConstraintCode << " yet\n"); + return false; } assert(Ops.size() > 0 && @@ -467,8 +456,9 @@ if (OpInfo.ConstraintType == TargetLowering::C_Memory) { if (!OpInfo.isIndirect) { - return ConstraintError( - OpInfo, "indirect memory input operands are not supported yet"); + LLVM_DEBUG(dbgs() + << "Cannot indirectify memory input operands yet\n"); + return false; } assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!"); @@ -492,15 +482,18 @@ "Unknown constraint type!"); if (OpInfo.isIndirect) { - return ConstraintError( - OpInfo, "indirect register inputs are not supported yet"); + LLVM_DEBUG(dbgs() << "Can't handle indirect register inputs yet " + "for constraint '" + << OpInfo.ConstraintCode << "'\n"); + return false; } // Copy the input into the appropriate registers. if (OpInfo.Regs.empty()) { - return ConstraintError( - OpInfo, - "could not allocate input register for register constraint"); + LLVM_DEBUG( + dbgs() + << "Couldn't allocate input register for register constraint\n"); + return false; } unsigned NumRegs = OpInfo.Regs.size(); @@ -510,10 +503,9 @@ "source registers"); if (NumRegs > 1) { - return ConstraintError( - OpInfo, - "input operands with multiple input registers are not supported " - "yet"); + LLVM_DEBUG(dbgs() << "Input operands with multiple input registers are " + "not supported yet\n"); + return false; } InlineAsm::Flag Flag(InlineAsm::Kind::RegUse, NumRegs);
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-lowering-diags.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-lowering-diags.ll deleted file mode 100644 index 897e281..0000000 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-lowering-diags.ll +++ /dev/null
@@ -1,30 +0,0 @@ -; RUN: not llc -mtriple=amdgcn -mcpu=fiji -O0 -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2>&1 | FileCheck %s - -; CHECK: warning: invalid constraint '': aggregate input operands not supported yet -define amdgpu_kernel void @aggregates([4 x i8] %val) { - tail call void asm sideeffect "s_nop", "r"([4 x i8] %val) - ret void -} - -; CHECK: warning: invalid constraint '{s999}': could not allocate output register for constraint -define amdgpu_kernel void @bad_output() { - tail call i32 asm sideeffect "s_nop", "={s999}"() - ret void -} - -; CHECK: warning: invalid constraint '{s998}': could not allocate input register for register constraint -define amdgpu_kernel void @bad_input() { - tail call void asm sideeffect "s_nop", "{s998}"(i32 poison) - ret void -} -; CHECK: warning: invalid constraint '{s997}': indirect register inputs are not supported yet -define amdgpu_kernel void @indirect_input() { - tail call void asm sideeffect "s_nop", "*{s997}"(ptr elementtype(i32) poison) - ret void -} - -; CHECK: warning: invalid constraint 'i': unsupported constraint -define amdgpu_kernel void @badimm() { - tail call void asm sideeffect "s_nop", "i"(i32 poison) - ret void -}