llvm/test/CodeGen/X86/setcc-poison.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s

; Test that X86ISD::SETCC and X86ISD::SETCC_CARRY are guaranteed not to be poison/undef
; This ensures that freeze nodes can be folded away and don't break ISel patterns

; Test basic SETCC with freeze - should fold freeze away
define i32 @setcc_eq_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_eq_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    retq
  %cmp = icmp eq i32 %a, %b
  %frozen = freeze i1 %cmp
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

define i32 @setcc_ne_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_ne_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    setne %al
; CHECK-NEXT:    retq
  %cmp = icmp ne i32 %a, %b
  %frozen = freeze i1 %cmp
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

; Test all integer comparison conditions with freeze
define i32 @setcc_slt_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_slt_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    setl %al
; CHECK-NEXT:    retq
  %cmp = icmp slt i32 %a, %b
  %frozen = freeze i1 %cmp
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

define i32 @setcc_ult_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_ult_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    setb %al
; CHECK-NEXT:    retq
  %cmp = icmp ult i32 %a, %b
  %frozen = freeze i1 %cmp
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

; Test SETCC_CARRY with freeze - carry flag reading should not be poison
define i32 @setcc_carry_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_carry_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    sbbl %eax, %eax
; CHECK-NEXT:    retq
  %cmp = icmp ult i32 %a, %b
  %frozen = freeze i1 %cmp
  %sel = select i1 %frozen, i32 -1, i32 0
  ret i32 %sel
}

; Test with floating-point comparison (X86ISD::FCMP -> X86ISD::SETCC)
define i32 @setcc_fcmp_freeze(float %a, float %b) {
; CHECK-LABEL: setcc_fcmp_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    cmpeqss %xmm1, %xmm0
; CHECK-NEXT:    movd %xmm0, %eax
; CHECK-NEXT:    andl $1, %eax
; CHECK-NEXT:    retq
  %cmp = fcmp oeq float %a, %b
  %frozen = freeze i1 %cmp
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

; Test that EFLAGS from arithmetic operations are not poison
define i32 @setcc_add_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_add_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    addl %esi, %edi
; CHECK-NEXT:    seto %al
; CHECK-NEXT:    retq
  %add = call {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
  %ovf = extractvalue {i32, i1} %add, 1
  %frozen = freeze i1 %ovf
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

; Test that EFLAGS from SUB operations are not poison
define i32 @setcc_sub_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_sub_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    seto %al
; CHECK-NEXT:    retq
  %sub = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %a, i32 %b)
  %ovf = extractvalue {i32, i1} %sub, 1
  %frozen = freeze i1 %ovf
  %ext = zext i1 %frozen to i32
  ret i32 %ext
}

; Test chained freeze - both should fold
define i32 @setcc_double_freeze(i32 %a, i32 %b) {
; CHECK-LABEL: setcc_double_freeze:
; CHECK:       # %bb.0:
; CHECK-NEXT:    xorl %eax, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    sete %al
; CHECK-NEXT:    retq
  %cmp = icmp eq i32 %a, %b
  %frozen1 = freeze i1 %cmp
  %frozen2 = freeze i1 %frozen1
  %ext = zext i1 %frozen2 to i32
  ret i32 %ext
}

; Test that freeze doesn't prevent pattern matching for CMOV
define i32 @setcc_freeze_cmov(i32 %a, i32 %b, i32 %c, i32 %d) {
; CHECK-LABEL: setcc_freeze_cmov:
; CHECK:       # %bb.0:
; CHECK-NEXT:    movl %edx, %eax
; CHECK-NEXT:    cmpl %esi, %edi
; CHECK-NEXT:    cmovll %ecx, %eax
; CHECK-NEXT:    retq
  %cmp = icmp sge i32 %a, %b
  %frozen = freeze i1 %cmp
  %sel = select i1 %frozen, i32 %c, i32 %d
  ret i32 %sel
}

declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32)