| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6 |
| # RUN: llc -mtriple=riscv32 -mattr=+experimental-xqcilsm -run-pass=riscv-load-store-opt %s -o - | FileCheck %s |
| |
| --- | |
| |
| define void @pair_two_lw_into_qc_lwmi() nounwind { ret void } |
| define void @pair_two_lw_into_qc_lwmi_reversed() nounwind { ret void } |
| define void @pair_two_sw_into_qc_swmi_reversed() nounwind { ret void } |
| define void @no_pair_if_different_base_regs() nounwind { ret void } |
| define void @no_pair_if_alignment_lt_4() nounwind { ret void } |
| define void @pair_two_sw_into_qc_swmi() nounwind { ret void } |
| define void @no_pair_if_misaligned() nounwind { ret void } |
| define void @pair_at_upper_boundary_lw() nounwind { ret void } |
| define void @pair_at_upper_boundary_sw() nounwind { ret void } |
| define void @no_pair_if_offset_out_of_range_lw() nounwind { ret void } |
| define void @no_pair_if_offset_out_of_range_sw() nounwind { ret void } |
| define void @no_pair_if_non_consecutive_regs() nounwind { ret void } |
| define void @no_pair_if_rd_is_x0() nounwind { ret void } |
| define void @no_pair_if_lw_rd_equals_base() nounwind { ret void } |
| define void @pair_if_not_adjacent() nounwind { ret void } |
| define void @pair_if_not_adjacent_use() nounwind { ret void } |
| define void @no_pair_if_not_adjacent_use() nounwind { ret void } |
| define void @pair_two_sw_into_qc_setwmi() nounwind { ret void } |
| define void @pair_two_sw_into_qc_setwmi_reversed() nounwind { ret void } |
| define void @pair_if_not_adjacent_setwmi() nounwind { ret void } |
| --- |
| name: pair_two_lw_into_qc_lwmi |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: pair_two_lw_into_qc_lwmi |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = QC_LWMI $x10, 2, 0, implicit-def $x13 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x12 = LW $x10, 0 :: (load (s32), align 4) |
| $x13 = LW $x10, 4 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| # FIXME: Kill flags are not propagated correctly for the base register |
| name: pair_two_lw_into_qc_lwmi_reversed |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: pair_two_lw_into_qc_lwmi_reversed |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = QC_LWMI $x10, 2, 0, implicit-def $x13 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x13 = LW $x10, 4 :: (load (s32)) |
| $x12 = LW killed $x10, 0 :: (load (s32)) |
| PseudoRET |
| |
| ... |
| --- |
| name: pair_two_sw_into_qc_swmi_reversed |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x12, $x13 |
| ; CHECK-LABEL: name: pair_two_sw_into_qc_swmi_reversed |
| ; CHECK: liveins: $x10, $x12, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: QC_SWMI killed $x12, $x10, 2, 0, implicit killed $x13 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW killed $x13, $x10, 4 :: (store (s32)) |
| SW killed $x12, $x10, 0 :: (store (s32)) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_different_base_regs |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x11 |
| ; CHECK-LABEL: name: no_pair_if_different_base_regs |
| ; CHECK: liveins: $x10, $x11 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = LW $x10, 0 :: (load (s32)) |
| ; CHECK-NEXT: $x13 = LW $x11, 4 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x12 = LW $x10, 0 :: (load (s32)) |
| $x13 = LW $x11, 4 :: (load (s32)) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_alignment_lt_4 |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: no_pair_if_alignment_lt_4 |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = LW $x10, 0 :: (load (s32)) |
| ; CHECK-NEXT: $x13 = LW $x10, 3 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x12 = LW $x10, 0 :: (load (s32)) |
| $x13 = LW $x10, 3 :: (load (s32)) |
| PseudoRET |
| |
| ... |
| --- |
| name: pair_two_sw_into_qc_swmi |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x12, $x13 |
| ; CHECK-LABEL: name: pair_two_sw_into_qc_swmi |
| ; CHECK: liveins: $x10, $x12, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: QC_SWMI killed $x12, $x10, 2, 0, implicit killed $x13 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW killed $x12, $x10, 0 :: (store (s32), align 4) |
| SW killed $x13, $x10, 4 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_misaligned |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: no_pair_if_misaligned |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = LW $x10, 2 :: (load (s32)) |
| ; CHECK-NEXT: $x13 = LW $x10, 6 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x12 = LW $x10, 2 :: (load (s32), align 4) |
| $x13 = LW $x10, 6 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| # FIXME: Kill flags are not propagated correctly for the base register |
| name: pair_at_upper_boundary_lw |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: pair_at_upper_boundary_lw |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = QC_LWMI $x10, 2, 124, implicit-def $x13 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x12 = LW $x10, 124 :: (load (s32), align 4) |
| $x13 = LW killed $x10, 128 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| # FIXME: Kill flags are not propagated correctly for the base register |
| name: pair_at_upper_boundary_sw |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x12, $x13 |
| ; CHECK-LABEL: name: pair_at_upper_boundary_sw |
| ; CHECK: liveins: $x10, $x12, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: QC_SWMI $x12, $x10, 2, 124, implicit $x13 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW $x12, $x10, 124 :: (store (s32), align 4) |
| SW $x13, killed $x10, 128 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_offset_out_of_range_lw |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: no_pair_if_offset_out_of_range_lw |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x12 = LW $x10, 128 :: (load (s32)) |
| ; CHECK-NEXT: $x13 = LW $x10, 132 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x12 = LW $x10, 128 :: (load (s32), align 4) |
| $x13 = LW $x10, 132 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_offset_out_of_range_sw |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x12, $x13 |
| ; CHECK-LABEL: name: no_pair_if_offset_out_of_range_sw |
| ; CHECK: liveins: $x10, $x12, $x13 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: SW $x12, $x10, 128 :: (store (s32)) |
| ; CHECK-NEXT: SW $x13, $x10, 132 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW $x12, $x10, 128 :: (store (s32), align 4) |
| SW $x13, $x10, 132 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_non_consecutive_regs |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: no_pair_if_non_consecutive_regs |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x11 = LW $x10, 0 :: (load (s32)) |
| ; CHECK-NEXT: $x13 = LW $x10, 4 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x11 = LW $x10, 0 :: (load (s32), align 4) |
| $x13 = LW $x10, 4 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_rd_is_x0 |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: no_pair_if_rd_is_x0 |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x0 = LW $x10, 0 :: (load (s32)) |
| ; CHECK-NEXT: $x1 = LW $x10, 4 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x0 = LW $x10, 0 :: (load (s32), align 4) |
| $x1 = LW $x10, 4 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_lw_rd_equals_base |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: no_pair_if_lw_rd_equals_base |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x10 = LW $x10, 20 :: (load (s32)) |
| ; CHECK-NEXT: $x11 = LW $x10, 24 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x10 = LW $x10, 20 :: (load (s32), align 4) |
| $x11 = LW $x10, 24 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| # FIXME: Kill flags are not propagated correctly for the base register |
| name: pair_if_not_adjacent |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10 |
| ; CHECK-LABEL: name: pair_if_not_adjacent |
| ; CHECK: liveins: $x10 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x1 = QC_LWMI $x10, 2, 20, implicit-def $x2 :: (load (s32)) |
| ; CHECK-NEXT: $x3 = ADDI $x1, 10 |
| ; CHECK-NEXT: PseudoRET |
| $x1 = LW $x10, 20 :: (load (s32), align 4) |
| $x3 = ADDI $x1, 10 |
| $x2 = LW killed $x10, 24 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: pair_if_not_adjacent_use |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x1, $x2 |
| ; CHECK-LABEL: name: pair_if_not_adjacent_use |
| ; CHECK: liveins: $x10, $x1, $x2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x2 = ADDI $x2, 10 |
| ; CHECK-NEXT: QC_SWMI $x1, $x10, 2, 20, implicit $x2 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW $x1, $x10, 20 :: (store (s32), align 4) |
| $x2 = ADDI $x2, 10 |
| SW $x2, $x10, 24 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: no_pair_if_not_adjacent_use |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x2 |
| ; CHECK-LABEL: name: no_pair_if_not_adjacent_use |
| ; CHECK: liveins: $x10, $x2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: $x1 = LW $x10, 20 :: (load (s32)) |
| ; CHECK-NEXT: $x1 = ADDI $x1, 10 |
| ; CHECK-NEXT: SW $x2, $x10, 40 :: (store (s32)) |
| ; CHECK-NEXT: $x2 = LW $x10, 24 :: (load (s32)) |
| ; CHECK-NEXT: PseudoRET |
| $x1 = LW $x10, 20 :: (load (s32), align 4) |
| $x1 = ADDI $x1, 10 |
| SW $x2, $x10, 40 :: (store (s32), align 4) |
| $x2 = LW $x10, 24 :: (load (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: pair_two_sw_into_qc_setwmi |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x1 |
| ; CHECK-LABEL: name: pair_two_sw_into_qc_setwmi |
| ; CHECK: liveins: $x10, $x1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: QC_SETWMI $x1, $x10, 2, 20 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW $x1, $x10, 20 :: (store (s32), align 4) |
| SW $x1, $x10, 24 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: pair_two_sw_into_qc_setwmi_reversed |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x2 |
| ; CHECK-LABEL: name: pair_two_sw_into_qc_setwmi_reversed |
| ; CHECK: liveins: $x10, $x2 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: QC_SETWMI $x2, $x10, 2, 20 :: (store (s32)) |
| ; CHECK-NEXT: PseudoRET |
| SW $x2, $x10, 24 :: (store (s32), align 4) |
| SW $x2, $x10, 20 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
| --- |
| name: pair_if_not_adjacent_setwmi |
| tracksRegLiveness: false |
| body: | |
| bb.0: |
| liveins: $x10, $x1 |
| ; CHECK-LABEL: name: pair_if_not_adjacent_setwmi |
| ; CHECK: liveins: $x10, $x1 |
| ; CHECK-NEXT: {{ $}} |
| ; CHECK-NEXT: QC_SETWMI killed $x1, $x10, 2, 20 :: (store (s32)) |
| ; CHECK-NEXT: $x2 = ADDI $x2, 10 |
| ; CHECK-NEXT: PseudoRET |
| SW $x1, $x10, 20 :: (store (s32), align 4) |
| $x2 = ADDI $x2, 10 |
| SW killed $x1, $x10, 24 :: (store (s32), align 4) |
| PseudoRET |
| |
| ... |
