llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
; RUN: opt -S < %s -p loop-vectorize -force-vector-width=4 -force-target-supports-masked-memory-ops -enable-early-exit-vectorization-with-side-effects | FileCheck %s

define void @combined_exit_conditions(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[SCALAR_PH:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY1:.*]]
; CHECK:       [[FOR_BODY1]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY1]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = select i1 [[EE_CMP]], i1 true, i1 [[COUNTED_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY1]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp eq i64 %iv.next, 20
  %combined.cond = select i1 %ee.cmp, i1 true, i1 %counted.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_swap_comparison_order(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions_swap_comparison_order(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = select i1 [[COUNTED_CMP]], i1 true, i1 [[EE_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp eq i64 %iv.next, 20
  %combined.cond = select i1 %counted.cmp, i1 true, i1 %ee.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_decrementing_iv(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions_decrementing_iv(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 19, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = sub nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], 0
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = select i1 [[EE_CMP]], i1 true, i1 [[COUNTED_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 19, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = sub nuw nsw i64 %iv, 1
  %counted.cmp = icmp eq i64 %iv.next, 0
  %combined.cond = select i1 %ee.cmp, i1 true, i1 %counted.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_no_stores(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions_no_stores(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = select i1 [[EE_CMP]], i1 true, i1 [[COUNTED_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp eq i64 %iv.next, 20
  %combined.cond = select i1 %ee.cmp, i1 true, i1 %counted.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_three_conditions_two_uncountable(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred.a, ptr align 4 dereferenceable(80) readonly %pred.b) {
; CHECK-LABEL: define void @combined_exit_three_conditions_two_uncountable(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED_A:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED_B:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_A_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED_A]], i64 [[IV]]
; CHECK-NEXT:    [[EE_A_VAL:%.*]] = load i32, ptr [[EE_A_PTR]], align 4
; CHECK-NEXT:    [[EE_A_CMP:%.*]] = icmp ne i32 [[EE_A_VAL]], 0
; CHECK-NEXT:    [[EE_B_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED_B]], i64 [[IV]]
; CHECK-NEXT:    [[EE_B_VAL:%.*]] = load i32, ptr [[EE_B_PTR]], align 4
; CHECK-NEXT:    [[EE_B_CMP:%.*]] = icmp ugt i32 [[EE_B_VAL]], 100
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[EITHER_UNCOUNTED:%.*]] = select i1 [[EE_A_CMP]], i1 true, i1 [[EE_B_CMP]]
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = select i1 [[EITHER_UNCOUNTED]], i1 true, i1 [[COUNTED_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.a.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred.a, i64 %iv
  %ee.a.val = load i32, ptr %ee.a.ptr, align 4
  %ee.a.cmp = icmp ne i32 %ee.a.val, 0
  %ee.b.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred.b, i64 %iv
  %ee.b.val = load i32, ptr %ee.b.ptr, align 4
  %ee.b.cmp = icmp ugt i32 %ee.b.val, 100
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp eq i64 %iv.next, 20
  %either.uncounted = select i1 %ee.a.cmp, i1 true, i1 %ee.b.cmp
  %combined.cond = select i1 %either.uncounted, i1 true, i1 %counted.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_two_uncountable_only(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred.a, ptr align 4 dereferenceable(80) readonly %pred.b) {
; CHECK-LABEL: define void @combined_exit_conditions_two_uncountable_only(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED_A:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED_B:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_A_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED_A]], i64 [[IV]]
; CHECK-NEXT:    [[EE_A_VAL:%.*]] = load i32, ptr [[EE_A_PTR]], align 4
; CHECK-NEXT:    [[EE_A_CMP:%.*]] = icmp ne i32 [[EE_A_VAL]], 0
; CHECK-NEXT:    [[EE_B_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED_B]], i64 [[IV]]
; CHECK-NEXT:    [[EE_B_VAL:%.*]] = load i32, ptr [[EE_B_PTR]], align 4
; CHECK-NEXT:    [[EE_B_CMP:%.*]] = icmp ugt i32 [[EE_B_VAL]], 100
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[EITHER_UNCOUNTED:%.*]] = select i1 [[EE_A_CMP]], i1 true, i1 [[EE_B_CMP]]
; CHECK-NEXT:    br i1 [[EITHER_UNCOUNTED]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.a.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred.a, i64 %iv
  %ee.a.val = load i32, ptr %ee.a.ptr, align 4
  %ee.a.cmp = icmp ne i32 %ee.a.val, 0
  %ee.b.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred.b, i64 %iv
  %ee.b.val = load i32, ptr %ee.b.ptr, align 4
  %ee.b.cmp = icmp ugt i32 %ee.b.val, 100
  %iv.next = add nuw nsw i64 %iv, 1
  %either.uncounted = select i1 %ee.a.cmp, i1 true, i1 %ee.b.cmp
  br i1 %either.uncounted, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_logical_and(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions_logical_and(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp uge i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = select i1 [[EE_CMP]], i1 [[COUNTED_CMP]], i1 false
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp uge i64 %iv.next, 20
  %combined.cond = select i1 %ee.cmp, i1 %counted.cmp, i1 false
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_binary_or(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions_binary_or(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp eq i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = or i1 [[EE_CMP]], [[COUNTED_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp eq i64 %iv.next, 20
  %combined.cond = or i1 %ee.cmp, %counted.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}

define void @combined_exit_conditions_binary_and(ptr align 4 dereferenceable(80) readonly %src, ptr align 4 dereferenceable(80) noalias %dst, ptr align 4 dereferenceable(80) readonly %pred) {
; CHECK-LABEL: define void @combined_exit_conditions_binary_and(
; CHECK-SAME: ptr readonly align 4 dereferenceable(80) [[SRC:%.*]], ptr noalias align 4 dereferenceable(80) [[DST:%.*]], ptr readonly align 4 dereferenceable(80) [[PRED:%.*]]) {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
; CHECK:       [[FOR_BODY]]:
; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
; CHECK-NEXT:    [[SRC_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[SRC]], i64 [[IV]]
; CHECK-NEXT:    [[DATA:%.*]] = load i32, ptr [[SRC_PTR]], align 4
; CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[DATA]], 1
; CHECK-NEXT:    [[DST_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[DST]], i64 [[IV]]
; CHECK-NEXT:    store i32 [[ADD]], ptr [[DST_PTR]], align 4
; CHECK-NEXT:    [[EE_PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr [[PRED]], i64 [[IV]]
; CHECK-NEXT:    [[EE_VAL:%.*]] = load i32, ptr [[EE_PTR]], align 4
; CHECK-NEXT:    [[EE_CMP:%.*]] = icmp ne i32 [[EE_VAL]], 0
; CHECK-NEXT:    [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
; CHECK-NEXT:    [[COUNTED_CMP:%.*]] = icmp uge i64 [[IV_NEXT]], 20
; CHECK-NEXT:    [[COMBINED_COND:%.*]] = and i1 [[EE_CMP]], [[COUNTED_CMP]]
; CHECK-NEXT:    br i1 [[COMBINED_COND]], label %[[EXIT:.*]], label %[[FOR_BODY]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret void
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %src.ptr = getelementptr inbounds nuw [4 x i8], ptr %src, i64 %iv
  %data = load i32, ptr %src.ptr, align 4
  %add = add nsw i32 %data, 1
  %dst.ptr = getelementptr inbounds nuw [4 x i8], ptr %dst, i64 %iv
  store i32 %add, ptr %dst.ptr, align 4
  %ee.ptr = getelementptr inbounds nuw [4 x i8], ptr %pred, i64 %iv
  %ee.val = load i32, ptr %ee.ptr, align 4
  %ee.cmp = icmp ne i32 %ee.val, 0
  %iv.next = add nuw nsw i64 %iv, 1
  %counted.cmp = icmp uge i64 %iv.next, 20
  %combined.cond = and i1 %ee.cmp, %counted.cmp
  br i1 %combined.cond, label %exit, label %for.body

exit:
  ret void
}