| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph:" --version 6 |
| ; This is the loop in c++ being vectorize in this file with |
| ; vector.reverse |
| |
| ;#pragma clang loop vectorize_width(4, scalable) |
| ; for (long int i = N - 1; i >= 0; i--) |
| ; { |
| ; if (cond[i]) |
| ; a[i] += 1; |
| ; } |
| |
| ; The test checks if the mask is being correctly created, reverted and used |
| |
| ; RUN: opt -passes=loop-vectorize -mtriple aarch64-linux-gnu -S \ |
| ; RUN: -tail-folding-policy=dont-fold-tail < %s | FileCheck %s |
| |
| target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" |
| target triple = "aarch64-unknown-linux-gnu" |
| |
| define void @vector_reverse_mask_nxv4i1(ptr %a, ptr %cond, i64 %N) #0 { |
| ; CHECK-LABEL: define void @vector_reverse_mask_nxv4i1( |
| ; CHECK-SAME: ptr [[A:%.*]], ptr [[COND:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] { |
| ; CHECK-NEXT: [[ENTRY:.*:]] |
| ; CHECK-NEXT: [[CMP7:%.*]] = icmp sgt i64 [[N]], 0 |
| ; CHECK-NEXT: br i1 [[CMP7]], label %[[FOR_BODY_PREHEADER:.*]], [[FOR_COND_CLEANUP:label %.*]] |
| ; CHECK: [[FOR_BODY_PREHEADER]]: |
| ; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
| ; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2 |
| ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], [[TMP1]] |
| ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]] |
| ; CHECK: [[VECTOR_MEMCHECK]]: |
| ; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[N]], 3 |
| ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP2]] |
| ; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[COND]], i64 [[TMP2]] |
| ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[A]], [[SCEVGEP1]] |
| ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[COND]], [[SCEVGEP]] |
| ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
| ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]] |
| ; CHECK: [[VECTOR_PH]]: |
| ; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP0]], 2 |
| ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], [[TMP3]] |
| ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]] |
| ; CHECK-NEXT: [[TMP4:%.*]] = sub i64 [[N]], [[N_VEC]] |
| ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| ; CHECK: [[VECTOR_BODY]]: |
| ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| ; CHECK-NEXT: [[TMP5:%.*]] = sub i64 [[N]], [[INDEX]] |
| ; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[TMP5]], -1 |
| ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds double, ptr [[COND]], i64 [[TMP6]] |
| ; CHECK-NEXT: [[TMP8:%.*]] = sub nuw nsw i64 [[TMP3]], 1 |
| ; CHECK-NEXT: [[TMP9:%.*]] = sub i64 0, [[TMP8]] |
| ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds double, ptr [[TMP7]], i64 [[TMP9]] |
| ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <vscale x 4 x double>, ptr [[TMP10]], align 8, !alias.scope [[META0:![0-9]+]] |
| ; CHECK-NEXT: [[REVERSE:%.*]] = call <vscale x 4 x double> @llvm.vector.reverse.nxv4f64(<vscale x 4 x double> [[WIDE_LOAD]]) |
| ; CHECK-NEXT: [[TMP11:%.*]] = fcmp une <vscale x 4 x double> [[REVERSE]], zeroinitializer |
| ; CHECK-NEXT: [[TMP12:%.*]] = getelementptr double, ptr [[A]], i64 [[TMP6]] |
| ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr double, ptr [[TMP12]], i64 [[TMP9]] |
| ; CHECK-NEXT: [[REVERSE2:%.*]] = call <vscale x 4 x i1> @llvm.vector.reverse.nxv4i1(<vscale x 4 x i1> [[TMP11]]) |
| ; CHECK-NEXT: [[REVERSE3:%.*]] = call <vscale x 4 x double> @llvm.masked.load.nxv4f64.p0(ptr align 8 [[TMP13]], <vscale x 4 x i1> [[REVERSE2]], <vscale x 4 x double> poison), !alias.scope [[META3:![0-9]+]], !noalias [[META0]] |
| ; CHECK-NEXT: [[TMP14:%.*]] = fadd <vscale x 4 x double> [[REVERSE3]], splat (double 1.000000e+00) |
| ; CHECK-NEXT: call void @llvm.masked.store.nxv4f64.p0(<vscale x 4 x double> [[TMP14]], ptr align 8 [[TMP13]], <vscale x 4 x i1> [[REVERSE2]]), !alias.scope [[META3]], !noalias [[META0]] |
| ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]] |
| ; CHECK-NEXT: [[TMP15:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[TMP15]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| ; CHECK: [[MIDDLE_BLOCK]]: |
| ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]] |
| ; CHECK-NEXT: br i1 [[CMP_N]], [[FOR_COND_CLEANUP_LOOPEXIT:label %.*]], label %[[SCALAR_PH]] |
| ; CHECK: [[SCALAR_PH]]: |
| ; |
| entry: |
| %cmp7 = icmp sgt i64 %N, 0 |
| br i1 %cmp7, label %for.body, label %for.cond.cleanup |
| |
| for.cond.cleanup: |
| ret void |
| |
| for.body: |
| %i.08.in = phi i64 [ %i.08, %for.inc ], [ %N, %entry ] |
| %i.08 = add nsw i64 %i.08.in, -1 |
| %arrayidx = getelementptr inbounds double, ptr %cond, i64 %i.08 |
| %0 = load double, ptr %arrayidx, align 8 |
| %tobool = fcmp une double %0, 0.000000e+00 |
| br i1 %tobool, label %if.then, label %for.inc |
| |
| if.then: |
| %arrayidx1 = getelementptr inbounds double, ptr %a, i64 %i.08 |
| %1 = load double, ptr %arrayidx1, align 8 |
| %add = fadd double %1, 1.000000e+00 |
| store double %add, ptr %arrayidx1, align 8 |
| br label %for.inc |
| |
| for.inc: |
| %cmp = icmp sgt i64 %i.08.in, 1 |
| br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !0 |
| } |
| |
| attributes #0 = {"target-cpu"="generic" "target-features"="+neon,+sve"} |
| |
| |
| !0 = distinct !{!0, !1, !2, !3, !4} |
| !1 = !{!"llvm.loop.mustprogress"} |
| !2 = !{!"llvm.loop.vectorize.width", i32 4} |
| !3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true} |
| !4 = !{!"llvm.loop.vectorize.enable", i1 true} |
