llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgpu12.50 -run-pass=amdgpu-lower-vgpr-encoding -o - %s | FileCheck %s

---
name:            multi
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $vgpr10, $vgpr11, $vgpr900, $vgpr901
    ; CHECK-LABEL: name: multi
    ; CHECK: liveins: $vgpr10, $vgpr11, $vgpr900, $vgpr901
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
    ; CHECK-NEXT: S_WAIT_DSCNT 0
    ; CHECK-NEXT: S_BARRIER_SIGNAL_IMM -1
    ; CHECK-NEXT: S_BARRIER_WAIT -1
    ; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
  $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
  S_WAIT_DSCNT 0
  S_BARRIER_SIGNAL_IMM -1
  S_BARRIER_WAIT -1
  $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
  S_ENDPGM 0
...

---
name:            high_vgprs
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $vgpr10, $vgpr11, $vgpr900, $vgpr901
    ; CHECK-LABEL: name: high_vgprs
    ; CHECK: liveins: $vgpr10, $vgpr11, $vgpr900, $vgpr901
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
    ; CHECK-NEXT: S_BARRIER_SIGNAL_IMM -1
    ; CHECK-NEXT: S_BARRIER_WAIT -1
    ; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
  S_BARRIER_SIGNAL_IMM -1
  S_BARRIER_WAIT -1
  $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
  S_ENDPGM 0
...

---
name:            no_control
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $vgpr10, $vgpr11, $vgpr900, $vgpr901
    ; CHECK-LABEL: name: no_control
    ; CHECK: liveins: $vgpr10, $vgpr11, $vgpr900, $vgpr901
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
    ; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
  $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
  $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
  S_ENDPGM 0
...

---
name:            triple
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $vgpr4, $vgpr515
    ; CHECK-LABEL: name: triple
    ; CHECK: liveins: $vgpr4, $vgpr515
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: S_SET_VGPR_MSB 68, implicit-def $mode
    ; CHECK-NEXT: $vgpr260 = V_AND_B32_e32 496, $vgpr260, implicit $exec
    ; CHECK-NEXT: S_SET_VGPR_MSB 17544, implicit-def $mode
    ; CHECK-NEXT: $vgpr514 = V_LSHRREV_B32_e32 4, $vgpr515, implicit $exec
    ; CHECK-NEXT: S_SET_VGPR_MSB 34884, implicit-def $mode
    ; CHECK-NEXT: $vgpr260 = V_AND_B32_e32 496, $vgpr260, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
    $vgpr260 = V_AND_B32_e32 496, $vgpr260, implicit $exec
    $vgpr514 = V_LSHRREV_B32_e32 4, $vgpr515, implicit $exec
    $vgpr260 = V_AND_B32_e32 496, $vgpr260, implicit $exec
    S_ENDPGM 0
...

---
name:            xcnt
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $vgpr10, $vgpr257
    ; CHECK-LABEL: name: xcnt
    ; CHECK: liveins: $vgpr10, $vgpr257
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
    ; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
  $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
  S_WAIT_XCNT 0
  $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
  S_ENDPGM 0
...

---
name:            asynccnt
tracksRegLiveness: true
body:             |
  bb.0:
  liveins: $vgpr10, $vgpr257
    ; CHECK-LABEL: name: asynccnt
    ; CHECK: liveins: $vgpr10, $vgpr257
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_WAIT_ASYNCCNT 0, implicit $asynccnt, implicit-def $asynccnt
    ; CHECK-NEXT: S_SET_VGPR_MSB 65, implicit-def $mode
    ; CHECK-NEXT: $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
  $vgpr11 = nofpexcept V_EXP_F32_e32 killed $vgpr10, implicit $mode, implicit $exec
  S_WAIT_ASYNCCNT 0, implicit $asynccnt, implicit-def $asynccnt
  $vgpr256 = nofpexcept V_EXP_F32_e32 killed $vgpr257, implicit $mode, implicit $exec
  S_ENDPGM 0
...

---
name:            coissue_opt_honors_nop_rule
tracksRegLiveness: true
body:             |
  bb.0:
    ; V_MOV_B32_e32 uses dst/src0 (MSB=1)
    ; CHECK-LABEL: name: coissue_opt_honors_nop_rule
    ; CHECK: S_SET_VGPR_MSB 65, implicit-def $mode
    ; CHECK-NEXT: $vgpr256 = V_MOV_B32_e32 $vgpr257, implicit $exec
    ; CHECK-NEXT: S_SETREG_IMM32_B32 23228, 30721, implicit-def $mode, implicit $mode
    ; CHECK-NEXT: S_NOP 0
    ; CHECK-NEXT: S_SET_VGPR_MSB 16713, implicit-def $mode
    ; CHECK-NEXT: S_BARRIER_WAIT -1
    ; CHECK-NEXT: $vgpr256 = V_ADD_U32_e32 $vgpr257, $vgpr512, implicit $exec
    ; CHECK-NEXT: S_ENDPGM 0
    $vgpr256 = V_MOV_B32_e32 $vgpr257, implicit $exec

    ; size=16, offset=0, hwreg=MODE: simm16 = 0x7801 = 30721
    ; imm32 = 0x5ABC = 23228 (bits 12:19 = 5 = MODE register mode for vgpr256/257)
    S_SETREG_IMM32_B32 23228, 30721, implicit-def $mode, implicit $mode
    S_BARRIER_WAIT -1

    ; V_ADD_U32_e32 uses same dst/src0 (MSB=1) but adds src1 (MSB=2)
    $vgpr256 = V_ADD_U32_e32 $vgpr257, $vgpr512, implicit $exec
    S_ENDPGM 0
...