llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgpu12.50 -mattr=-real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250,FAKE16 %s
; RUN: llc -mtriple=amdgpu12.50 -mattr=+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX1250,REAL16 %s

declare bfloat @llvm.fabs.bf16(bfloat) #0
declare bfloat @llvm.canonicalize.bf16(bfloat) #0
declare <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat>) #0
declare <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat>) #0
declare <3 x bfloat> @llvm.canonicalize.v3bf16(<3 x bfloat>) #0
declare <4 x bfloat> @llvm.canonicalize.v4bf16(<4 x bfloat>) #0
declare <6 x bfloat> @llvm.canonicalize.v6bf16(<6 x bfloat>) #0
declare <8 x bfloat> @llvm.canonicalize.v8bf16(<8 x bfloat>) #0
declare <12 x bfloat> @llvm.canonicalize.v12bf16(<12 x bfloat>) #0
declare <16 x bfloat> @llvm.canonicalize.v16bf16(<16 x bfloat>) #0
declare <32 x bfloat> @llvm.canonicalize.v32bf16(<32 x bfloat>) #0
declare <64 x bfloat> @llvm.canonicalize.v64bf16(<64 x bfloat>) #0
declare i32 @llvm.amdgcn.workitem.id.x() #0

define amdgpu_kernel void @test_fold_canonicalize_undef_value_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_undef_value_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v0, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_undef_value_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat undef)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_canonicalize_var_bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_load_u16 v0, v0, s[0:1]
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-NEXT:    v_max_num_f32_e32 v0, v0, v0
; GFX1250-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; GFX1250-NEXT:    global_store_b16 v[0:1], v0, off
; GFX1250-NEXT:    s_endpgm
  %val = load bfloat, ptr addrspace(1) %out
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val)
  store bfloat %canonicalized, ptr addrspace(1) poison
  ret void
}

define amdgpu_kernel void @s_test_canonicalize_var_bf16(ptr addrspace(1) %out, i16 zeroext %val.arg) #1 {
; GFX1250-LABEL: s_test_canonicalize_var_bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b96 s[0:2], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    s_lshl_b32 s2, s2, 16
; GFX1250-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; GFX1250-NEXT:    v_max_num_f32_e64 v0, s2, s2
; GFX1250-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; GFX1250-NEXT:    global_store_b16 v1, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %val = bitcast i16 %val.arg to bfloat
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define <2 x bfloat> @v_test_canonicalize_build_vector_v2bf16(bfloat %lo, bfloat %hi) #1 {
; FAKE16-LABEL: v_test_canonicalize_build_vector_v2bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; REAL16-LABEL: v_test_canonicalize_build_vector_v2bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    v_mov_b16_e32 v0.h, v1.l
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; REAL16-NEXT:    s_set_pc_i64 s[30:31]
  %ins0 = insertelement <2 x bfloat> poison, bfloat %lo, i32 0
  %ins1 = insertelement <2 x bfloat> %ins0, bfloat %hi, i32 1
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %ins1)
  ret <2 x bfloat> %canonicalized
}


define amdgpu_kernel void @v_test_canonicalize_fabs_var_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: v_test_canonicalize_fabs_var_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_load_u16 v1, v0, s[0:1]
; FAKE16-NEXT:    s_wait_loadcnt 0x0
; FAKE16-NEXT:    v_and_b32_e32 v1, 0x7fff, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; FAKE16-NEXT:    v_max_num_f32_e32 v1, v1, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_cvt_pk_bf16_f32 v1, v1, s0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: v_test_canonicalize_fabs_var_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_load_u16 v0, v1, s[0:1]
; REAL16-NEXT:    s_wait_loadcnt 0x0
; REAL16-NEXT:    v_and_b32_e32 v0, 0x7fff, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; REAL16-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; REAL16-NEXT:    v_max_num_f32_e32 v0, v0, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %val = load bfloat, ptr addrspace(1) %out
  %val.fabs = call bfloat @llvm.fabs.bf16(bfloat %val)
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val.fabs)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}


define amdgpu_kernel void @v_test_canonicalize_fneg_fabs_var_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: v_test_canonicalize_fneg_fabs_var_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_load_u16 v1, v0, s[0:1]
; FAKE16-NEXT:    s_wait_loadcnt 0x0
; FAKE16-NEXT:    v_or_b32_e32 v1, 0x8000, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; FAKE16-NEXT:    v_max_num_f32_e32 v1, v1, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_cvt_pk_bf16_f32 v1, v1, s0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: v_test_canonicalize_fneg_fabs_var_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_load_u16 v0, v1, s[0:1]
; REAL16-NEXT:    s_wait_loadcnt 0x0
; REAL16-NEXT:    v_or_b32_e32 v0, 0x8000, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; REAL16-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; REAL16-NEXT:    v_max_num_f32_e32 v0, v0, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %val = load bfloat, ptr addrspace(1) %out
  %val.fabs = call bfloat @llvm.fabs.bf16(bfloat %val)
  %val.fabs.fneg = fneg bfloat %val.fabs
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val.fabs.fneg)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_canonicalize_fneg_var_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: v_test_canonicalize_fneg_var_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_load_u16 v1, v0, s[0:1]
; FAKE16-NEXT:    s_wait_loadcnt 0x0
; FAKE16-NEXT:    v_xor_b32_e32 v1, 0x8000, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; FAKE16-NEXT:    v_max_num_f32_e32 v1, v1, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_cvt_pk_bf16_f32 v1, v1, s0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: v_test_canonicalize_fneg_var_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_load_u16 v0, v1, s[0:1]
; REAL16-NEXT:    s_wait_loadcnt 0x0
; REAL16-NEXT:    v_xor_b32_e32 v0, 0x8000, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; REAL16-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; REAL16-NEXT:    v_max_num_f32_e32 v0, v0, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %val = load bfloat, ptr addrspace(1) %out
  %val.fneg = fneg bfloat %val
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val.fneg)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_no_denormals_canonicalize_fneg_var_bf16(ptr addrspace(1) %out) #2 {
; FAKE16-LABEL: v_test_no_denormals_canonicalize_fneg_var_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_load_u16 v1, v0, s[0:1]
; FAKE16-NEXT:    s_wait_loadcnt 0x0
; FAKE16-NEXT:    v_xor_b32_e32 v1, 0x8000, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; FAKE16-NEXT:    v_max_num_f32_e32 v1, v1, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_cvt_pk_bf16_f32 v1, v1, s0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: v_test_no_denormals_canonicalize_fneg_var_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_load_u16 v0, v1, s[0:1]
; REAL16-NEXT:    s_wait_loadcnt 0x0
; REAL16-NEXT:    v_xor_b32_e32 v0, 0x8000, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; REAL16-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; REAL16-NEXT:    v_max_num_f32_e32 v0, v0, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %val = load bfloat, ptr addrspace(1) %out
  %val.fneg = fneg bfloat %val
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val.fneg)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_no_denormals_canonicalize_fneg_fabs_var_bf16(ptr addrspace(1) %out) #2 {
; FAKE16-LABEL: v_test_no_denormals_canonicalize_fneg_fabs_var_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_load_u16 v1, v0, s[0:1]
; FAKE16-NEXT:    s_wait_loadcnt 0x0
; FAKE16-NEXT:    v_or_b32_e32 v1, 0x8000, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
; FAKE16-NEXT:    v_max_num_f32_e32 v1, v1, v1
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_cvt_pk_bf16_f32 v1, v1, s0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: v_test_no_denormals_canonicalize_fneg_fabs_var_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_load_u16 v0, v1, s[0:1]
; REAL16-NEXT:    s_wait_loadcnt 0x0
; REAL16-NEXT:    v_or_b32_e32 v0, 0x8000, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; REAL16-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; REAL16-NEXT:    v_max_num_f32_e32 v0, v0, v0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_cvt_pk_bf16_f32 v0, v0, s0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %val = load bfloat, ptr addrspace(1) %out
  %val.fabs = call bfloat @llvm.fabs.bf16(bfloat %val)
  %val.fabs.fneg = fneg bfloat %val.fabs
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat %val.fabs.fneg)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_p0_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_p0_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_mov_b32_e32 v0, 0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v0, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_p0_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
   %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0.0)
   store bfloat %canonicalized, ptr addrspace(1) %out
   ret void
}

define amdgpu_kernel void @test_fold_canonicalize_n0_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_n0_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xffff8000
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_n0_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x8000
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat -0.0)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_p1_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_p1_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3f80
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_p1_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x3f80
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 1.0)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_n1_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_n1_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xffffbf80
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_n1_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0xbf80
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat -1.0)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_literal_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_literal_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x4180
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_literal_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x4180
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 16.0)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_default_denormals_fold_canonicalize_denormal0_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_default_denormals_fold_canonicalize_denormal0_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3ff
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_default_denormals_fold_canonicalize_denormal0_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x3ff
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR03FF)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal0_bf16(ptr addrspace(1) %out) #3 {
; FAKE16-LABEL: test_denormals_fold_canonicalize_denormal0_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3ff
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_denormals_fold_canonicalize_denormal0_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x3ff
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR03FF)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_default_denormals_fold_canonicalize_denormal1_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_default_denormals_fold_canonicalize_denormal1_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xffff83ff
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_default_denormals_fold_canonicalize_denormal1_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x83ff
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR83FF)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal1_bf16(ptr addrspace(1) %out) #3 {
; FAKE16-LABEL: test_denormals_fold_canonicalize_denormal1_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xffff83ff
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_denormals_fold_canonicalize_denormal1_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x83ff
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR83FF)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_qnan_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_qnan_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7c00
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_qnan_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x7c00
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR7C00)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg1_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg1_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_qnan_value_neg1_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x7fc0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat bitcast (i16 -1 to bfloat))
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg2_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_qnan_value_neg2_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_qnan_value_neg2_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x7fc0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat bitcast (i16 -2 to bfloat))
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan0_value_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_snan0_value_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7c01
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_snan0_value_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x7c01
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR7C01)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan1_value_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_snan1_value_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7dff
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_snan1_value_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0x7dff
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xR7DFF)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan2_value_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_snan2_value_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xfffffdff
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_snan2_value_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0xfdff
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xRFDFF)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan3_value_bf16(ptr addrspace(1) %out) #1 {
; FAKE16-LABEL: test_fold_canonicalize_snan3_value_bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    global_wb
; FAKE16-NEXT:    v_nop
; FAKE16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; FAKE16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; FAKE16-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xfffffc01
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    global_store_b16 v0, v1, s[0:1]
; FAKE16-NEXT:    s_endpgm
;
; REAL16-LABEL: test_fold_canonicalize_snan3_value_bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    global_wb
; REAL16-NEXT:    v_nop
; REAL16-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; REAL16-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; REAL16-NEXT:    v_mov_b32_e32 v1, 0
; REAL16-NEXT:    v_mov_b16_e32 v0.l, 0xfc01
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    global_store_b16 v1, v0, s[0:1]
; REAL16-NEXT:    s_endpgm
  %canonicalized = call bfloat @llvm.canonicalize.bf16(bfloat 0xRFC01)
  store bfloat %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_canonicalize_var_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_load_b32 v0, v0, s[0:1] scale_offset
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    global_store_b32 v1, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %gep = getelementptr <2 x bfloat>, ptr addrspace(1) %out, i32 %tid
  %val = load <2 x bfloat>, ptr addrspace(1) %gep
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %val)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_canonicalize_fabs_var_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: v_test_canonicalize_fabs_var_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_load_b32 v0, v0, s[0:1] scale_offset
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    global_store_b32 v1, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %gep = getelementptr <2 x bfloat>, ptr addrspace(1) %out, i32 %tid
  %val = load <2 x bfloat>, ptr addrspace(1) %gep
  %val.fabs = call <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat> %val)
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %val.fabs)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_canonicalize_fneg_fabs_var_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: v_test_canonicalize_fneg_fabs_var_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_load_b32 v0, v0, s[0:1] scale_offset
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v0
; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]
; GFX1250-NEXT:    global_store_b32 v1, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %gep = getelementptr <2 x bfloat>, ptr addrspace(1) %out, i32 %tid
  %val = load <2 x bfloat>, ptr addrspace(1) %gep
  %val.fabs = call <2 x bfloat> @llvm.fabs.v2bf16(<2 x bfloat> %val)
  %val.fabs.fneg = fneg <2 x bfloat> %val.fabs
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %val.fabs.fneg)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @v_test_canonicalize_fneg_var_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: v_test_canonicalize_fneg_var_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_and_b32_e32 v0, 0x3ff, v0
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_load_b32 v0, v0, s[0:1] scale_offset
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1] neg_lo:[0,1] neg_hi:[0,1]
; GFX1250-NEXT:    global_store_b32 v1, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %tid = call i32 @llvm.amdgcn.workitem.id.x()
  %gep = getelementptr <2 x bfloat>, ptr addrspace(1) %out, i32 %tid
  %val = load <2 x bfloat>, ptr addrspace(1) %gep
  %fneg.val = fneg <2 x bfloat> %val
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %fneg.val)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @s_test_canonicalize_var_v2bf16(ptr addrspace(1) %out, i32 zeroext %val.arg) #1 {
; GFX1250-LABEL: s_test_canonicalize_var_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b96 s[0:2], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, s2 op_sel_hi:[0,1]
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %val = bitcast i32 %val.arg to <2 x bfloat>
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %val)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_p0_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_p0_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> zeroinitializer)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_n0_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_n0_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x80008000
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat -0.0, bfloat -0.0>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_p1_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_p1_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3f803f80
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 1.0, bfloat 1.0>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_n1_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_n1_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xbf80bf80
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat -1.0, bfloat -1.0>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_literal_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_literal_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x41804180
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 16.0, bfloat 16.0>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal0_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_no_denormals_fold_canonicalize_denormal0_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3ff03ff
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR03FF, bfloat 0xR03FF>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal0_v2bf16(ptr addrspace(1) %out) #3 {
; GFX1250-LABEL: test_denormals_fold_canonicalize_denormal0_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x3ff03ff
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR03FF, bfloat 0xR03FF>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_no_denormals_fold_canonicalize_denormal1_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_no_denormals_fold_canonicalize_denormal1_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x83ff83ff
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR83FF, bfloat 0xR83FF>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_denormals_fold_canonicalize_denormal1_v2bf16(ptr addrspace(1) %out) #3 {
; GFX1250-LABEL: test_denormals_fold_canonicalize_denormal1_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x83ff83ff
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR83FF, bfloat 0xR83FF>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_qnan_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_qnan_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7c007c00
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR7C00, bfloat 0xR7C00>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg1_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_qnan_value_neg1_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc07fc0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> bitcast (i32 -1 to <2 x bfloat>))
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_qnan_value_neg2_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_qnan_value_neg2_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7fc07fc0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat bitcast (i16 -2 to bfloat), bfloat bitcast (i16 -2 to bfloat)>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan0_value_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_snan0_value_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7c017c01
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR7C01, bfloat 0xR7C01>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan1_value_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_snan1_value_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x7dff7dff
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xR7DFF, bfloat 0xR7DFF>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan2_value_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_snan2_value_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xfdfffdff
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xRFDFF, bfloat 0xRFDFF>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define amdgpu_kernel void @test_fold_canonicalize_snan3_value_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: test_fold_canonicalize_snan3_value_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0xfc01fc01
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v1, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> <bfloat 0xRFC01, bfloat 0xRFC01>)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define <3 x bfloat> @v_test_canonicalize_var_v3bf16(<3 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v3bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <3 x bfloat> @llvm.canonicalize.v3bf16(<3 x bfloat> %val)
  ret <3 x bfloat> %canonicalized
}

define <4 x bfloat> @v_test_canonicalize_var_v4bf16(<4 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v4bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <4 x bfloat> @llvm.canonicalize.v4bf16(<4 x bfloat> %val)
  ret <4 x bfloat> %canonicalized
}

define amdgpu_kernel void @s_test_canonicalize_undef_v2bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: s_test_canonicalize_undef_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b32 v0, v0, s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> undef)
  store <2 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define <2 x bfloat> @v_test_canonicalize_reg_undef_v2bf16(bfloat %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_reg_undef_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <2 x bfloat> poison, bfloat %val, i32 0
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_undef_reg_v2bf16(bfloat %val) #1 {
; FAKE16-LABEL: v_test_canonicalize_undef_reg_v2bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; FAKE16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; REAL16-LABEL: v_test_canonicalize_undef_reg_v2bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    v_mov_b16_e32 v0.h, v0.l
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; REAL16-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <2 x bfloat> poison, bfloat %val, i32 1
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_undef_lo_imm_hi_v2bf16() #1 {
; GFX1250-LABEL: v_test_canonicalize_undef_lo_imm_hi_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_mov_b32_e32 v0, 1.0
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <2 x bfloat> undef, bfloat 1.0, i32 1
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_imm_lo_undef_hi_v2bf16() #1 {
; GFX1250-LABEL: v_test_canonicalize_imm_lo_undef_hi_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0x3f80
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <2 x bfloat> undef, bfloat 1.0, i32 0
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_undef_lo_k_hi_v2bf16() #1 {
; GFX1250-LABEL: v_test_canonicalize_undef_lo_k_hi_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0x41800000
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <2 x bfloat> undef, bfloat 16.0, i32 1
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_k_lo_undef_hi_v2bf16() #1 {
; GFX1250-LABEL: v_test_canonicalize_k_lo_undef_hi_v2bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0x4180
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <2 x bfloat> undef, bfloat 16.0, i32 0
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_reg_k_v2bf16(bfloat %val) #1 {
; FAKE16-LABEL: v_test_canonicalize_reg_k_v2bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    s_movk_i32 s0, 0x4000
; FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_perm_b32 v0, s0, v0, 0x5040100
; FAKE16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; REAL16-LABEL: v_test_canonicalize_reg_k_v2bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    v_mov_b16_e32 v1.h, 0x4000
; REAL16-NEXT:    v_mov_b16_e32 v1.l, v0.l
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_pk_mul_bf16 v0, 1.0, v1 op_sel_hi:[0,1]
; REAL16-NEXT:    s_set_pc_i64 s[30:31]
  %vec0 = insertelement <2 x bfloat> poison, bfloat %val, i32 0
  %vec1 = insertelement <2 x bfloat> %vec0, bfloat 2.0, i32 1
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec1)
  ret <2 x bfloat> %canonicalized
}

define <2 x bfloat> @v_test_canonicalize_k_reg_v2bf16(bfloat %val) #1 {
; FAKE16-LABEL: v_test_canonicalize_k_reg_v2bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    s_movk_i32 s0, 0x4000
; FAKE16-NEXT:    s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
; FAKE16-NEXT:    v_perm_b32 v0, v0, s0, 0x5040100
; FAKE16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; REAL16-LABEL: v_test_canonicalize_k_reg_v2bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    v_mov_b16_e32 v1.l, 0x4000
; REAL16-NEXT:    v_mov_b16_e32 v1.h, v0.l
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; REAL16-NEXT:    v_pk_mul_bf16 v0, 1.0, v1 op_sel_hi:[0,1]
; REAL16-NEXT:    s_set_pc_i64 s[30:31]
  %vec0 = insertelement <2 x bfloat> poison, bfloat 2.0, i32 0
  %vec1 = insertelement <2 x bfloat> %vec0, bfloat %val, i32 1
  %canonicalized = call <2 x bfloat> @llvm.canonicalize.v2bf16(<2 x bfloat> %vec1)
  ret <2 x bfloat> %canonicalized
}

define amdgpu_kernel void @s_test_canonicalize_undef_v4bf16(ptr addrspace(1) %out) #1 {
; GFX1250-LABEL: s_test_canonicalize_undef_v4bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    global_wb
; GFX1250-NEXT:    v_nop
; GFX1250-NEXT:    s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
; GFX1250-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24 nv
; GFX1250-NEXT:    v_mov_b32_e32 v0, 0
; GFX1250-NEXT:    s_delay_alu instid0(VALU_DEP_1)
; GFX1250-NEXT:    v_mov_b32_e32 v1, v0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    global_store_b64 v0, v[0:1], s[0:1]
; GFX1250-NEXT:    s_endpgm
  %canonicalized = call <4 x bfloat> @llvm.canonicalize.v4bf16(<4 x bfloat> undef)
  store <4 x bfloat> %canonicalized, ptr addrspace(1) %out
  ret void
}

define <4 x bfloat> @v_test_canonicalize_reg_undef_undef_undef_v4bf16(bfloat %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_reg_undef_undef_undef_v4bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_mov_b32_e32 v1, 0x7fc07fc0
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %vec = insertelement <4 x bfloat> poison, bfloat %val, i32 0
  %canonicalized = call <4 x bfloat> @llvm.canonicalize.v4bf16(<4 x bfloat> %vec)
  ret <4 x bfloat> %canonicalized
}

define <4 x bfloat> @v_test_canonicalize_reg_reg_undef_undef_v4bf16(bfloat %val0, bfloat %val1) #1 {
; FAKE16-LABEL: v_test_canonicalize_reg_reg_undef_undef_v4bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100
; FAKE16-NEXT:    v_mov_b32_e32 v1, 0x7fc07fc0
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)
; FAKE16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; REAL16-LABEL: v_test_canonicalize_reg_reg_undef_undef_v4bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    v_mov_b16_e32 v0.h, v1.l
; REAL16-NEXT:    v_mov_b32_e32 v1, 0x7fc07fc0
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_2)
; REAL16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; REAL16-NEXT:    s_set_pc_i64 s[30:31]
  %vec0 = insertelement <4 x bfloat> poison, bfloat %val0, i32 0
  %vec1 = insertelement <4 x bfloat> %vec0, bfloat %val1, i32 1
  %canonicalized = call <4 x bfloat> @llvm.canonicalize.v4bf16(<4 x bfloat> %vec1)
  ret <4 x bfloat> %canonicalized
}

define <4 x bfloat> @v_test_canonicalize_reg_undef_reg_reg_v4bf16(bfloat %val0, bfloat %val1, bfloat %val2) #1 {
; FAKE16-LABEL: v_test_canonicalize_reg_undef_reg_reg_v4bf16:
; FAKE16:       ; %bb.0:
; FAKE16-NEXT:    s_wait_loadcnt_dscnt 0x0
; FAKE16-NEXT:    s_wait_kmcnt 0x0
; FAKE16-NEXT:    v_perm_b32 v1, v2, v1, 0x5040100
; FAKE16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)
; FAKE16-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; FAKE16-NEXT:    s_set_pc_i64 s[30:31]
;
; REAL16-LABEL: v_test_canonicalize_reg_undef_reg_reg_v4bf16:
; REAL16:       ; %bb.0:
; REAL16-NEXT:    s_wait_loadcnt_dscnt 0x0
; REAL16-NEXT:    s_wait_kmcnt 0x0
; REAL16-NEXT:    v_mov_b16_e32 v1.h, v2.l
; REAL16-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; REAL16-NEXT:    s_delay_alu instid0(VALU_DEP_2)
; REAL16-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; REAL16-NEXT:    s_set_pc_i64 s[30:31]
  %vec0 = insertelement <4 x bfloat> poison, bfloat %val0, i32 0
  %vec1 = insertelement <4 x bfloat> %vec0, bfloat %val1, i32 2
  %vec2 = insertelement <4 x bfloat> %vec1, bfloat %val2, i32 3
  %canonicalized = call <4 x bfloat> @llvm.canonicalize.v4bf16(<4 x bfloat> %vec2)
  ret <4 x bfloat> %canonicalized
}

define <6 x bfloat> @v_test_canonicalize_var_v6bf16(<6 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v6bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v2, 1.0, v2 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <6 x bfloat> @llvm.canonicalize.v6bf16(<6 x bfloat> %val)
  ret <6 x bfloat> %canonicalized
}

define <8 x bfloat> @v_test_canonicalize_var_v8bf16(<8 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v8bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v2, 1.0, v2 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v3, 1.0, v3 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <8 x bfloat> @llvm.canonicalize.v8bf16(<8 x bfloat> %val)
  ret <8 x bfloat> %canonicalized
}

define <12 x bfloat> @v_test_canonicalize_var_v12bf16(<12 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v12bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v2, 1.0, v2 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v3, 1.0, v3 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v4, 1.0, v4 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v5, 1.0, v5 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <12 x bfloat> @llvm.canonicalize.v12bf16(<12 x bfloat> %val)
  ret <12 x bfloat> %canonicalized
}

define <16 x bfloat> @v_test_canonicalize_var_v16bf16(<16 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v16bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v2, 1.0, v2 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v3, 1.0, v3 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v4, 1.0, v4 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v5, 1.0, v5 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v6, 1.0, v6 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v7, 1.0, v7 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <16 x bfloat> @llvm.canonicalize.v16bf16(<16 x bfloat> %val)
  ret <16 x bfloat> %canonicalized
}

define <32 x bfloat> @v_test_canonicalize_var_v32bf16(<32 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v32bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v2, 1.0, v2 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v3, 1.0, v3 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v4, 1.0, v4 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v5, 1.0, v5 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v6, 1.0, v6 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v7, 1.0, v7 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v8, 1.0, v8 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v9, 1.0, v9 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v10, 1.0, v10 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v11, 1.0, v11 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v12, 1.0, v12 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v13, 1.0, v13 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v14, 1.0, v14 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v15, 1.0, v15 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <32 x bfloat> @llvm.canonicalize.v32bf16(<32 x bfloat> %val)
  ret <32 x bfloat> %canonicalized
}

define <64 x bfloat> @v_test_canonicalize_var_v64bf16(<64 x bfloat> %val) #1 {
; GFX1250-LABEL: v_test_canonicalize_var_v64bf16:
; GFX1250:       ; %bb.0:
; GFX1250-NEXT:    s_wait_loadcnt_dscnt 0x0
; GFX1250-NEXT:    s_wait_kmcnt 0x0
; GFX1250-NEXT:    scratch_load_b32 v31, off, s32
; GFX1250-NEXT:    v_pk_mul_bf16 v0, 1.0, v0 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v1, 1.0, v1 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v2, 1.0, v2 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v3, 1.0, v3 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v4, 1.0, v4 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v5, 1.0, v5 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v6, 1.0, v6 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v7, 1.0, v7 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v8, 1.0, v8 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v9, 1.0, v9 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v10, 1.0, v10 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v11, 1.0, v11 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v12, 1.0, v12 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v13, 1.0, v13 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v14, 1.0, v14 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v15, 1.0, v15 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v16, 1.0, v16 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v17, 1.0, v17 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v18, 1.0, v18 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v19, 1.0, v19 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v20, 1.0, v20 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v21, 1.0, v21 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v22, 1.0, v22 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v23, 1.0, v23 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v24, 1.0, v24 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v25, 1.0, v25 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v26, 1.0, v26 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v27, 1.0, v27 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v28, 1.0, v28 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v29, 1.0, v29 op_sel_hi:[0,1]
; GFX1250-NEXT:    v_pk_mul_bf16 v30, 1.0, v30 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_wait_loadcnt 0x0
; GFX1250-NEXT:    v_pk_mul_bf16 v31, 1.0, v31 op_sel_hi:[0,1]
; GFX1250-NEXT:    s_set_pc_i64 s[30:31]
  %canonicalized = call <64 x bfloat> @llvm.canonicalize.v64bf16(<64 x bfloat> %val)
  ret <64 x bfloat> %canonicalized
}

attributes #0 = { nounwind readnone }
attributes #1 = { nounwind denormal_fpenv(float: preservesign) }
attributes #2 = { nounwind denormal_fpenv(preservesign) }
attributes #3 = { nounwind denormal_fpenv(float: preservesign) }