| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s |
| |
| # This would assert that a dead def should have no uses, but the dead |
| # def and use have different subreg indices. |
| |
| --- |
| name: multi_def_dead_reg_subreg_check |
| tracksRegLiveness: true |
| machineFunctionInfo: |
| isEntryFunction: true |
| scratchRSrcReg: '$sgpr24_sgpr25_sgpr26_sgpr27' |
| frameOffsetReg: '$sgpr32' |
| stackPtrOffsetReg: '$sgpr32' |
| argumentInfo: |
| privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' } |
| privateSegmentWaveByteOffset: { reg: '$sgpr33' } |
| body: | |
| ; CHECK-LABEL: name: multi_def_dead_reg_subreg_check |
| ; CHECK: bb.0: |
| ; CHECK: successors: %bb.1(0x80000000) |
| ; CHECK: liveins: $sgpr6_sgpr7 |
| ; CHECK: undef %0.sub3:vreg_512 = V_MOV_B32_e32 0, implicit $exec |
| ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; CHECK: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 0, [[V_MOV_B32_e32_]], implicit $exec |
| ; CHECK: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| ; CHECK: [[COPY:%[0-9]+]]:vreg_512 = COPY %0 |
| ; CHECK: bb.1: |
| ; CHECK: successors: %bb.1(0x80000000) |
| ; CHECK: BUFFER_STORE_DWORD_OFFEN %0.sub3, undef %5:vgpr_32, $sgpr24_sgpr25_sgpr26_sgpr27, $sgpr32, 0, 0, 0, 0, implicit $exec :: (store (s32), align 8, addrspace 5) |
| ; CHECK: dead %6:vgpr_32 = DS_READ_B32_gfx9 undef %7:vgpr_32, 0, 0, implicit $exec |
| ; CHECK: dead %8:vreg_64 = DS_READ_B64_gfx9 [[V_MOV_B32_e32_]], 0, 0, implicit $exec |
| ; CHECK: dead %9:vreg_128 = DS_READ_B128_gfx9 [[V_ADD_U32_e32_]], 0, 0, implicit $exec |
| ; CHECK: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0 |
| ; CHECK: undef %11.sub1:vreg_512 = COPY [[COPY]].sub1 |
| ; CHECK: INLINEASM &"", 1 /* sideeffect attdialect */, 851978 /* regdef:VGPR_LO16 */, def dead [[COPY1]], 851978 /* regdef:VGPR_LO16 */, def dead [[COPY]].sub1, 2147483657 /* reguse tiedto:$0 */, [[COPY1]], 2147549193 /* reguse tiedto:$1 */, [[COPY]].sub1 |
| ; CHECK: %11.sub0:vreg_512 = COPY [[COPY]].sub0 |
| ; CHECK: %11.sub3:vreg_512 = COPY [[COPY]].sub3 |
| ; CHECK: %11.sub2:vreg_512 = COPY undef [[V_MOV_B32_e32_]] |
| ; CHECK: %11.sub5:vreg_512 = COPY undef [[V_MOV_B32_e32_]] |
| ; CHECK: [[COPY2:%[0-9]+]]:vreg_512 = COPY %11 |
| ; CHECK: dead %10:vgpr_32 = V_ADD_CO_U32_e32 4, [[V_MOV_B32_e32_1]], implicit-def dead $vcc, implicit $exec |
| ; CHECK: S_BRANCH %bb.1 |
| bb.0: |
| liveins: $sgpr6_sgpr7 |
| |
| undef %0.sub3:vreg_512 = V_MOV_B32_e32 0, implicit $exec |
| %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| %2:vgpr_32 = V_ADD_U32_e32 0, %1, implicit $exec |
| %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec |
| %4:vreg_512 = COPY %0 |
| |
| bb.1: |
| BUFFER_STORE_DWORD_OFFEN %0.sub3, undef %5:vgpr_32, $sgpr24_sgpr25_sgpr26_sgpr27, $sgpr32, 0, 0, 0, 0, implicit $exec :: (store (s32), align 8, addrspace 5) |
| %6:vgpr_32 = DS_READ_B32_gfx9 undef %7:vgpr_32, 0, 0, implicit $exec |
| %8:vreg_64 = DS_READ_B64_gfx9 %1, 0, 0, implicit $exec |
| %9:vreg_128 = DS_READ_B128_gfx9 %2, 0, 0, implicit $exec |
| %10:vgpr_32 = V_ADD_CO_U32_e32 4, %3, implicit-def dead $vcc, implicit $exec |
| undef %11.sub0:vreg_512 = COPY %4.sub0 |
| %12:vgpr_32 = COPY %4.sub0 |
| %11.sub1:vreg_512 = COPY %4.sub1 |
| INLINEASM &"", 1, 851978, def dead %12, 851978, def dead %4.sub1, 2147483657, %12, 2147549193, %4.sub1 |
| %11.sub2:vreg_512 = COPY undef %1 |
| %11.sub3:vreg_512 = COPY %4.sub3 |
| %11.sub5:vreg_512 = COPY undef %1 |
| %4:vreg_512 = COPY %11 |
| S_BRANCH %bb.1 |
| |
| ... |