[LLD][ELF][ARM] use .reloc directive for Thumb assembler tests
In the near future llvm-mc will resolve the fixups that generate
R_ARM_THUMB_PC8 and R_ARM_THUMB_PC12 at assembly time (see comments in
D72892), and forbid inter-section references. Change the LLD tests for
these relocations to use .inst and .reloc to avoid LLD tests failing when
this happens. The tests generate the same instructions, relocations
and symbols.
I will need to make equivalent changes for D75349 Arm equivalent
relocations, but this is still in review so these don't need changing
before llvm-mc.
Differential Revision: https://reviews.llvm.org/D77200
diff --git a/lld/test/ELF/arm-thumb-adr-err.s b/lld/test/ELF/arm-thumb-adr-err.s
index c37ccf9..4b3a70f 100644
--- a/lld/test/ELF/arm-thumb-adr-err.s
+++ b/lld/test/ELF/arm-thumb-adr-err.s
@@ -1,5 +1,5 @@
// REQUIRES: arm
-// RUN: llvm-mc -g --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
+// RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits
@@ -13,12 +13,18 @@
.global _start
.thumb_func
_start:
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023]
- adr r0, low
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes
- adr r1, unaligned
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023]
- adr r2, range
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023]
+/// adr r0, low
+ .inst.n 0xa0ff
+ .reloc 0, R_ARM_THM_PC8, low
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes
+/// adr r1, unaligned
+ .inst.n 0xa1ff
+ .reloc 2, R_ARM_THM_PC8, unaligned
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023]
+/// adr r2, range
+ .inst.n 0xa2ff
+ .reloc 4, R_ARM_THM_PC8, range
.section .text.2, "ax", %progbits
.balign 4
diff --git a/lld/test/ELF/arm-thumb-adr.s b/lld/test/ELF/arm-thumb-adr.s
index 35d3b4c..adeac7d 100644
--- a/lld/test/ELF/arm-thumb-adr.s
+++ b/lld/test/ELF/arm-thumb-adr.s
@@ -10,9 +10,12 @@
.global _start
.thumb_func
_start:
- adr r0, target1
- adr r1, target2
-
+/// adr r0, target1
+ .inst.n 0xa0ff
+ .reloc 0, R_ARM_THM_PC8, target1
+/// adr r1, target2
+ .inst.n 0xa1ff
+ .reloc 2, R_ARM_THM_PC8, target2
.section .text.02, "ax", %progbits
.balign 4
.global target1
diff --git a/lld/test/ELF/arm-thumb-ldrlit-err.s b/lld/test/ELF/arm-thumb-ldrlit-err.s
index 5f53eac..14f1f37 100644
--- a/lld/test/ELF/arm-thumb-ldrlit-err.s
+++ b/lld/test/ELF/arm-thumb-ldrlit-err.s
@@ -1,5 +1,5 @@
// REQUIRES: arm
-// RUN: llvm-mc -g --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
+// RUN: llvm-mc --triple=thumbv6m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits
@@ -13,12 +13,18 @@
.global _start
.thumb_func
_start:
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023]
- ldr r0, low
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes
- ldr r1, unaligned
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023]
- ldr r2, range
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_PC8 out of range: 18446744073709551612 is not in [0, 1023]
+/// ldr r0, low
+ .inst.n 0x48ff
+ .reloc 0, R_ARM_THM_PC8, low
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x2): improper alignment for relocation R_ARM_THM_PC8: 0x2 is not aligned to 4 bytes
+/// ldr r1, unaligned
+ .inst.n 0x49ff
+ .reloc 2, R_ARM_THM_PC8, unaligned
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_PC8 out of range: 1024 is not in [0, 1023]
+/// ldr r2, range
+ .inst.n 0x4aff
+ .reloc 4, R_ARM_THM_PC8, range
.section .text.2, "ax", %progbits
.balign 4
diff --git a/lld/test/ELF/arm-thumb-ldrlit.s b/lld/test/ELF/arm-thumb-ldrlit.s
index 43bcf81..31eea19 100644
--- a/lld/test/ELF/arm-thumb-ldrlit.s
+++ b/lld/test/ELF/arm-thumb-ldrlit.s
@@ -10,9 +10,12 @@
.global _start
.thumb_func
_start:
- ldr r0, target1
- ldr r1, target2
-
+/// ldr r0, target1
+ .inst.n 0x48ff
+ .reloc 0, R_ARM_THM_PC8, target1
+/// ldr r1, target2
+ .inst.n 0x49ff
+ .reloc 2, R_ARM_THM_PC8, target2
.section .text.02, "ax", %progbits
.balign 4
.global target1
diff --git a/lld/test/ELF/arm-thumb2-adr-err.s b/lld/test/ELF/arm-thumb2-adr-err.s
index fb3afaf..20ded45 100644
--- a/lld/test/ELF/arm-thumb2-adr-err.s
+++ b/lld/test/ELF/arm-thumb2-adr-err.s
@@ -1,5 +1,5 @@
// REQUIRES: arm
-// RUN: llvm-mc -g --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
+// RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits
@@ -14,11 +14,14 @@
.global _start
.thumb_func
_start:
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4098 is not in [0, 4095]
- adr.w r0, low - 4091
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4096 is not in [0, 4095]
- adr.w r0, high + 4091
-
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4098 is not in [0, 4095]
+/// adr.w r0, low - 4091
+ .inst.w 0xf6af70ff
+ .reloc 0, R_ARM_THM_ALU_PREL_11_0, low
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_ALU_PREL_11_0 out of range: 4096 is not in [0, 4095]
+/// adr.w r0, high + 4091
+ .inst.w 0xf60f70f7
+ .reloc 4, R_ARM_THM_ALU_PREL_11_0, high
.section .text.2
.thumb_func
.balign 4
diff --git a/lld/test/ELF/arm-thumb2-adr.s b/lld/test/ELF/arm-thumb2-adr.s
index 86b29ad..a6895bc 100644
--- a/lld/test/ELF/arm-thumb2-adr.s
+++ b/lld/test/ELF/arm-thumb2-adr.s
@@ -10,7 +10,7 @@
// RUN: } " > %t.script
// RUN: ld.lld --script %t.script %t.o -o %t
// RUN: llvm-readobj --symbols %t | FileCheck %s --check-prefix=SYMS
-// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t
+// RUN: llvm-objdump -d --triple=thumbv7m-none-eabi %t
// RUN: llvm-objdump -d --no-show-raw-insn --triple=thumbv7m-none-eabi %t | FileCheck %s
/// Test the various legal cases for the R_ARM_THM_ALU_PREL_11_0 relocation
@@ -44,32 +44,58 @@
.thumb_func
_start:
nop
- adr.w r0, dat1
- adr.w r1, dat2
+/// adr.w r0, dat1
+ .inst.w 0xf2af0004
+ .reloc 2, R_ARM_THM_ALU_PREL_11_0, dat1
+/// adr.w r1, dat2
+ .inst.w 0xf2af0104
+ .reloc 6, R_ARM_THM_ALU_PREL_11_0, dat2
nop
- adr.w r2, dat3
- adr.w r3, dat4
- .balign 4
- adr.w r0, target1
+/// adr.w r2, dat3
+ .inst.w 0xf2af0204
+ .reloc 0xc, R_ARM_THM_ALU_PREL_11_0, dat3
+/// adr.w r3, dat4
+ .inst.w 0xf2af0304
+ .reloc 0x10, R_ARM_THM_ALU_PREL_11_0, dat4
+/// adr.w r0, target1
+ .inst.w 0xf2af0004
+ .reloc 0x14, R_ARM_THM_ALU_PREL_11_0, target1
nop
- adr.w r1, target2
-
+/// adr.w r1, target2
+ .inst.w 0xf2af0104
+ .reloc 0x1a, R_ARM_THM_ALU_PREL_11_0, target2
.section .text.pos, "ax", %progbits
.balign 4
.global pos
.thumb_func
pos:
- adr.w r2, target3
+/// adr.w r2, target3
+ .inst.w 0xf2af0204
+ .reloc 0, R_ARM_THM_ALU_PREL_11_0, target3
nop
- adr.w r3, target4
- .balign 4
- adr.w r0, dat5
- adr.w r1, dat6
+/// adr.w r3, target4
+ .inst.w 0xf2af0304
+ .reloc 6, R_ARM_THM_ALU_PREL_11_0, target4
nop
- adr.w r2, dat7
- adr.w r3, dat8
+/// adr.w r0, dat5
+ .inst.w 0xf2af0004
+ .reloc 0xc, R_ARM_THM_ALU_PREL_11_0, dat5
+/// adr.w r1, dat6
+ .inst.w 0xf2af0104
+ .reloc 0x10, R_ARM_THM_ALU_PREL_11_0, dat6
+
+ nop
+/// adr.w r2, dat7
+ .inst.w 0xf2af0204
+ .reloc 0x16, R_ARM_THM_ALU_PREL_11_0, dat7
+
+/// adr.w r3, dat8
+ .inst.w 0xf2af0304
+ .reloc 0x1a, R_ARM_THM_ALU_PREL_11_0, dat8
/// positive addend in instruction, all others are -4 (PC bias)
- adr.w r4, dat5 + 8
+/// adr.w r4, dat5 + 8
+ .inst.w 0xf20f0404
+ .reloc 0x1e, R_ARM_THM_ALU_PREL_11_0, dat5 + 8
.section .text.high, "ax", %progbits
.balign 4
diff --git a/lld/test/ELF/arm-thumb2-ldrlit-err.s b/lld/test/ELF/arm-thumb2-ldrlit-err.s
index 451c3f6a..8d13e6d 100644
--- a/lld/test/ELF/arm-thumb2-ldrlit-err.s
+++ b/lld/test/ELF/arm-thumb2-ldrlit-err.s
@@ -1,5 +1,5 @@
// REQUIRES: arm
-// RUN: llvm-mc -g --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
+// RUN: llvm-mc --triple=thumbv7m-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %s
// RUN: not ld.lld %t.o -o /dev/null 2>&1 | FileCheck %s
.section .text.0, "ax", %progbits
@@ -14,10 +14,14 @@
.global _start
.thumb_func
_start:
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x0): relocation R_ARM_THM_PC12 out of range: 4098 is not in [0, 4095]
- ldr.w r0, low - 4091
-// CHECK: {{.*}}.s:[[# @LINE+1]]:(.text.1+0x4): relocation R_ARM_THM_PC12 out of range: 4096 is not in [0, 4095]
- ldr.w r0, high + 4091
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x0): relocation R_ARM_THM_PC12 out of range: 4098 is not in [0, 4095]
+/// ldr.w r0, low - 4091
+ .inst.w 0xf85f0fff
+ .reloc 0, R_ARM_THM_PC12, low
+// CHECK: {{.*}}.s.tmp.o:(.text.1+0x4): relocation R_ARM_THM_PC12 out of range: 4096 is not in [0, 4095]
+/// ldr.w r0, high + 4091
+ .inst.w 0xf8df0ff7
+ .reloc 4, R_ARM_THM_PC12, high
.section .text.2
.thumb_func
diff --git a/lld/test/ELF/arm-thumb2-ldrlit.s b/lld/test/ELF/arm-thumb2-ldrlit.s
index cbf0922..a179a191 100644
--- a/lld/test/ELF/arm-thumb2-ldrlit.s
+++ b/lld/test/ELF/arm-thumb2-ldrlit.s
@@ -44,32 +44,59 @@
.thumb_func
_start:
nop
- ldr r0, dat1
- ldr r1, dat2
+/// ldr r0, dat1
+ .inst.w 0xf85f0004
+ .reloc 2, R_ARM_THM_PC12, dat1
+/// ldr r1, dat2
+ .inst.w 0xf85f1004
+ .reloc 6, R_ARM_THM_PC12, dat2
nop
- ldr r2, dat3
- ldr r3, dat4
- .balign 4
- ldr r0, target1
+/// ldr r2, dat3
+ .inst.w 0xf85f2004
+ .reloc 0xc, R_ARM_THM_PC12, dat3
+/// ldr r3, dat4
+ .inst.w 0xf85f3004
+ .reloc 0x10, R_ARM_THM_PC12, dat4
+
+/// ldr r0, target1
+ .inst.w 0xf85f0004
+ .reloc 0x14, R_ARM_THM_PC12, target1
+
nop
- ldr r1, target2
+/// ldr r1, target2
+ .inst.w 0xf85f1004
+ .reloc 0x1a, R_ARM_THM_PC12, target2
.section .text.pos, "ax", %progbits
.balign 4
.global pos
.thumb_func
pos:
- ldr r2, target3
+/// ldr r2, target3
+ .inst.w 0xf85f2004
+ .reloc 0, R_ARM_THM_PC12, target3
nop
- ldr r3, target4
- .balign 4
- ldr r0, dat5
- ldr r1, dat6
+/// ldr r3, target4
+ .inst.w 0xf85f3004
+ .reloc 6, R_ARM_THM_PC12, target4
nop
- ldr r2, dat7
- ldr r3, dat8
+/// ldr r0, dat5
+ .inst.w 0xf85f0004
+ .reloc 0xc, R_ARM_THM_PC12, dat5
+/// ldr r1, dat6
+ .inst.w 0xf85f1004
+ .reloc 0x10, R_ARM_THM_PC12, dat6
+ nop
+/// ldr r2, dat7
+ .inst.w 0xf85f2004
+ .reloc 0x16, R_ARM_THM_PC12, dat7
+/// ldr r3, dat8
+ .inst.w 0xf85f3004
+ .reloc 0x1a, R_ARM_THM_PC12, dat8
/// positive addend in instruction, all others are -4 (PC bias)
- ldr.w r4, dat5 + 8
+///ldr.w r4, dat5 + 8
+ .inst 0xf8df4004
+ .reloc 0x1e, R_ARM_THM_PC12, dat5
.section .text.high, "ax", %progbits
.balign 4
