MC: Migrate away from operator<< MCExpr MCExpr::print has an optional MCAsmInfo argument, which is error-prone when omitted. MCExpr::print and the convenience helper operator<< are discouraged to use. Switch to MCAsmInfo::printExpr instead. Use the target-specific MCAsmInfo if available.
diff --git a/llvm/lib/CodeGen/AsmPrinter/DIE.cpp b/llvm/lib/CodeGen/AsmPrinter/DIE.cpp index 4bbf662..52b26c9 100644 --- a/llvm/lib/CodeGen/AsmPrinter/DIE.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/DIE.cpp
@@ -472,7 +472,10 @@ } LLVM_DUMP_METHOD -void DIEExpr::print(raw_ostream &O) const { O << "Expr: " << *Expr; } +void DIEExpr::print(raw_ostream &O) const { + O << "Expr: "; + Expr->print(O, nullptr); +} //===----------------------------------------------------------------------===// // DIELabel Implementation
diff --git a/llvm/lib/CodeGen/FaultMaps.cpp b/llvm/lib/CodeGen/FaultMaps.cpp index 3f8fe24..79025e3 100644 --- a/llvm/lib/CodeGen/FaultMaps.cpp +++ b/llvm/lib/CodeGen/FaultMaps.cpp
@@ -86,16 +86,8 @@ OS.emitInt32(0); // Reserved for (const auto &Fault : FFI) { - LLVM_DEBUG(dbgs() << WFMP << " fault type: " - << faultTypeToString(Fault.Kind) << "\n"); OS.emitInt32(Fault.Kind); - - LLVM_DEBUG(dbgs() << WFMP << " faulting PC offset: " - << *Fault.FaultingOffsetExpr << "\n"); OS.emitValue(Fault.FaultingOffsetExpr, 4); - - LLVM_DEBUG(dbgs() << WFMP << " fault handler PC offset: " - << *Fault.HandlerOffsetExpr << "\n"); OS.emitValue(Fault.HandlerOffsetExpr, 4); } }
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index 99fabff..70b27f8 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2601,12 +2601,12 @@ break; } case k_Immediate: - OS << *getImm(); + MCAsmInfo().printExpr(OS, *getImm()); break; case k_ShiftedImm: { unsigned Shift = getShiftedImmShift(); OS << "<shiftedimm "; - OS << *getShiftedImmVal(); + MCAsmInfo().printExpr(OS, *getShiftedImmVal()); OS << ", lsl #" << AArch64_AM::getShiftValue(Shift) << ">"; break; }
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 5cab21a..d0557ae 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -8,6 +8,7 @@ #include "AMDKernelCodeT.h" #include "MCTargetDesc/AMDGPUInstPrinter.h" +#include "MCTargetDesc/AMDGPUMCAsmInfo.h" #include "MCTargetDesc/AMDGPUMCExpr.h" #include "MCTargetDesc/AMDGPUMCKernelDescriptor.h" #include "MCTargetDesc/AMDGPUMCTargetDesc.h" @@ -1168,7 +1169,9 @@ OS << '\'' << getToken() << '\''; break; case Expression: - OS << "<expr " << *Expr << '>'; + OS << "<expr "; + MCAsmInfo().printExpr(OS, *Expr); + OS << '>'; break; } }
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 25f0273..8c54dbc 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -4024,7 +4024,7 @@ OS << "<banked reg: " << getBankedReg() << ">"; break; case k_Immediate: - OS << *getImm(); + MCAsmInfo().printExpr(OS, *getImm()); break; case k_MemBarrierOpt: OS << "<ARM_MB::" << MemBOptToString(getMemBarrierOpt(), false) << ">"; @@ -4039,8 +4039,10 @@ OS << "<memory"; if (Memory.BaseRegNum) OS << " base:" << RegName(Memory.BaseRegNum); - if (Memory.OffsetImm) - OS << " offset-imm:" << *Memory.OffsetImm; + if (Memory.OffsetImm) { + OS << " offset-imm:"; + MCAsmInfo().printExpr(OS, *Memory.OffsetImm); + } if (Memory.OffsetRegNum) OS << " offset-reg:" << (Memory.isNegative ? "-" : "") << RegName(Memory.OffsetRegNum); @@ -4094,7 +4096,8 @@ << ModImm.Rot << ")>"; break; case k_ConstantPoolImmediate: - OS << "<constant_pool_imm #" << *getConstantPoolImm(); + OS << "<constant_pool_imm #"; + MCAsmInfo().printExpr(OS, *getConstantPoolImm()); break; case k_BitfieldDescriptor: OS << "<bitfield " << "lsb: " << Bitfield.LSB
diff --git a/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp b/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp index 012cf2c..b58b5e3 100644 --- a/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp +++ b/llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
@@ -256,12 +256,16 @@ O << "Register: " << getReg(); break; case k_Immediate: - O << "Immediate: \"" << *getImm() << "\""; + O << "Immediate: \""; + MCAsmInfo().printExpr(O, *getImm()); + O << "\""; break; case k_Memri: { // only manually print the size for non-negative values, // as the sign is inserted automatically. - O << "Memri: \"" << getReg() << '+' << *getImm() << "\""; + O << "Memri: \"" << getReg() << '+'; + MCAsmInfo().printExpr(O, *getImm()); + O << "\""; break; } }
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp index 1e4b2e2..4812191 100644 --- a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp +++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp
@@ -166,7 +166,7 @@ O << Imm; } else { assert(Op.isExpr() && "Unknown pcrel immediate operand"); - O << *Op.getExpr(); + MAI.printExpr(O, *Op.getExpr()); } } @@ -189,7 +189,7 @@ O << Offset; } else if (OffsetOp.isExpr()) { - O << *OffsetOp.getExpr(); + MAI.printExpr(O, *OffsetOp.getExpr()); } else { llvm_unreachable("unknown type for offset"); }
diff --git a/llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp b/llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp index b49e8fd..8263fa5 100644 --- a/llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp +++ b/llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
@@ -6,6 +6,7 @@ // //===----------------------------------------------------------------------===// +#include "MCTargetDesc/BPFMCAsmInfo.h" #include "MCTargetDesc/BPFMCTargetDesc.h" #include "TargetInfo/BPFTargetInfo.h" #include "llvm/ADT/StringSwitch.h" @@ -167,7 +168,7 @@ void print(raw_ostream &OS) const override { switch (Kind) { case Immediate: - OS << *getImm(); + MCAsmInfo().printExpr(OS, *getImm()); break; case Register: OS << "<register x";
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp index f100999..0ef78f3 100644 --- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp +++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -381,9 +381,10 @@ case k_MemoryReg: OS << "Mem: " << getMemBase() << "+" << getMemOffsetReg() << "\n"; break; case k_MemoryImm: assert(getMemOff() != nullptr); - OS << "Mem: " << getMemBase() - << "+" << *getMemOff() - << "\n"; break; + OS << "Mem: " << getMemBase() << "+"; + MCAsmInfo().printExpr(OS, *getMemOff()); + OS << "\n"; + break; case k_ASITag: OS << "ASI tag: " << getASITag() << "\n"; break;
diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index 04a4c36..e22e1d2 100644 --- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
@@ -732,16 +732,7 @@ static void printMCExpr(const MCExpr *E, raw_ostream &OS) { if (!E) return; - if (auto *CE = dyn_cast<MCConstantExpr>(E)) - OS << *CE; - else if (auto *UE = dyn_cast<MCUnaryExpr>(E)) - OS << *UE; - else if (auto *BE = dyn_cast<MCBinaryExpr>(E)) - OS << *BE; - else if (auto *SRE = dyn_cast<MCSymbolRefExpr>(E)) - OS << *SRE; - else - OS << *E; + MCAsmInfo().printExpr(OS, *E); } void SystemZOperand::print(raw_ostream &OS) const {
diff --git a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp index 297fdc8..af79070 100644 --- a/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp +++ b/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
@@ -67,7 +67,7 @@ raw_ostream &O) { const MCOperand &MO = MI->getOperand(OpNum); if (MO.isExpr()) { - O << *MO.getExpr(); + MAI.printExpr(O, *MO.getExpr()); return; } uint64_t Value = static_cast<uint64_t>(MO.getImm()); @@ -80,7 +80,7 @@ raw_ostream &O) { const MCOperand &MO = MI->getOperand(OpNum); if (MO.isExpr()) { - O << *MO.getExpr(); + MAI.printExpr(O, *MO.getExpr()); return; } int64_t Value = MI->getOperand(OpNum).getImm();
diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp index 1a9aa1e..c18de5f 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
@@ -13,6 +13,7 @@ //===----------------------------------------------------------------------===// #include "MCTargetDesc/WebAssemblyTargetStreamer.h" +#include "MCTargetDesc/WebAssemblyMCAsmInfo.h" #include "MCTargetDesc/WebAssemblyMCTypeUtilities.h" #include "llvm/MC/MCContext.h" #include "llvm/MC/MCSectionWasm.h" @@ -112,7 +113,9 @@ } void WebAssemblyTargetAsmStreamer::emitIndIdx(const MCExpr *Value) { - OS << "\t.indidx \t" << *Value << '\n'; + OS << "\t.indidx\t"; + getContext().getAsmInfo()->printExpr(OS, *Value); + OS << '\n'; } void WebAssemblyTargetWasmStreamer::emitLocal(ArrayRef<wasm::ValType> Types) {
diff --git a/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp b/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp index 019eea8..28ce2a7 100644 --- a/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp +++ b/llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
@@ -305,7 +305,7 @@ void print(raw_ostream &OS) const override { switch (Kind) { case Immediate: - OS << *getImm(); + MCAsmInfo().printExpr(OS, *getImm()); break; case Register: OS << "<register x";