llvm/test/Transforms/SLPVectorizer/X86/reordered-masked-loads.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-unknown -mcpu=znver2 < %s | FileCheck %s

%struct.ae = type { %struct.g }
%struct.g = type { [11 x double] }

define void @test() {
; CHECK-LABEL: define void @test(
; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[M1:%.*]] = alloca [[STRUCT_AE:%.*]], align 8
; CHECK-NEXT:    [[ARRAYIDX_I5_I:%.*]] = getelementptr i8, ptr [[M1]], i64 48
; CHECK-NEXT:    [[ARRAYIDX_I4:%.*]] = getelementptr i8, ptr null, i64 16
; CHECK-NEXT:    [[TMP1:%.*]] = load <5 x double>, ptr [[M1]], align 8
; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <5 x double> [[TMP1]], <5 x double> poison, <4 x i32> <i32 0, i32 1, i32 3, i32 4>
; CHECK-NEXT:    [[TMP4:%.*]] = load <6 x double>, ptr [[M1]], align 8
; CHECK-NEXT:    [[TMP8:%.*]] = shufflevector <6 x double> [[TMP4]], <6 x double> poison, <4 x i32> <i32 0, i32 3, i32 4, i32 5>
; CHECK-NEXT:    [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX_I5_I]], align 8
; CHECK-NEXT:    [[TMP6:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
; CHECK-NEXT:    [[TMP7:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> poison, <5 x i32> <i32 0, i32 1, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <5 x double> [[TMP7]], <5 x double> [[TMP1]], <4 x i32> <i32 0, i32 6, i32 9, i32 1>
; CHECK-NEXT:    [[TMP9:%.*]] = fadd <4 x double> [[TMP8]], [[TMP5]]
; CHECK-NEXT:    [[TMP10:%.*]] = fptosi <4 x double> [[TMP9]] to <4 x i32>
; CHECK-NEXT:    [[TMP11:%.*]] = sitofp <4 x i32> [[TMP10]] to <4 x double>
; CHECK-NEXT:    store <4 x double> [[TMP11]], ptr [[ARRAYIDX_I4]], align 8
; CHECK-NEXT:    ret void
;
entry:
  %m1 = alloca %struct.ae, align 8
  %0 = getelementptr i8, ptr %m1, i64 8
  %1 = load double, ptr %0, align 8
  %arrayidx.i1 = getelementptr i8, ptr %m1, i64 24
  %2 = load double, ptr %arrayidx.i1, align 8
  %add.i2 = fadd double %1, %2
  %conv.i3 = fptosi double %add.i2 to i32
  %conv2.i3 = sitofp i32 %conv.i3 to double
  %3 = load double, ptr %m1, align 8
  %arrayidx.i1.i = getelementptr i8, ptr %m1, i64 48
  %4 = load double, ptr %arrayidx.i1.i, align 8
  %add.i1 = fadd double %3, %4
  %conv.i2 = fptosi double %add.i1 to i32
  %conv2.i2 = sitofp i32 %conv.i2 to double
  %arrayidx.i4 = getelementptr i8, ptr null, i64 16
  store double %conv2.i2, ptr %arrayidx.i4, align 8
  %5 = getelementptr i8, ptr null, i64 24
  store double %conv2.i3, ptr %5, align 8
  %arrayidx.i5 = getelementptr i8, ptr %m1, i64 32
  %6 = load double, ptr %arrayidx.i5, align 8
  %add.i1.i.i = fadd double %6, %6
  %conv.i1.i = fptosi double %add.i1.i.i to i32
  %conv2.i1.i = sitofp i32 %conv.i1.i to double
  %arrayidx.i1.i.i = getelementptr i8, ptr null, i64 32
  store double %conv2.i1.i, ptr %arrayidx.i1.i.i, align 8
  %arrayidx.i5.i = getelementptr i8, ptr %m1, i64 40
  %7 = load double, ptr %arrayidx.i5.i, align 8
  %arrayidx.i.i.i.i2.i1 = getelementptr i8, ptr %m1, i64 56
  %8 = load double, ptr %arrayidx.i.i.i.i2.i1, align 8
  %add.i1.i.i.i = fadd double %7, %8
  %conv.i1.i.i = fptosi double %add.i1.i.i.i to i32
  %conv2.i1.i.i = sitofp i32 %conv.i1.i.i to double
  %arrayidx.i.i.i3.i1 = getelementptr i8, ptr null, i64 40
  store double %conv2.i1.i.i, ptr %arrayidx.i.i.i3.i1, align 8
  ret void
}