llvm/test/Transforms/InstCombine/pr142518.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=instcombine < %s | FileCheck %s

define i8 @pr142518(ptr %p, i8 %x, i1 %c) "instcombine-no-verify-fixpoint" {
; CHECK-LABEL: define i8 @pr142518(
; CHECK-SAME: ptr [[P:%.*]], i8 [[X:%.*]], i1 [[C:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    [[CMP1:%.*]] = icmp slt i8 [[X]], -1
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[NOT1:%.*]] = xor i1 [[CMP1]], true
; CHECK-NEXT:    [[OR:%.*]] = or i1 [[CMP1]], [[NOT1]]
; CHECK-NEXT:    [[CMP:%.*]] = xor i1 [[OR]], true
; CHECK-NEXT:    [[EXT2:%.*]] = zext i1 [[CMP]] to i8
; CHECK-NEXT:    store i8 [[EXT2]], ptr [[P]], align 1
; CHECK-NEXT:    br i1 false, label %[[LOOP]], label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[NOT3:%.*]] = xor i1 [[OR]], true
; CHECK-NEXT:    [[EXT3:%.*]] = zext i1 [[NOT3]] to i8
; CHECK-NEXT:    ret i8 [[EXT3]]
;
entry:
  %flag = alloca i8, align 1
  %cmp = icmp slt i8 %x, -1
  br label %loop

loop:
  %phi = phi i1 [ %cmp, %entry ], [ %c, %loop ]
  %not1 = xor i1 %phi, true
  %or = or i1 %cmp, %not1
  %not2 = xor i1 %or, true
  %ext2 = zext i1 %not2 to i8
  store i8 %ext2, ptr %p, align 1
  store i8 1, ptr %flag, align 1
  %flagv = load i8, ptr %flag, align 1
  %cond = icmp eq i8 %flagv, 0
  br i1 %cond, label %loop, label %exit

exit:
  %not3 = xor i1 %or, true
  %ext3 = zext i1 %not3 to i8
  ret i8 %ext3
}