llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-chain-to-shuffles.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S -mtriple=amdgcn-- -mcpu=gfx1100 -passes=vector-combine < %s | FileCheck -check-prefix=OPT %s

; Generated from amdgpu-promote-alloca on array of vectors
; VectorCombiner should recognize chain of extract-insert vectors
; and turn them into one or two shuffles
define amdgpu_kernel void @extract_insert_chain_to_shuffles(<16 x i8> %in, <16 x i8> %add, ptr addrspace(3) %out) #0 {
; OPT-LABEL: define amdgpu_kernel void @extract_insert_chain_to_shuffles(
; OPT-SAME: <16 x i8> [[IN:%.*]], <16 x i8> [[ADD:%.*]], ptr addrspace(3) [[OUT:%.*]]) #[[ATTR0:[0-9]+]] {
; OPT-NEXT:  [[ENTRY:.*:]]
; OPT-NEXT:    [[SUM:%.*]] = add <16 x i8> [[IN]], [[ADD]]
; OPT-NEXT:    store <16 x i8> [[SUM]], ptr addrspace(3) [[OUT]], align 16
; OPT-NEXT:    ret void
;
entry:
  %i160 = extractelement <16 x i8> %in, i64 0
  %i162 = extractelement <16 x i8> %in, i64 1
  %i164 = extractelement <16 x i8> %in, i64 2
  %i166 = extractelement <16 x i8> %in, i64 3
  %i168 = extractelement <16 x i8> %in, i64 4
  %i170 = extractelement <16 x i8> %in, i64 5
  %i172 = extractelement <16 x i8> %in, i64 6
  %i174 = extractelement <16 x i8> %in, i64 7
  %i176 = extractelement <16 x i8> %in, i64 8
  %i178 = extractelement <16 x i8> %in, i64 9
  %i180 = extractelement <16 x i8> %in, i64 10
  %i182 = extractelement <16 x i8> %in, i64 11
  %i184 = extractelement <16 x i8> %in, i64 12
  %i186 = extractelement <16 x i8> %in, i64 13
  %i188 = extractelement <16 x i8> %in, i64 14
  %i190 = extractelement <16 x i8> %in, i64 15
  %i256 = insertelement <16 x i8> poison, i8 %i160, i64 0
  %i257 = insertelement <16 x i8> %i256, i8 %i162, i64 1
  %i258 = insertelement <16 x i8> %i257, i8 %i164, i64 2
  %i259 = insertelement <16 x i8> %i258, i8 %i166, i64 3
  %i260 = insertelement <16 x i8> %i259, i8 %i168, i64 4
  %i261 = insertelement <16 x i8> %i260, i8 %i170, i64 5
  %i262 = insertelement <16 x i8> %i261, i8 %i172, i64 6
  %i263 = insertelement <16 x i8> %i262, i8 %i174, i64 7
  %i264 = insertelement <16 x i8> %i263, i8 %i176, i64 8
  %i265 = insertelement <16 x i8> %i264, i8 %i178, i64 9
  %i266 = insertelement <16 x i8> %i265, i8 %i180, i64 10
  %i267 = insertelement <16 x i8> %i266, i8 %i182, i64 11
  %i268 = insertelement <16 x i8> %i267, i8 %i184, i64 12
  %i269 = insertelement <16 x i8> %i268, i8 %i186, i64 13
  %i270 = insertelement <16 x i8> %i269, i8 %i188, i64 14
  %i271 = insertelement <16 x i8> %i270, i8 %i190, i64 15
  %sum = add <16 x i8> %i271, %add
  store <16 x i8> %sum, ptr addrspace(3) %out, align 16
  ret void
}

attributes #0 = { "amdgpu-waves-per-eu"="2,2" }