llvm/test/CodeGen/AMDGPU/shrink-true16.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=si-shrink-instructions -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1100 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -passes=si-shrink-instructions -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1100 %s

---
name: 16bit_lo128_shrink
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr127
    ; GFX1100-LABEL: name: 16bit_lo128_shrink
    ; GFX1100: liveins: $vgpr127
    ; GFX1100-NEXT: {{  $}}
    ; GFX1100-NEXT: V_CMP_EQ_U16_fake16_e32 0, $vgpr127, implicit-def $vcc_lo, implicit $exec, implicit $exec
    $vcc_lo = V_CMP_EQ_U16_fake16_e64 0, $vgpr127, implicit-def $vcc, implicit $exec
...

---
name: 16bit_lo128_no_shrink
tracksRegLiveness: true
body: |
  bb.0:
    liveins: $vgpr128
    ; GFX1100-LABEL: name: 16bit_lo128_no_shrink
    ; GFX1100: liveins: $vgpr128
    ; GFX1100-NEXT: {{  $}}
    ; GFX1100-NEXT: $vcc_lo = V_CMP_EQ_U16_fake16_e64 0, $vgpr128, implicit-def $vcc_lo, implicit $exec
    $vcc_lo = V_CMP_EQ_U16_fake16_e64 0, $vgpr128, implicit-def $vcc, implicit $exec
...