llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass=liveintervals,amdgpu-pre-ra-optimizations %s -o - | FileCheck -check-prefix=GCN %s

---
name:            combine_sreg64_inits
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: combine_sreg64_inits
    ; GCN: dead %0:sgpr_64 = S_MOV_B64_IMM_PSEUDO 8589934593
    ; GCN-NEXT: S_NOP 0
    undef %0.sub0:sgpr_64 = S_MOV_B32 1
    S_NOP 0
    %0.sub1:sgpr_64 = S_MOV_B32 2
...
---
name:            combine_sreg64_inits_swap
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: combine_sreg64_inits_swap
    ; GCN: dead %0:sgpr_64 = S_MOV_B64_IMM_PSEUDO 8589934593
    ; GCN-NEXT: S_NOP 0
    undef %0.sub1:sgpr_64 = S_MOV_B32 2
    S_NOP 0
    %0.sub0:sgpr_64 = S_MOV_B32 1
...
---
name: sreg64_subreg_copy_0
tracksRegLiveness: true
body: |
  bb.0:
    ; GCN-LABEL: name: sreg64_subreg_copy_0
    ; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
    ; GCN-NEXT: undef %1.sub0:sgpr_64 = COPY [[DEF]]
    ; GCN-NEXT: %1.sub0:sgpr_64 = S_MOV_B32 1
    ; GCN-NEXT: dead %1.sub1:sgpr_64 = S_MOV_B32 2
    %0:sgpr_32 = IMPLICIT_DEF
    undef %1.sub0:sgpr_64 = COPY %0:sgpr_32
    %1.sub0:sgpr_64 = S_MOV_B32 1
    %1.sub1:sgpr_64 = S_MOV_B32 2
...
---
name: sreg64_subreg_copy_1
tracksRegLiveness: true
body: |
  bb.0:
    ; GCN-LABEL: name: sreg64_subreg_copy_1
    ; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
    ; GCN-NEXT: undef %1.sub0:sgpr_64 = S_MOV_B32 1
    ; GCN-NEXT: %1.sub1:sgpr_64 = COPY [[DEF]]
    ; GCN-NEXT: dead %1.sub1:sgpr_64 = S_MOV_B32 2
    %0:sgpr_32 = IMPLICIT_DEF
    undef %1.sub0:sgpr_64 = S_MOV_B32 1
    %1.sub1:sgpr_64 = COPY %0:sgpr_32
    %1.sub1:sgpr_64 = S_MOV_B32 2
...
---
name: sreg64_subreg_copy_2
tracksRegLiveness: true
body: |
  bb.0:
    ; GCN-LABEL: name: sreg64_subreg_copy_2
    ; GCN: [[DEF:%[0-9]+]]:sgpr_32 = IMPLICIT_DEF
    ; GCN-NEXT: undef %1.sub0:sgpr_64 = S_MOV_B32 1
    ; GCN-NEXT: %1.sub1:sgpr_64 = S_MOV_B32 2
    ; GCN-NEXT: dead %1.sub0:sgpr_64 = COPY [[DEF]]
    %0:sgpr_32 = IMPLICIT_DEF
    undef %1.sub0:sgpr_64 = S_MOV_B32 1
    %1.sub1:sgpr_64 = S_MOV_B32 2
    %1.sub0:sgpr_64 = COPY %0:sgpr_32
...
---
name:            sreg64_inits_different_blocks
tracksRegLiveness: true
body:             |
  ; GCN-LABEL: name: sreg64_inits_different_blocks
  ; GCN: bb.0:
  ; GCN-NEXT:   successors: %bb.1(0x80000000)
  ; GCN-NEXT: {{  $}}
  ; GCN-NEXT:   undef %0.sub0:sgpr_64 = S_MOV_B32 1
  ; GCN-NEXT: {{  $}}
  ; GCN-NEXT: bb.1:
  ; GCN-NEXT:   dead %0.sub1:sgpr_64 = S_MOV_B32 2
  bb.0:
    undef %0.sub0:sgpr_64 = S_MOV_B32 1

  bb.1:
    %0.sub1:sgpr_64 = S_MOV_B32 2
...
---
name:            sreg64_inits_two_defs_sub1
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: sreg64_inits_two_defs_sub1
    ; GCN: undef %0.sub0:sgpr_64 = S_MOV_B32 1
    ; GCN-NEXT: %0.sub1:sgpr_64 = S_MOV_B32 2
    ; GCN-NEXT: dead %0.sub1:sgpr_64 = S_MOV_B32 3
    undef %0.sub0:sgpr_64 = S_MOV_B32 1
    %0.sub1:sgpr_64 = S_MOV_B32 2
    %0.sub1:sgpr_64 = S_MOV_B32 3
...
---
name:            sreg64_inits_two_defs_sub0
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: sreg64_inits_two_defs_sub0
    ; GCN: undef %0.sub0:sgpr_64 = S_MOV_B32 1
    ; GCN-NEXT: %0.sub1:sgpr_64 = S_MOV_B32 2
    ; GCN-NEXT: dead %0.sub0:sgpr_64 = S_MOV_B32 3
    undef %0.sub0:sgpr_64 = S_MOV_B32 1
    %0.sub1:sgpr_64 = S_MOV_B32 2
    %0.sub0:sgpr_64 = S_MOV_B32 3
...
---
name:            sreg64_inits_full_def
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: sreg64_inits_full_def
    ; GCN: dead undef %1.sub0:sgpr_64 = S_MOV_B32 1
    ; GCN-NEXT: dead %0:sgpr_64 = S_MOV_B64 3
    undef %0.sub0:sgpr_64 = S_MOV_B32 1
    %0:sgpr_64 = S_MOV_B64 3
...
---
name:            sreg64_inits_imp_use
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: sreg64_inits_imp_use
    ; GCN: undef %0.sub0:sgpr_64 = S_MOV_B32 1, implicit $m0
    ; GCN-NEXT: dead %0.sub1:sgpr_64 = S_MOV_B32 2
    undef %0.sub0:sgpr_64 = S_MOV_B32 1, implicit $m0
    %0.sub1:sgpr_64 = S_MOV_B32 2
...
---
name:            sreg64_inits_imp_def
tracksRegLiveness: true
body:             |
  bb.0:
    ; GCN-LABEL: name: sreg64_inits_imp_def
    ; GCN: undef %0.sub0:sgpr_64 = S_MOV_B32 1, implicit-def $scc
    ; GCN-NEXT: dead %0.sub1:sgpr_64 = S_MOV_B32 2
    undef %0.sub0:sgpr_64 = S_MOV_B32 1, implicit-def $scc
    %0.sub1:sgpr_64 = S_MOV_B32 2
...