llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx1030 -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s

# Test that the Fix SGPR Copy pass changes scc definitions to vcc if the
# instruction that uses the scc is changed to use vcc.

---
name: change_scc_def
body:               |
  bb.0:
    ; GCN-LABEL: name: change_scc_def
    ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 681
    ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF3:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 1
    ; GCN: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 0
    ; GCN: [[V_MUL_HI_U32_U24_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_U24_e64 [[S_MOV_B32_1]], [[S_MOV_B32_]], implicit $exec
    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[DEF1]]
    ; GCN: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 killed [[DEF]], [[COPY]], implicit-def $vcc_lo, implicit $exec
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY killed [[DEF3]]
    ; GCN: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 killed [[DEF2]], [[COPY1]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
    ; GCN: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_2]]
    ; GCN: [[V_ADDC_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 [[V_MUL_HI_U32_U24_e64_]], [[COPY2]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
    %0:sreg_32 = S_MOV_B32 681
    %1:sreg_32 = IMPLICIT_DEF
    %2:sreg_32 = IMPLICIT_DEF
    %3:sreg_32 = IMPLICIT_DEF
    %4:sreg_32 = IMPLICIT_DEF
    %5:sreg_32 = S_MOV_B32 1
    %6:sreg_32 = S_MOV_B32 0
    %7:vgpr_32 = V_MUL_HI_U32_U24_e64 %5, %0, implicit $exec
    %8:sreg_32 = S_ADD_U32 killed %1, killed %2, implicit-def $scc
    %9:sreg_32 = S_ADDC_U32 killed %3, killed %4, implicit-def $scc, implicit $scc
    %10:sreg_32 = COPY %7
    %11:sreg_32 = S_ADDC_U32 killed %10, %6, implicit-def dead $scc, implicit $scc

...

# This case successfully converted scc definitions to vcc because the input
# to the first add is a vgpr. This test checks that it still works correctly.
---
name: test-working-scc-def
body:               |
  bb.0:
    ; GCN-LABEL: name: test-working-scc-def
    ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
    ; GCN: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
    ; GCN: [[DEF2:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF3:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF4:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF5:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[DEF6:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 killed [[DEF2]], [[DEF]], implicit-def $vcc_lo, implicit $exec
    ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY killed [[DEF4]]
    ; GCN: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 killed [[DEF3]], [[COPY]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
    ; GCN: [[DEF7:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
    ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DEF5]]
    ; GCN: [[V_ADDC_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 killed [[V_ADDC_U32_e32_1]], [[COPY1]], implicit-def $vcc_lo, implicit $vcc_lo, implicit $exec
    %0:vgpr_32 = IMPLICIT_DEF
    %1:vgpr_32 = IMPLICIT_DEF
    %2:sreg_32 = IMPLICIT_DEF
    %3:sreg_32 = IMPLICIT_DEF
    %4:sreg_32 = IMPLICIT_DEF
    %5:sreg_32 = IMPLICIT_DEF
    %6:sreg_32 = COPY %0
    %7:sreg_32 = S_ADD_U32 killed %6, killed %2, implicit-def $scc
    %8:sreg_32 = S_ADDC_U32 killed %3, killed %4, implicit-def $scc, implicit $scc
    %9:sreg_32 = COPY %1
    %10:sreg_32 = S_ADDC_U32 killed %10, %5, implicit-def dead $scc, implicit $scc

...