blob: ca7180ff84cb4bf738508c9337c70ff41db0f506 [file] [log] [blame]
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST,AVX2-FAST-ALL
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST,AVX2-FAST-PERLANE
; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512
; These patterns are produced by LoopVectorizer for interleaved stores.
define void @vf2(<2 x i16>* %in.vecptr0, <2 x i16>* %in.vecptr1, <2 x i16>* %in.vecptr2, <6 x i16>* %out.vec) nounwind {
; SSE-LABEL: vf2:
; SSE: # %bb.0:
; SSE-NEXT: movdqa (%rdi), %xmm0
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,2,1]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,1,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm0[0,1,2,3,4,7,6,7]
; SSE-NEXT: movq %xmm0, (%rcx)
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
; SSE-NEXT: movd %xmm0, 8(%rcx)
; SSE-NEXT: retq
;
; AVX-LABEL: vf2:
; AVX: # %bb.0:
; AVX-NEXT: vmovdqa (%rdi), %xmm0
; AVX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,2,3,4,5,12,13,6,7,4,5,6,7]
; AVX-NEXT: vpextrd $2, %xmm0, 8(%rcx)
; AVX-NEXT: vmovq %xmm0, (%rcx)
; AVX-NEXT: retq
;
; AVX512-LABEL: vf2:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = [0,2,8,1,3,9,1,9]
; AVX512-NEXT: vpermi2w (%rdx), %xmm0, %xmm1
; AVX512-NEXT: vpextrd $2, %xmm1, 8(%rcx)
; AVX512-NEXT: vmovq %xmm1, (%rcx)
; AVX512-NEXT: retq
%in.vec0 = load <2 x i16>, <2 x i16>* %in.vecptr0, align 32
%in.vec1 = load <2 x i16>, <2 x i16>* %in.vecptr1, align 32
%in.vec2 = load <2 x i16>, <2 x i16>* %in.vecptr2, align 32
%concat01 = shufflevector <2 x i16> %in.vec0, <2 x i16> %in.vec1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
%concat2u = shufflevector <2 x i16> %in.vec2, <2 x i16> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
%concat012 = shufflevector <4 x i16> %concat01, <4 x i16> %concat2u, <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
%interleaved.vec = shufflevector <6 x i16> %concat012, <6 x i16> poison, <6 x i32> <i32 0, i32 2, i32 4, i32 1, i32 3, i32 5>
store <6 x i16> %interleaved.vec, <6 x i16>* %out.vec, align 32
ret void
}
define void @vf4(<4 x i16>* %in.vecptr0, <4 x i16>* %in.vecptr1, <4 x i16>* %in.vecptr2, <12 x i16>* %out.vec) nounwind {
; SSE-LABEL: vf4:
; SSE: # %bb.0:
; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,0,0]
; SSE-NEXT: movdqa {{.*#+}} xmm3 = [65535,65535,0,65535,65535,0,65535,65535]
; SSE-NEXT: pshufhw {{.*#+}} xmm4 = xmm0[0,1,2,3,6,5,4,7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,3,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,1,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,5,5,6,4]
; SSE-NEXT: pand %xmm3, %xmm4
; SSE-NEXT: pandn %xmm2, %xmm3
; SSE-NEXT: por %xmm4, %xmm3
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [65535,0,0,65535,65535,65535,65535,65535]
; SSE-NEXT: pand %xmm2, %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,3,1,3,4,5,6,7]
; SSE-NEXT: pandn %xmm0, %xmm2
; SSE-NEXT: por %xmm1, %xmm2
; SSE-NEXT: movq %xmm2, 16(%rcx)
; SSE-NEXT: movdqa %xmm3, (%rcx)
; SSE-NEXT: retq
;
; AVX1-LABEL: vf4:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,3,1,3,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,1,1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0],xmm2[1,2],xmm3[3],xmm2[4,5,6,7]
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,u,u,2,3,10,11,u,u,4,5,12,13]
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3,4],xmm1[5],xmm0[6,7]
; AVX1-NEXT: vmovdqa %xmm0, (%rcx)
; AVX1-NEXT: vmovq %xmm2, 16(%rcx)
; AVX1-NEXT: retq
;
; AVX2-LABEL: vf4:
; AVX2: # %bb.0:
; AVX2-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm1 = ymm0[0,1,8,9],zero,zero,ymm0[2,3,10,11],zero,zero,ymm0[4,5,12,13,20,21],zero,zero,zero,zero,ymm0[22,23],zero,zero,zero,zero,zero,zero,zero,zero
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[2,3,0,1]
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = zero,zero,zero,zero,ymm0[0,1],zero,zero,zero,zero,ymm0[2,3],zero,zero,zero,zero,zero,zero,ymm0[22,23,30,31],zero,zero,ymm0[u,u,u,u,u,u,u,u]
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vmovq %xmm1, 16(%rcx)
; AVX2-NEXT: vmovdqa %xmm0, (%rcx)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512-LABEL: vf4:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = <0,4,8,1,5,9,2,6,10,3,7,11,u,u,u,u>
; AVX512-NEXT: vpermw %ymm0, %ymm1, %ymm0
; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX512-NEXT: vmovq %xmm1, 16(%rcx)
; AVX512-NEXT: vmovdqa %xmm0, (%rcx)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%in.vec0 = load <4 x i16>, <4 x i16>* %in.vecptr0, align 32
%in.vec1 = load <4 x i16>, <4 x i16>* %in.vecptr1, align 32
%in.vec2 = load <4 x i16>, <4 x i16>* %in.vecptr2, align 32
%concat01 = shufflevector <4 x i16> %in.vec0, <4 x i16> %in.vec1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%concat2u = shufflevector <4 x i16> %in.vec2, <4 x i16> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
%concat012 = shufflevector <8 x i16> %concat01, <8 x i16> %concat2u, <12 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>
%interleaved.vec = shufflevector <12 x i16> %concat012, <12 x i16> poison, <12 x i32> <i32 0, i32 4, i32 8, i32 1, i32 5, i32 9, i32 2, i32 6, i32 10, i32 3, i32 7, i32 11>
store <12 x i16> %interleaved.vec, <12 x i16>* %out.vec, align 32
ret void
}
define void @vf8(<8 x i16>* %in.vecptr0, <8 x i16>* %in.vecptr1, <8 x i16>* %in.vecptr2, <24 x i16>* %out.vec) nounwind {
; SSE-LABEL: vf8:
; SSE: # %bb.0:
; SSE-NEXT: movdqa (%rdi), %xmm3
; SSE-NEXT: movdqa (%rsi), %xmm2
; SSE-NEXT: movdqa (%rdx), %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,0,0]
; SSE-NEXT: movdqa {{.*#+}} xmm0 = [65535,65535,0,65535,65535,0,65535,65535]
; SSE-NEXT: movdqa %xmm0, %xmm5
; SSE-NEXT: pandn %xmm4, %xmm5
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[3,3,3,3]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm3[1,1,2,2]
; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm0, %xmm3
; SSE-NEXT: por %xmm5, %xmm3
; SSE-NEXT: movdqa %xmm0, %xmm5
; SSE-NEXT: pandn %xmm4, %xmm5
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm2[3,3,3,3,4,5,6,7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm0, %xmm2
; SSE-NEXT: por %xmm5, %xmm2
; SSE-NEXT: movdqa {{.*#+}} xmm5 = [65535,0,65535,65535,0,65535,65535,0]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,2,2]
; SSE-NEXT: pand %xmm5, %xmm1
; SSE-NEXT: pandn %xmm6, %xmm5
; SSE-NEXT: por %xmm1, %xmm5
; SSE-NEXT: pand %xmm0, %xmm5
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm4[0,1,2,3,4,4,4,4]
; SSE-NEXT: pandn %xmm1, %xmm0
; SSE-NEXT: por %xmm5, %xmm0
; SSE-NEXT: movdqa %xmm0, 16(%rcx)
; SSE-NEXT: movdqa %xmm2, 32(%rcx)
; SSE-NEXT: movdqa %xmm3, (%rcx)
; SSE-NEXT: retq
;
; AVX1-LABEL: vf8:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %xmm0
; AVX1-NEXT: vmovdqa (%rsi), %xmm1
; AVX1-NEXT: vmovdqa (%rdx), %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,2,2]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm4 = xmm1[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2],xmm3[3,4],xmm4[5],xmm3[6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0],xmm3[1,2],xmm4[3],xmm3[4,5],xmm4[6],xmm3[7]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX1-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[4,5,u,u,10,11,8,9,u,u,14,15,12,13,u,u]
; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[2,2,3,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm5[1],xmm4[2,3],xmm5[4],xmm4[5,6],xmm5[7]
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,2,3,u,u,4,5,6,7,u,u,8,9,10,11]
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,0,0,0]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3,4],xmm1[5],xmm0[6,7]
; AVX1-NEXT: vmovdqa %xmm0, (%rcx)
; AVX1-NEXT: vmovdqa %xmm4, 32(%rcx)
; AVX1-NEXT: vmovdqa %xmm3, 16(%rcx)
; AVX1-NEXT: retq
;
; AVX2-SLOW-LABEL: vf8:
; AVX2-SLOW: # %bb.0:
; AVX2-SLOW-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-SLOW-NEXT: vmovdqa (%rsi), %xmm1
; AVX2-SLOW-NEXT: vmovdqa (%rdx), %xmm2
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm3
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} ymm4 = ymm3[0,1,u,u,6,7,2,3,u,u,8,9,4,5,u,u,16,17,u,u,22,23,18,19,u,u,24,25,20,21,u,u]
; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,3,0,1]
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} ymm3 = ymm3[u,u,0,1,u,u,u,u,2,3,u,u,u,u,4,5,u,u,22,23,u,u,u,u,24,25,u,u,u,u,26,27]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} ymm3 = ymm4[0],ymm3[1],ymm4[2,3],ymm3[4],ymm4[5,6],ymm3[7],ymm4[8],ymm3[9],ymm4[10,11],ymm3[12],ymm4[13,14],ymm3[15]
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm4 = <u,0,0,u,1,1,u,2>
; AVX2-SLOW-NEXT: vpermd %ymm2, %ymm4, %ymm4
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm3, %ymm4, %ymm3
; AVX2-SLOW-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,u,u,10,11,8,9,u,u,14,15,12,13,u,u]
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3],xmm1[4],xmm0[5,6],xmm1[7]
; AVX2-SLOW-NEXT: vmovdqa %xmm0, 32(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm3, (%rcx)
; AVX2-SLOW-NEXT: vzeroupper
; AVX2-SLOW-NEXT: retq
;
; AVX2-FAST-ALL-LABEL: vf8:
; AVX2-FAST-ALL: # %bb.0:
; AVX2-FAST-ALL-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FAST-ALL-NEXT: vmovdqa (%rsi), %xmm1
; AVX2-FAST-ALL-NEXT: vmovdqa (%rdx), %xmm2
; AVX2-FAST-ALL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm3
; AVX2-FAST-ALL-NEXT: vmovdqa {{.*#+}} ymm4 = <u,0,0,u,1,1,u,2>
; AVX2-FAST-ALL-NEXT: vpermd %ymm2, %ymm4, %ymm4
; AVX2-FAST-ALL-NEXT: vmovdqa {{.*#+}} ymm5 = [0,4,1,5,1,5,2,6]
; AVX2-FAST-ALL-NEXT: vpermd %ymm3, %ymm5, %ymm3
; AVX2-FAST-ALL-NEXT: vpshufb {{.*#+}} ymm3 = ymm3[0,1,4,5,u,u,2,3,6,7,u,u,8,9,12,13,u,u,18,19,22,23,u,u,24,25,28,29,u,u,26,27]
; AVX2-FAST-ALL-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-FAST-ALL-NEXT: vpblendvb %ymm5, %ymm3, %ymm4, %ymm3
; AVX2-FAST-ALL-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-FAST-ALL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,u,u,10,11,8,9,u,u,14,15,12,13,u,u]
; AVX2-FAST-ALL-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX2-FAST-ALL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3],xmm1[4],xmm0[5,6],xmm1[7]
; AVX2-FAST-ALL-NEXT: vmovdqa %xmm0, 32(%rcx)
; AVX2-FAST-ALL-NEXT: vmovdqa %ymm3, (%rcx)
; AVX2-FAST-ALL-NEXT: vzeroupper
; AVX2-FAST-ALL-NEXT: retq
;
; AVX2-FAST-PERLANE-LABEL: vf8:
; AVX2-FAST-PERLANE: # %bb.0:
; AVX2-FAST-PERLANE-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FAST-PERLANE-NEXT: vmovdqa (%rsi), %xmm1
; AVX2-FAST-PERLANE-NEXT: vmovdqa (%rdx), %xmm2
; AVX2-FAST-PERLANE-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm3
; AVX2-FAST-PERLANE-NEXT: vpshufb {{.*#+}} ymm4 = ymm3[0,1,u,u,6,7,2,3,u,u,8,9,4,5,u,u,16,17,u,u,22,23,18,19,u,u,24,25,20,21,u,u]
; AVX2-FAST-PERLANE-NEXT: vpermq {{.*#+}} ymm3 = ymm3[2,3,0,1]
; AVX2-FAST-PERLANE-NEXT: vpshufb {{.*#+}} ymm3 = ymm3[u,u,0,1,u,u,u,u,2,3,u,u,u,u,4,5,u,u,22,23,u,u,u,u,24,25,u,u,u,u,26,27]
; AVX2-FAST-PERLANE-NEXT: vpblendw {{.*#+}} ymm3 = ymm4[0],ymm3[1],ymm4[2,3],ymm3[4],ymm4[5,6],ymm3[7],ymm4[8],ymm3[9],ymm4[10,11],ymm3[12],ymm4[13,14],ymm3[15]
; AVX2-FAST-PERLANE-NEXT: vmovdqa {{.*#+}} ymm4 = <u,0,0,u,1,1,u,2>
; AVX2-FAST-PERLANE-NEXT: vpermd %ymm2, %ymm4, %ymm4
; AVX2-FAST-PERLANE-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-FAST-PERLANE-NEXT: vpblendvb %ymm5, %ymm3, %ymm4, %ymm3
; AVX2-FAST-PERLANE-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
; AVX2-FAST-PERLANE-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,u,u,10,11,8,9,u,u,14,15,12,13,u,u]
; AVX2-FAST-PERLANE-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[2,2,3,3]
; AVX2-FAST-PERLANE-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3],xmm1[4],xmm0[5,6],xmm1[7]
; AVX2-FAST-PERLANE-NEXT: vmovdqa %xmm0, 32(%rcx)
; AVX2-FAST-PERLANE-NEXT: vmovdqa %ymm3, (%rcx)
; AVX2-FAST-PERLANE-NEXT: vzeroupper
; AVX2-FAST-PERLANE-NEXT: retq
;
; AVX512-LABEL: vf8:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa (%rdi), %xmm0
; AVX512-NEXT: vmovdqa (%rdx), %xmm1
; AVX512-NEXT: vinserti128 $1, (%rsi), %ymm0, %ymm0
; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm1 = <0,8,16,1,9,17,2,10,18,3,11,19,4,12,20,5,13,21,6,14,22,7,15,23,u,u,u,u,u,u,u,u>
; AVX512-NEXT: vpermw %zmm0, %zmm1, %zmm0
; AVX512-NEXT: vextracti32x4 $2, %zmm0, 32(%rcx)
; AVX512-NEXT: vmovdqa %ymm0, (%rcx)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%in.vec0 = load <8 x i16>, <8 x i16>* %in.vecptr0, align 32
%in.vec1 = load <8 x i16>, <8 x i16>* %in.vecptr1, align 32
%in.vec2 = load <8 x i16>, <8 x i16>* %in.vecptr2, align 32
%concat01 = shufflevector <8 x i16> %in.vec0, <8 x i16> %in.vec1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%concat2u = shufflevector <8 x i16> %in.vec2, <8 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%concat012 = shufflevector <16 x i16> %concat01, <16 x i16> %concat2u, <24 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
%interleaved.vec = shufflevector <24 x i16> %concat012, <24 x i16> poison, <24 x i32> <i32 0, i32 8, i32 16, i32 1, i32 9, i32 17, i32 2, i32 10, i32 18, i32 3, i32 11, i32 19, i32 4, i32 12, i32 20, i32 5, i32 13, i32 21, i32 6, i32 14, i32 22, i32 7, i32 15, i32 23>
store <24 x i16> %interleaved.vec, <24 x i16>* %out.vec, align 32
ret void
}
define void @vf16(<16 x i16>* %in.vecptr0, <16 x i16>* %in.vecptr1, <16 x i16>* %in.vecptr2, <48 x i16>* %out.vec) nounwind {
; SSE-LABEL: vf16:
; SSE: # %bb.0:
; SSE-NEXT: movdqa (%rdi), %xmm4
; SSE-NEXT: movdqa 16(%rdi), %xmm7
; SSE-NEXT: movdqa (%rsi), %xmm3
; SSE-NEXT: movdqa 16(%rsi), %xmm5
; SSE-NEXT: movdqa (%rdx), %xmm9
; SSE-NEXT: movdqa 16(%rdx), %xmm10
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm7[3,3,3,3]
; SSE-NEXT: movdqa {{.*#+}} xmm14 = [65535,65535,0,65535,65535,0,65535,65535]
; SSE-NEXT: movdqa %xmm14, %xmm0
; SSE-NEXT: pandn %xmm2, %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm7[1,1,2,2]
; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1],xmm7[2],xmm5[2],xmm7[3],xmm5[3]
; SSE-NEXT: pshuflw {{.*#+}} xmm11 = xmm5[3,3,3,3,4,5,6,7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm10[4],xmm5[5],xmm10[5],xmm5[6],xmm10[6],xmm5[7],xmm10[7]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm14, %xmm5
; SSE-NEXT: por %xmm0, %xmm5
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm10[0,0,0,0]
; SSE-NEXT: movdqa %xmm14, %xmm0
; SSE-NEXT: pandn %xmm2, %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm14, %xmm2
; SSE-NEXT: por %xmm0, %xmm2
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm4[3,3,3,3]
; SSE-NEXT: movdqa %xmm14, %xmm7
; SSE-NEXT: pandn %xmm0, %xmm7
; SSE-NEXT: pshufd {{.*#+}} xmm12 = xmm4[1,1,2,2]
; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
; SSE-NEXT: pshuflw {{.*#+}} xmm13 = xmm3[3,3,3,3,4,5,6,7]
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm14, %xmm3
; SSE-NEXT: por %xmm7, %xmm3
; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm9[0,0,0,0]
; SSE-NEXT: movdqa %xmm14, %xmm6
; SSE-NEXT: pandn %xmm7, %xmm6
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm14, %xmm4
; SSE-NEXT: por %xmm6, %xmm4
; SSE-NEXT: movdqa {{.*#+}} xmm6 = [65535,0,65535,65535,0,65535,65535,0]
; SSE-NEXT: movdqa %xmm6, %xmm7
; SSE-NEXT: pandn %xmm8, %xmm7
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm10[1,1,2,2]
; SSE-NEXT: pand %xmm6, %xmm0
; SSE-NEXT: por %xmm7, %xmm0
; SSE-NEXT: pand %xmm14, %xmm0
; SSE-NEXT: pshufhw {{.*#+}} xmm7 = xmm11[0,1,2,3,4,4,4,4]
; SSE-NEXT: movdqa %xmm14, %xmm1
; SSE-NEXT: pandn %xmm7, %xmm1
; SSE-NEXT: por %xmm0, %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm9[1,1,2,2]
; SSE-NEXT: pand %xmm6, %xmm0
; SSE-NEXT: pandn %xmm12, %xmm6
; SSE-NEXT: por %xmm0, %xmm6
; SSE-NEXT: pand %xmm14, %xmm6
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm13[0,1,2,3,4,4,4,4]
; SSE-NEXT: pandn %xmm0, %xmm14
; SSE-NEXT: por %xmm6, %xmm14
; SSE-NEXT: movdqa %xmm14, 16(%rcx)
; SSE-NEXT: movdqa %xmm1, 64(%rcx)
; SSE-NEXT: movdqa %xmm4, (%rcx)
; SSE-NEXT: movdqa %xmm3, 32(%rcx)
; SSE-NEXT: movdqa %xmm2, 48(%rcx)
; SSE-NEXT: movdqa %xmm5, 80(%rcx)
; SSE-NEXT: retq
;
; AVX1-LABEL: vf16:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %xmm0
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,2]
; AVX1-NEXT: vmovdqa (%rsi), %xmm3
; AVX1-NEXT: vmovdqa 16(%rsi), %xmm4
; AVX1-NEXT: vpshuflw {{.*#+}} xmm5 = xmm3[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm5[2],xmm2[3,4],xmm5[5],xmm2[6,7]
; AVX1-NEXT: vmovdqa (%rdx), %xmm5
; AVX1-NEXT: vmovdqa 16(%rdx), %xmm6
; AVX1-NEXT: vpshufd {{.*#+}} xmm7 = xmm5[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm8 = xmm7[0],xmm2[1,2],xmm7[3],xmm2[4,5],xmm7[6],xmm2[7]
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm7 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
; AVX1-NEXT: vpshufb {{.*#+}} xmm7 = xmm7[u,u,0,1,2,3,u,u,4,5,6,7,u,u,8,9]
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[0,0,1,1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm9 = xmm2[0],xmm7[1,2],xmm2[3],xmm7[4,5],xmm2[6],xmm7[7]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
; AVX1-NEXT: vpshufb {{.*#+}} xmm7 = xmm7[4,5,6,7,u,u,8,9,10,11,u,u,12,13,14,15]
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[3,3,3,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm10 = xmm7[0,1],xmm2[2],xmm7[3,4],xmm2[5],xmm7[6,7]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm6[4],xmm1[4],xmm6[5],xmm1[5],xmm6[6],xmm1[6],xmm6[7],xmm1[7]
; AVX1-NEXT: vpshufb {{.*#+}} xmm7 = xmm7[u,u,4,5,10,11,u,u,8,9,14,15,u,u,12,13]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm2 = xmm4[0,1,2,3,5,6,7,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,2,2,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm7[1,2],xmm2[3],xmm7[4,5],xmm2[6],xmm7[7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,2,2]
; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm6[0],xmm1[1],xmm6[2,3],xmm1[4],xmm6[5,6],xmm1[7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm4 = xmm4[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2],xmm1[3,4],xmm4[5],xmm1[6,7]
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,2,3,u,u,4,5,6,7,u,u,8,9,10,11]
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm5[0,0,0,0]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm3[2],xmm0[3,4],xmm3[5],xmm0[6,7]
; AVX1-NEXT: vmovdqa %xmm0, (%rcx)
; AVX1-NEXT: vmovdqa %xmm1, 64(%rcx)
; AVX1-NEXT: vmovdqa %xmm2, 80(%rcx)
; AVX1-NEXT: vmovdqa %xmm10, 32(%rcx)
; AVX1-NEXT: vmovdqa %xmm9, 48(%rcx)
; AVX1-NEXT: vmovdqa %xmm8, 16(%rcx)
; AVX1-NEXT: retq
;
; AVX2-SLOW-LABEL: vf16:
; AVX2-SLOW: # %bb.0:
; AVX2-SLOW-NEXT: vmovdqa (%rsi), %ymm0
; AVX2-SLOW-NEXT: vmovdqa (%rdx), %ymm1
; AVX2-SLOW-NEXT: vmovdqa (%rdi), %xmm2
; AVX2-SLOW-NEXT: vmovdqa 16(%rdi), %xmm3
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,2,2]
; AVX2-SLOW-NEXT: vmovdqa (%rsi), %xmm5
; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm6 = xmm5[3,3,3,3,4,5,6,7]
; AVX2-SLOW-NEXT: vpshufhw {{.*#+}} xmm6 = xmm6[0,1,2,3,4,4,4,4]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm6[2],xmm4[3,4],xmm6[5],xmm4[6,7]
; AVX2-SLOW-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} xmm2 = xmm2[0,1,2,3,4,5,4,5,6,7,10,11,8,9,10,11]
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm4, %ymm2, %ymm2
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm4 = <u,0,0,u,1,1,u,2>
; AVX2-SLOW-NEXT: vpermd %ymm1, %ymm4, %ymm4
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm2, %ymm4, %ymm2
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,2,2]
; AVX2-SLOW-NEXT: vmovdqa 16(%rdx), %xmm6
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm7 = xmm6[1,1,2,2]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm4 = xmm7[0],xmm4[1],xmm7[2,3],xmm4[4],xmm7[5,6],xmm4[7]
; AVX2-SLOW-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7]
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} xmm3 = xmm3[8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13]
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm3, %ymm4, %ymm3
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} ymm4 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,26,27,24,25,22,23,28,29,30,31,30,31,30,31,30,31]
; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm4 = ymm4[2,2,2,3]
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm3, %ymm4, %ymm3
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm4 = <2,u,3,3,u,4,4,u>
; AVX2-SLOW-NEXT: vpermd %ymm1, %ymm4, %ymm1
; AVX2-SLOW-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[10,11,0,1,12,13,12,13,2,3,2,3,14,15,4,5,26,27,16,17,28,29,28,29,18,19,18,19,30,31,20,21]
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm4 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255>
; AVX2-SLOW-NEXT: vpblendvb %ymm4, %ymm0, %ymm1, %ymm0
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm1 = <u,3,3,u,4,4,u,5>
; AVX2-SLOW-NEXT: vpermd (%rdi), %ymm1, %ymm1
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm0, %ymm1, %ymm0
; AVX2-SLOW-NEXT: vmovdqa %ymm0, 32(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm3, 64(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm2, (%rcx)
; AVX2-SLOW-NEXT: vzeroupper
; AVX2-SLOW-NEXT: retq
;
; AVX2-FAST-LABEL: vf16:
; AVX2-FAST: # %bb.0:
; AVX2-FAST-NEXT: vmovdqa (%rsi), %ymm0
; AVX2-FAST-NEXT: vmovdqa (%rdx), %ymm1
; AVX2-FAST-NEXT: vmovdqa (%rsi), %xmm2
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm3 = xmm2[u,u,u,u,6,7,u,u,u,u,8,9,u,u,u,u]
; AVX2-FAST-NEXT: vmovdqa (%rdi), %xmm4
; AVX2-FAST-NEXT: vmovdqa 16(%rdi), %xmm5
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[1,1,2,2]
; AVX2-FAST-NEXT: vpblendw {{.*#+}} xmm3 = xmm6[0,1],xmm3[2],xmm6[3,4],xmm3[5],xmm6[6,7]
; AVX2-FAST-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3]
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm2 = xmm2[0,1,2,3,4,5,4,5,6,7,10,11,8,9,10,11]
; AVX2-FAST-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm3 = <u,0,0,u,1,1,u,2>
; AVX2-FAST-NEXT: vpermd %ymm1, %ymm3, %ymm3
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm4 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-FAST-NEXT: vpblendvb %ymm4, %ymm2, %ymm3, %ymm2
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm3 = xmm5[1,1,2,2]
; AVX2-FAST-NEXT: vmovdqa 16(%rdx), %xmm6
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm7 = xmm6[1,1,2,2]
; AVX2-FAST-NEXT: vpblendw {{.*#+}} xmm3 = xmm7[0],xmm3[1],xmm7[2,3],xmm3[4],xmm7[5,6],xmm3[7]
; AVX2-FAST-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm5 = xmm5[8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13]
; AVX2-FAST-NEXT: vinserti128 $1, %xmm5, %ymm3, %ymm3
; AVX2-FAST-NEXT: vpshufb {{.*#+}} ymm5 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,26,27,24,25,22,23,28,29,30,31,30,31,30,31,30,31]
; AVX2-FAST-NEXT: vpermq {{.*#+}} ymm5 = ymm5[2,2,2,3]
; AVX2-FAST-NEXT: vpblendvb %ymm4, %ymm3, %ymm5, %ymm3
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm5 = <2,u,3,3,u,4,4,u>
; AVX2-FAST-NEXT: vpermd %ymm1, %ymm5, %ymm1
; AVX2-FAST-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[10,11,0,1,12,13,12,13,2,3,2,3,14,15,4,5,26,27,16,17,28,29,28,29,18,19,18,19,30,31,20,21]
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm5 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255>
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm0, %ymm1, %ymm0
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm1 = <u,3,3,u,4,4,u,5>
; AVX2-FAST-NEXT: vpermd (%rdi), %ymm1, %ymm1
; AVX2-FAST-NEXT: vpblendvb %ymm4, %ymm0, %ymm1, %ymm0
; AVX2-FAST-NEXT: vmovdqa %ymm0, 32(%rcx)
; AVX2-FAST-NEXT: vmovdqa %ymm3, 64(%rcx)
; AVX2-FAST-NEXT: vmovdqa %ymm2, (%rcx)
; AVX2-FAST-NEXT: vzeroupper
; AVX2-FAST-NEXT: retq
;
; AVX512-LABEL: vf16:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa (%rdi), %ymm0
; AVX512-NEXT: vmovdqa (%rdx), %ymm1
; AVX512-NEXT: vinserti64x4 $1, (%rsi), %zmm0, %zmm0
; AVX512-NEXT: vmovdqa {{.*#+}} ymm2 = [42,11,27,43,12,28,44,13,29,45,14,30,46,15,31,47]
; AVX512-NEXT: vpermi2w %zmm1, %zmm0, %zmm2
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm3 = [0,16,32,1,17,33,2,18,34,3,19,35,4,20,36,5,21,37,6,22,38,7,23,39,8,24,40,9,25,41,10,26]
; AVX512-NEXT: vpermi2w %zmm1, %zmm0, %zmm3
; AVX512-NEXT: vmovdqu64 %zmm3, (%rcx)
; AVX512-NEXT: vmovdqa %ymm2, 64(%rcx)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%in.vec0 = load <16 x i16>, <16 x i16>* %in.vecptr0, align 32
%in.vec1 = load <16 x i16>, <16 x i16>* %in.vecptr1, align 32
%in.vec2 = load <16 x i16>, <16 x i16>* %in.vecptr2, align 32
%concat01 = shufflevector <16 x i16> %in.vec0, <16 x i16> %in.vec1, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
%concat2u = shufflevector <16 x i16> %in.vec2, <16 x i16> poison, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%concat012 = shufflevector <32 x i16> %concat01, <32 x i16> %concat2u, <48 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47>
%interleaved.vec = shufflevector <48 x i16> %concat012, <48 x i16> poison, <48 x i32> <i32 0, i32 16, i32 32, i32 1, i32 17, i32 33, i32 2, i32 18, i32 34, i32 3, i32 19, i32 35, i32 4, i32 20, i32 36, i32 5, i32 21, i32 37, i32 6, i32 22, i32 38, i32 7, i32 23, i32 39, i32 8, i32 24, i32 40, i32 9, i32 25, i32 41, i32 10, i32 26, i32 42, i32 11, i32 27, i32 43, i32 12, i32 28, i32 44, i32 13, i32 29, i32 45, i32 14, i32 30, i32 46, i32 15, i32 31, i32 47>
store <48 x i16> %interleaved.vec, <48 x i16>* %out.vec, align 32
ret void
}
define void @vf32(<32 x i16>* %in.vecptr0, <32 x i16>* %in.vecptr1, <32 x i16>* %in.vecptr2, <96 x i16>* %out.vec) nounwind {
; SSE-LABEL: vf32:
; SSE: # %bb.0:
; SSE-NEXT: movdqa 16(%rdi), %xmm5
; SSE-NEXT: movdqa 32(%rdi), %xmm4
; SSE-NEXT: movdqa 48(%rdi), %xmm15
; SSE-NEXT: movdqa 16(%rsi), %xmm8
; SSE-NEXT: movdqa 32(%rsi), %xmm7
; SSE-NEXT: movdqa %xmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa 48(%rsi), %xmm13
; SSE-NEXT: movdqa 16(%rdx), %xmm6
; SSE-NEXT: movdqa 32(%rdx), %xmm9
; SSE-NEXT: movdqa 48(%rdx), %xmm12
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm15[3,3,3,3]
; SSE-NEXT: movdqa {{.*#+}} xmm0 = [65535,65535,0,65535,65535,0,65535,65535]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pandn %xmm1, %xmm2
; SSE-NEXT: movdqa %xmm15, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm13[0],xmm1[1],xmm13[1],xmm1[2],xmm13[2],xmm1[3],xmm13[3]
; SSE-NEXT: movdqa %xmm13, %xmm3
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm12[4],xmm3[5],xmm12[5],xmm3[6],xmm12[6],xmm3[7],xmm12[7]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm0, %xmm3
; SSE-NEXT: por %xmm2, %xmm3
; SSE-NEXT: movdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm12[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm3
; SSE-NEXT: pandn %xmm2, %xmm3
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: por %xmm3, %xmm1
; SSE-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: movdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm4[3,3,3,3]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pandn %xmm1, %xmm2
; SSE-NEXT: movdqa %xmm4, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
; SSE-NEXT: movdqa %xmm7, %xmm3
; SSE-NEXT: movdqa %xmm9, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm9[4],xmm3[5],xmm9[5],xmm3[6],xmm9[6],xmm3[7],xmm9[7]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm11 = xmm3[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm0, %xmm11
; SSE-NEXT: por %xmm2, %xmm11
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm9[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm3
; SSE-NEXT: pandn %xmm2, %xmm3
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm10 = xmm1[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm0, %xmm10
; SSE-NEXT: por %xmm3, %xmm10
; SSE-NEXT: movdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm5[3,3,3,3]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pandn %xmm1, %xmm2
; SSE-NEXT: movdqa %xmm8, %xmm3
; SSE-NEXT: movdqa %xmm8, %xmm1
; SSE-NEXT: movdqa %xmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm7 = xmm1[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm0, %xmm7
; SSE-NEXT: por %xmm2, %xmm7
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pandn %xmm1, %xmm2
; SSE-NEXT: movdqa %xmm5, %xmm1
; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm6 = xmm1[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm0, %xmm6
; SSE-NEXT: por %xmm2, %xmm6
; SSE-NEXT: movdqa (%rdi), %xmm9
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm9[3,3,3,3]
; SSE-NEXT: movdqa %xmm0, %xmm1
; SSE-NEXT: pandn %xmm2, %xmm1
; SSE-NEXT: movdqa (%rsi), %xmm14
; SSE-NEXT: movdqa (%rdx), %xmm8
; SSE-NEXT: movdqa %xmm14, %xmm2
; SSE-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,1,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[2,3,2,0,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm5 = xmm2[0,1,2,3,5,5,6,7]
; SSE-NEXT: pand %xmm0, %xmm5
; SSE-NEXT: por %xmm1, %xmm5
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm8[0,0,0,0]
; SSE-NEXT: movdqa %xmm0, %xmm1
; SSE-NEXT: pandn %xmm2, %xmm1
; SSE-NEXT: movdqa %xmm9, %xmm2
; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm14[0],xmm2[1],xmm14[1],xmm2[2],xmm14[2],xmm2[3],xmm14[3]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,1,2,1]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,2,2,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm4 = xmm2[0,1,2,3,7,5,4,5]
; SSE-NEXT: pand %xmm0, %xmm4
; SSE-NEXT: por %xmm1, %xmm4
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm15[1,1,2,2]
; SSE-NEXT: movdqa {{.*#+}} xmm15 = [65535,0,65535,65535,0,65535,65535,0]
; SSE-NEXT: movdqa %xmm15, %xmm1
; SSE-NEXT: pandn %xmm2, %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm12[1,1,2,2]
; SSE-NEXT: pand %xmm15, %xmm2
; SSE-NEXT: por %xmm1, %xmm2
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm13[3,3,3,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,4,4,4]
; SSE-NEXT: movdqa %xmm0, %xmm12
; SSE-NEXT: pandn %xmm1, %xmm12
; SSE-NEXT: pand %xmm0, %xmm2
; SSE-NEXT: por %xmm2, %xmm12
; SSE-NEXT: pshufd $165, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; SSE-NEXT: # xmm1 = mem[1,1,2,2]
; SSE-NEXT: movdqa %xmm15, %xmm2
; SSE-NEXT: pandn %xmm1, %xmm2
; SSE-NEXT: pshufd $165, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; SSE-NEXT: # xmm1 = mem[1,1,2,2]
; SSE-NEXT: pand %xmm15, %xmm1
; SSE-NEXT: por %xmm2, %xmm1
; SSE-NEXT: pshuflw $255, {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Folded Reload
; SSE-NEXT: # xmm2 = mem[3,3,3,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,4,4,4]
; SSE-NEXT: movdqa %xmm0, %xmm13
; SSE-NEXT: pandn %xmm2, %xmm13
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: por %xmm1, %xmm13
; SSE-NEXT: pshufd $165, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; SSE-NEXT: # xmm1 = mem[1,1,2,2]
; SSE-NEXT: movdqa %xmm15, %xmm2
; SSE-NEXT: pandn %xmm1, %xmm2
; SSE-NEXT: pshufd $165, {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
; SSE-NEXT: # xmm1 = mem[1,1,2,2]
; SSE-NEXT: pand %xmm15, %xmm1
; SSE-NEXT: por %xmm2, %xmm1
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm3[3,3,3,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm2[0,1,2,3,4,4,4,4]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pandn %xmm3, %xmm2
; SSE-NEXT: pand %xmm0, %xmm1
; SSE-NEXT: por %xmm1, %xmm2
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm9[1,1,2,2]
; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm8[1,1,2,2]
; SSE-NEXT: pand %xmm15, %xmm3
; SSE-NEXT: pandn %xmm1, %xmm15
; SSE-NEXT: por %xmm3, %xmm15
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm14[3,3,3,3,4,5,6,7]
; SSE-NEXT: pand %xmm0, %xmm15
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,4,4,4]
; SSE-NEXT: pandn %xmm1, %xmm0
; SSE-NEXT: por %xmm15, %xmm0
; SSE-NEXT: movdqa %xmm0, 16(%rcx)
; SSE-NEXT: movdqa %xmm2, 64(%rcx)
; SSE-NEXT: movdqa %xmm13, 112(%rcx)
; SSE-NEXT: movdqa %xmm12, 160(%rcx)
; SSE-NEXT: movdqa %xmm4, (%rcx)
; SSE-NEXT: movdqa %xmm5, 32(%rcx)
; SSE-NEXT: movdqa %xmm6, 48(%rcx)
; SSE-NEXT: movdqa %xmm7, 80(%rcx)
; SSE-NEXT: movdqa %xmm10, 96(%rcx)
; SSE-NEXT: movdqa %xmm11, 128(%rcx)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 144(%rcx)
; SSE-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; SSE-NEXT: movaps %xmm0, 176(%rcx)
; SSE-NEXT: retq
;
; AVX1-LABEL: vf32:
; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %xmm13
; AVX1-NEXT: vmovdqa 32(%rdi), %xmm7
; AVX1-NEXT: vmovdqa 48(%rdi), %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm7[1,1,2,2]
; AVX1-NEXT: vmovdqa (%rsi), %xmm14
; AVX1-NEXT: vmovdqa 32(%rsi), %xmm3
; AVX1-NEXT: vmovdqa 48(%rsi), %xmm6
; AVX1-NEXT: vpshuflw {{.*#+}} xmm5 = xmm3[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm5 = xmm5[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0,1],xmm5[2],xmm4[3,4],xmm5[5],xmm4[6,7]
; AVX1-NEXT: vmovdqa (%rdx), %xmm15
; AVX1-NEXT: vmovdqa 32(%rdx), %xmm5
; AVX1-NEXT: vmovdqa 48(%rdx), %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm5[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm0[1,2],xmm4[3],xmm0[4,5],xmm4[6],xmm0[7]
; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm13[1,1,2,2]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm4 = xmm14[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm4[2],xmm0[3,4],xmm4[5],xmm0[6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm15[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm0[1,2],xmm4[3],xmm0[4,5],xmm4[6],xmm0[7]
; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm4 = xmm6[0,1,2,3,5,6,7,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,2,2,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm0[1,2],xmm4[3],xmm0[4,5],xmm4[6],xmm0[7]
; AVX1-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm1[1,1,2,2]
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0],xmm0[1],xmm4[2,3],xmm0[4],xmm4[5,6],xmm0[7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm4 = xmm6[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm12 = xmm0[0,1],xmm4[2],xmm0[3,4],xmm4[5],xmm0[6,7]
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm6[0],xmm2[0],xmm6[1],xmm2[1],xmm6[2],xmm2[2],xmm6[3],xmm2[3]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,0,1,2,3,6,7,4,5,6,7,4,5,8,9]
; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm11 = xmm1[0],xmm0[1,2],xmm1[3],xmm0[4,5],xmm1[6],xmm0[7]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm0 = xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [4,5,6,7,4,5,8,9,10,11,10,11,12,13,14,15]
; AVX1-NEXT: vpshufb %xmm4, %xmm0, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm7[3,3,3,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm6 = xmm0[0,1],xmm6[2],xmm0[3,4],xmm6[5],xmm0[6,7]
; AVX1-NEXT: vmovdqa 16(%rsi), %xmm0
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm3 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm10 = [0,1,2,3,4,5,4,5,6,7,10,11,8,9,10,11]
; AVX1-NEXT: vpshufb %xmm10, %xmm3, %xmm3
; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[0,0,0,0]
; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm5[2],xmm3[3,4],xmm5[5],xmm3[6,7]
; AVX1-NEXT: vmovdqa 16(%rdx), %xmm5
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm8 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3]
; AVX1-NEXT: vpshufb %xmm2, %xmm8, %xmm8
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm9 = xmm2[0,0,1,1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm8 = xmm9[0],xmm8[1,2],xmm9[3],xmm8[4,5],xmm9[6],xmm8[7]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm14[4],xmm15[4],xmm14[5],xmm15[5],xmm14[6],xmm15[6],xmm14[7],xmm15[7]
; AVX1-NEXT: vpshufb %xmm4, %xmm1, %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm13[3,3,3,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm4[2],xmm1[3,4],xmm4[5],xmm1[6,7]
; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
; AVX1-NEXT: vpshufb {{.*#+}} xmm4 = xmm4[8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm7 = xmm0[0,1,2,3,5,6,7,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm7 = xmm7[2,2,2,3]
; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm7[0],xmm4[1,2],xmm7[3],xmm4[4,5],xmm7[6],xmm4[7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,2,2]
; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[1,1,2,2]
; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm5[0],xmm2[1],xmm5[2,3],xmm2[4],xmm5[5,6],xmm2[7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[3,3,3,3,4,5,6,7]
; AVX1-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1],xmm0[2],xmm2[3,4],xmm0[5],xmm2[6,7]
; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm2 = xmm13[0],xmm14[0],xmm13[1],xmm14[1],xmm13[2],xmm14[2],xmm13[3],xmm14[3]
; AVX1-NEXT: vpshufb %xmm10, %xmm2, %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm15[0,0,0,0]
; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm5[2],xmm2[3,4],xmm5[5],xmm2[6,7]
; AVX1-NEXT: vmovdqa %xmm2, (%rcx)
; AVX1-NEXT: vmovdqa %xmm0, 64(%rcx)
; AVX1-NEXT: vmovdqa %xmm4, 80(%rcx)
; AVX1-NEXT: vmovdqa %xmm1, 32(%rcx)
; AVX1-NEXT: vmovdqa %xmm8, 48(%rcx)
; AVX1-NEXT: vmovdqa %xmm3, 96(%rcx)
; AVX1-NEXT: vmovdqa %xmm6, 128(%rcx)
; AVX1-NEXT: vmovdqa %xmm11, 144(%rcx)
; AVX1-NEXT: vmovdqa %xmm12, 160(%rcx)
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX1-NEXT: vmovaps %xmm0, 176(%rcx)
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX1-NEXT: vmovaps %xmm0, 16(%rcx)
; AVX1-NEXT: vmovaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
; AVX1-NEXT: vmovaps %xmm0, 112(%rcx)
; AVX1-NEXT: retq
;
; AVX2-SLOW-LABEL: vf32:
; AVX2-SLOW: # %bb.0:
; AVX2-SLOW-NEXT: vmovdqa (%rsi), %ymm9
; AVX2-SLOW-NEXT: vmovdqa 32(%rsi), %ymm3
; AVX2-SLOW-NEXT: vmovdqa 32(%rdx), %ymm11
; AVX2-SLOW-NEXT: vmovdqa (%rdx), %ymm10
; AVX2-SLOW-NEXT: vmovdqa (%rdi), %xmm5
; AVX2-SLOW-NEXT: vmovdqa 16(%rdi), %xmm6
; AVX2-SLOW-NEXT: vmovdqa 32(%rdi), %xmm4
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm7 = xmm5[1,1,2,2]
; AVX2-SLOW-NEXT: vmovdqa (%rsi), %xmm0
; AVX2-SLOW-NEXT: vmovdqa 32(%rsi), %xmm1
; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm2 = xmm0[3,3,3,3,4,5,6,7]
; AVX2-SLOW-NEXT: vpshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,4,4,4]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm2 = xmm7[0,1],xmm2[2],xmm7[3,4],xmm2[5],xmm7[6,7]
; AVX2-SLOW-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm5[0],xmm0[0],xmm5[1],xmm0[1],xmm5[2],xmm0[2],xmm5[3],xmm0[3]
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} xmm12 = [0,1,2,3,4,5,4,5,6,7,10,11,8,9,10,11]
; AVX2-SLOW-NEXT: vpshufb %xmm12, %xmm0, %xmm0
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm13 = <u,0,0,u,1,1,u,2>
; AVX2-SLOW-NEXT: vpermd %ymm10, %ymm13, %ymm7
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm0, %ymm7, %ymm8
; AVX2-SLOW-NEXT: vmovdqa 48(%rdi), %xmm0
; AVX2-SLOW-NEXT: vmovdqa 48(%rdx), %xmm7
; AVX2-SLOW-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm0[4],xmm7[5],xmm0[5],xmm7[6],xmm0[6],xmm7[7],xmm0[7]
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} xmm14 = [8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13]
; AVX2-SLOW-NEXT: vpshufb %xmm14, %xmm2, %xmm2
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm7 = xmm7[1,1,2,2]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm0 = xmm7[0],xmm0[1],xmm7[2,3],xmm0[4],xmm7[5,6],xmm0[7]
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm2 = <u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,26,27,24,25,22,23,28,29,30,31,30,31,30,31,30,31>
; AVX2-SLOW-NEXT: vpshufb %ymm2, %ymm3, %ymm7
; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,2,2,3]
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm0, %ymm7, %ymm15
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = xmm4[1,1,2,2]
; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm7 = xmm1[3,3,3,3,4,5,6,7]
; AVX2-SLOW-NEXT: vpshufhw {{.*#+}} xmm7 = xmm7[0,1,2,3,4,4,4,4]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm7[2],xmm0[3,4],xmm7[5],xmm0[6,7]
; AVX2-SLOW-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
; AVX2-SLOW-NEXT: vpshufb %xmm12, %xmm1, %xmm1
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
; AVX2-SLOW-NEXT: vpermd %ymm11, %ymm13, %ymm1
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm0, %ymm1, %ymm0
; AVX2-SLOW-NEXT: vmovdqa 16(%rdx), %xmm1
; AVX2-SLOW-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
; AVX2-SLOW-NEXT: vpshufb %xmm14, %xmm4, %xmm4
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[1,1,2,2]
; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,2,2]
; AVX2-SLOW-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm6[1],xmm1[2,3],xmm6[4],xmm1[5,6],xmm6[7]
; AVX2-SLOW-NEXT: vinserti128 $1, %xmm4, %ymm1, %ymm1
; AVX2-SLOW-NEXT: vpshufb %ymm2, %ymm9, %ymm2
; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,2,2,3]
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm1, %ymm2, %ymm1
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm2 = [10,11,0,1,12,13,12,13,2,3,2,3,14,15,4,5,26,27,16,17,28,29,28,29,18,19,18,19,30,31,20,21]
; AVX2-SLOW-NEXT: vpshufb %ymm2, %ymm3, %ymm3
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm4 = <2,u,3,3,u,4,4,u>
; AVX2-SLOW-NEXT: vpermd %ymm11, %ymm4, %ymm6
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm7 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255>
; AVX2-SLOW-NEXT: vpblendvb %ymm7, %ymm3, %ymm6, %ymm3
; AVX2-SLOW-NEXT: vmovdqa {{.*#+}} ymm6 = <u,3,3,u,4,4,u,5>
; AVX2-SLOW-NEXT: vpermd 32(%rdi), %ymm6, %ymm11
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm3, %ymm11, %ymm3
; AVX2-SLOW-NEXT: vpshufb %ymm2, %ymm9, %ymm2
; AVX2-SLOW-NEXT: vpermd %ymm10, %ymm4, %ymm4
; AVX2-SLOW-NEXT: vpblendvb %ymm7, %ymm2, %ymm4, %ymm2
; AVX2-SLOW-NEXT: vpermd (%rdi), %ymm6, %ymm4
; AVX2-SLOW-NEXT: vpblendvb %ymm5, %ymm2, %ymm4, %ymm2
; AVX2-SLOW-NEXT: vmovdqa %ymm2, 32(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm3, 128(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm1, 64(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm0, 96(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm15, 160(%rcx)
; AVX2-SLOW-NEXT: vmovdqa %ymm8, (%rcx)
; AVX2-SLOW-NEXT: vzeroupper
; AVX2-SLOW-NEXT: retq
;
; AVX2-FAST-LABEL: vf32:
; AVX2-FAST: # %bb.0:
; AVX2-FAST-NEXT: vmovdqa (%rsi), %ymm10
; AVX2-FAST-NEXT: vmovdqa 32(%rsi), %ymm3
; AVX2-FAST-NEXT: vmovdqa 32(%rdx), %ymm12
; AVX2-FAST-NEXT: vmovdqa (%rdx), %ymm11
; AVX2-FAST-NEXT: vmovdqa (%rsi), %xmm5
; AVX2-FAST-NEXT: vmovdqa 32(%rsi), %xmm4
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} xmm9 = <u,u,u,u,6,7,u,u,u,u,8,9,u,u,u,u>
; AVX2-FAST-NEXT: vpshufb %xmm9, %xmm5, %xmm7
; AVX2-FAST-NEXT: vmovdqa (%rdi), %xmm0
; AVX2-FAST-NEXT: vmovdqa 16(%rdi), %xmm6
; AVX2-FAST-NEXT: vmovdqa 32(%rdi), %xmm1
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,2]
; AVX2-FAST-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm7[2],xmm2[3,4],xmm7[5],xmm2[6,7]
; AVX2-FAST-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3]
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} xmm13 = [0,1,2,3,4,5,4,5,6,7,10,11,8,9,10,11]
; AVX2-FAST-NEXT: vpshufb %xmm13, %xmm0, %xmm0
; AVX2-FAST-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm14 = <u,0,0,u,1,1,u,2>
; AVX2-FAST-NEXT: vpermd %ymm11, %ymm14, %ymm7
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255,255,255,0,0,255,255]
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm0, %ymm7, %ymm0
; AVX2-FAST-NEXT: vmovdqu %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
; AVX2-FAST-NEXT: vmovdqa 48(%rdi), %xmm0
; AVX2-FAST-NEXT: vmovdqa 48(%rdx), %xmm7
; AVX2-FAST-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm7[4],xmm0[4],xmm7[5],xmm0[5],xmm7[6],xmm0[6],xmm7[7],xmm0[7]
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} xmm15 = [8,9,4,5,10,11,6,7,8,9,14,15,12,13,12,13]
; AVX2-FAST-NEXT: vpshufb %xmm15, %xmm2, %xmm2
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,2]
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm7 = xmm7[1,1,2,2]
; AVX2-FAST-NEXT: vpblendw {{.*#+}} xmm0 = xmm7[0],xmm0[1],xmm7[2,3],xmm0[4],xmm7[5,6],xmm0[7]
; AVX2-FAST-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm2 = <u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,26,27,24,25,22,23,28,29,30,31,30,31,30,31,30,31>
; AVX2-FAST-NEXT: vpshufb %ymm2, %ymm3, %ymm7
; AVX2-FAST-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,2,2,3]
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm0, %ymm7, %ymm8
; AVX2-FAST-NEXT: vpshufb %xmm9, %xmm4, %xmm0
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm7 = xmm1[1,1,2,2]
; AVX2-FAST-NEXT: vpblendw {{.*#+}} xmm0 = xmm7[0,1],xmm0[2],xmm7[3,4],xmm0[5],xmm7[6,7]
; AVX2-FAST-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3]
; AVX2-FAST-NEXT: vpshufb %xmm13, %xmm1, %xmm1
; AVX2-FAST-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
; AVX2-FAST-NEXT: vpermd %ymm12, %ymm14, %ymm1
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm0, %ymm1, %ymm0
; AVX2-FAST-NEXT: vmovdqa 16(%rdx), %xmm1
; AVX2-FAST-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
; AVX2-FAST-NEXT: vpshufb %xmm15, %xmm4, %xmm4
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[1,1,2,2]
; AVX2-FAST-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,2,2]
; AVX2-FAST-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm6[1],xmm1[2,3],xmm6[4],xmm1[5,6],xmm6[7]
; AVX2-FAST-NEXT: vinserti128 $1, %xmm4, %ymm1, %ymm1
; AVX2-FAST-NEXT: vpshufb %ymm2, %ymm10, %ymm2
; AVX2-FAST-NEXT: vpermq {{.*#+}} ymm2 = ymm2[2,2,2,3]
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm1, %ymm2, %ymm1
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm2 = [10,11,0,1,12,13,12,13,2,3,2,3,14,15,4,5,26,27,16,17,28,29,28,29,18,19,18,19,30,31,20,21]
; AVX2-FAST-NEXT: vpshufb %ymm2, %ymm3, %ymm3
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm4 = <2,u,3,3,u,4,4,u>
; AVX2-FAST-NEXT: vpermd %ymm12, %ymm4, %ymm6
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm7 = <255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255,0,0,u,u,255,255>
; AVX2-FAST-NEXT: vpblendvb %ymm7, %ymm3, %ymm6, %ymm3
; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm6 = <u,3,3,u,4,4,u,5>
; AVX2-FAST-NEXT: vpermd 32(%rdi), %ymm6, %ymm9
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm3, %ymm9, %ymm3
; AVX2-FAST-NEXT: vpshufb %ymm2, %ymm10, %ymm2
; AVX2-FAST-NEXT: vpermd %ymm11, %ymm4, %ymm4
; AVX2-FAST-NEXT: vpblendvb %ymm7, %ymm2, %ymm4, %ymm2
; AVX2-FAST-NEXT: vpermd (%rdi), %ymm6, %ymm4
; AVX2-FAST-NEXT: vpblendvb %ymm5, %ymm2, %ymm4, %ymm2
; AVX2-FAST-NEXT: vmovdqa %ymm2, 32(%rcx)
; AVX2-FAST-NEXT: vmovdqa %ymm3, 128(%rcx)
; AVX2-FAST-NEXT: vmovdqa %ymm1, 64(%rcx)
; AVX2-FAST-NEXT: vmovdqa %ymm0, 96(%rcx)
; AVX2-FAST-NEXT: vmovdqa %ymm8, 160(%rcx)
; AVX2-FAST-NEXT: vmovups {{[-0-9]+}}(%r{{[sb]}}p), %ymm0 # 32-byte Reload
; AVX2-FAST-NEXT: vmovaps %ymm0, (%rcx)
; AVX2-FAST-NEXT: vzeroupper
; AVX2-FAST-NEXT: retq
;
; AVX512-LABEL: vf32:
; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqu64 (%rdi), %zmm0
; AVX512-NEXT: vmovdqu64 (%rsi), %zmm1
; AVX512-NEXT: vmovdqu64 (%rdx), %zmm2
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm3 = <0,32,u,1,33,u,2,34,u,3,35,u,4,36,u,5,37,u,6,38,u,7,39,u,8,40,u,9,41,u,10,42>
; AVX512-NEXT: vpermi2w %zmm1, %zmm0, %zmm3
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm4 = [0,1,32,3,4,33,6,7,34,9,10,35,12,13,36,15,16,37,18,19,38,21,22,39,24,25,40,27,28,41,30,31]
; AVX512-NEXT: vpermi2w %zmm2, %zmm3, %zmm4
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm3 = <10,43,u,11,44,u,12,45,u,13,46,u,14,47,u,15,48,u,16,49,u,17,50,u,18,51,u,19,52,u,20,53>
; AVX512-NEXT: vpermi2w %zmm0, %zmm2, %zmm3
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm5 = [0,1,43,3,4,44,6,7,45,9,10,46,12,13,47,15,16,48,18,19,49,21,22,50,24,25,51,27,28,52,30,31]
; AVX512-NEXT: vpermi2w %zmm1, %zmm3, %zmm5
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm3 = <21,53,u,22,54,u,23,55,u,24,56,u,25,57,u,26,58,u,27,59,u,28,60,u,29,61,u,30,62,u,31,63>
; AVX512-NEXT: vpermi2w %zmm2, %zmm1, %zmm3
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm1 = [0,1,54,3,4,55,6,7,56,9,10,57,12,13,58,15,16,59,18,19,60,21,22,61,24,25,62,27,28,63,30,31]
; AVX512-NEXT: vpermi2w %zmm0, %zmm3, %zmm1
; AVX512-NEXT: vmovdqu64 %zmm1, 128(%rcx)
; AVX512-NEXT: vmovdqu64 %zmm5, 64(%rcx)
; AVX512-NEXT: vmovdqu64 %zmm4, (%rcx)
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
%in.vec0 = load <32 x i16>, <32 x i16>* %in.vecptr0, align 32
%in.vec1 = load <32 x i16>, <32 x i16>* %in.vecptr1, align 32
%in.vec2 = load <32 x i16>, <32 x i16>* %in.vecptr2, align 32
%concat01 = shufflevector <32 x i16> %in.vec0, <32 x i16> %in.vec1, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>
%concat2u = shufflevector <32 x i16> %in.vec2, <32 x i16> poison, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%concat012 = shufflevector <64 x i16> %concat01, <64 x i16> %concat2u, <96 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63, i32 64, i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72, i32 73, i32 74, i32 75, i32 76, i32 77, i32 78, i32 79, i32 80, i32 81, i32 82, i32 83, i32 84, i32 85, i32 86, i32 87, i32 88, i32 89, i32 90, i32 91, i32 92, i32 93, i32 94, i32 95>
%interleaved.vec = shufflevector <96 x i16> %concat012, <96 x i16> poison, <96 x i32> <i32 0, i32 32, i32 64, i32 1, i32 33, i32 65, i32 2, i32 34, i32 66, i32 3, i32 35, i32 67, i32 4, i32 36, i32 68, i32 5, i32 37, i32 69, i32 6, i32 38, i32 70, i32 7, i32 39, i32 71, i32 8, i32 40, i32 72, i32 9, i32 41, i32 73, i32 10, i32 42, i32 74, i32 11, i32 43, i32 75, i32 12, i32 44, i32 76, i32 13, i32 45, i32 77, i32 14, i32 46, i32 78, i32 15, i32 47, i32 79, i32 16, i32 48, i32 80, i32 17, i32 49, i32 81, i32 18, i32 50, i32 82, i32 19, i32 51, i32 83, i32 20, i32 52, i32 84, i32 21, i32 53, i32 85, i32 22, i32 54, i32 86, i32 23, i32 55, i32 87, i32 24, i32 56, i32 88, i32 25, i32 57, i32 89, i32 26, i32 58, i32 90, i32 27, i32 59, i32 91, i32 28, i32 60, i32 92, i32 29, i32 61, i32 93, i32 30, i32 62, i32 94, i32 31, i32 63, i32 95>
store <96 x i16> %interleaved.vec, <96 x i16>* %out.vec, align 32
ret void
}