| # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py |
| # RUN: llc -mtriple aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s |
| # |
| # Test selecting G_REV instructions. |
| # |
| # Each test is named like: |
| # |
| # (G_REV_VERSION)_(INSTRUCTION_PRODUCED) |
| # |
| # Each of these patterns come from AArch64GenGlobalISel.inc. |
| # |
| |
| ... |
| --- |
| name: rev64_REV64v2i32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $d0 |
| ; CHECK-LABEL: name: rev64_REV64v2i32 |
| ; CHECK: liveins: $d0 |
| ; CHECK: %copy:fpr64 = COPY $d0 |
| ; CHECK: %rev:fpr64 = REV64v2i32 %copy |
| ; CHECK: $d0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %copy:fpr(<2 x s32>) = COPY $d0 |
| %rev:fpr(<2 x s32>) = G_REV64 %copy |
| $d0 = COPY %rev(<2 x s32>) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: rev64_REV64v4i16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $d0 |
| ; CHECK-LABEL: name: rev64_REV64v4i16 |
| ; CHECK: liveins: $d0 |
| ; CHECK: %copy:fpr64 = COPY $d0 |
| ; CHECK: %rev:fpr64 = REV64v4i16 %copy |
| ; CHECK: $d0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %copy:fpr(<4 x s16>) = COPY $d0 |
| %rev:fpr(<4 x s16>) = G_REV64 %copy |
| $d0 = COPY %rev(<4 x s16>) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: rev64_REV64v4i32 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev64_REV64v4i32 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr128 = COPY $q0 |
| ; CHECK: %rev:fpr128 = REV64v4i32 %copy |
| ; CHECK: $q0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %copy:fpr(<4 x s32>) = COPY $q0 |
| %rev:fpr(<4 x s32>) = G_REV64 %copy |
| $q0 = COPY %rev(<4 x s32>) |
| RET_ReallyLR implicit $q0 |
| |
| ... |
| --- |
| name: rev64_REV64v8i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev64_REV64v8i8 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr64 = COPY $d0 |
| ; CHECK: %rev:fpr64 = REV64v8i8 %copy |
| ; CHECK: $d0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %copy:fpr(<8 x s8>) = COPY $d0 |
| %rev:fpr(<8 x s8>) = G_REV64 %copy |
| $d0 = COPY %rev(<8 x s8>) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: rev64_REV64v8i16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev64_REV64v8i16 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr128 = COPY $q0 |
| ; CHECK: %rev:fpr128 = REV64v8i16 %copy |
| ; CHECK: $q0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %copy:fpr(<8 x s16>) = COPY $q0 |
| %rev:fpr(<8 x s16>) = G_REV64 %copy |
| $q0 = COPY %rev(<8 x s16>) |
| RET_ReallyLR implicit $q0 |
| |
| ... |
| --- |
| name: rev64_REV64v16i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev64_REV64v16i8 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr128 = COPY $q0 |
| ; CHECK: %rev:fpr128 = REV64v16i8 %copy |
| ; CHECK: $q0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %copy:fpr(<16 x s8>) = COPY $q0 |
| %rev:fpr(<16 x s8>) = G_REV64 %copy |
| $q0 = COPY %rev(<16 x s8>) |
| RET_ReallyLR implicit $q0 |
| |
| ... |
| --- |
| name: rev32_REV32v4i16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $d0 |
| ; CHECK-LABEL: name: rev32_REV32v4i16 |
| ; CHECK: liveins: $d0 |
| ; CHECK: %copy:fpr64 = COPY $d0 |
| ; CHECK: %rev:fpr64 = REV32v4i16 %copy |
| ; CHECK: $d0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %copy:fpr(<4 x s16>) = COPY $d0 |
| %rev:fpr(<4 x s16>) = G_REV32 %copy |
| $d0 = COPY %rev(<4 x s16>) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: rev32_REV32v8i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $d0 |
| ; CHECK-LABEL: name: rev32_REV32v8i8 |
| ; CHECK: liveins: $d0 |
| ; CHECK: %copy:fpr64 = COPY $d0 |
| ; CHECK: %rev:fpr64 = REV32v8i8 %copy |
| ; CHECK: $d0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %copy:fpr(<8 x s8>) = COPY $d0 |
| %rev:fpr(<8 x s8>) = G_REV32 %copy |
| $d0 = COPY %rev(<8 x s8>) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: rev32_REV32v8i16 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev32_REV32v8i16 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr128 = COPY $q0 |
| ; CHECK: %rev:fpr128 = REV32v8i16 %copy |
| ; CHECK: $q0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %copy:fpr(<8 x s16>) = COPY $q0 |
| %rev:fpr(<8 x s16>) = G_REV32 %copy |
| $q0 = COPY %rev(<8 x s16>) |
| RET_ReallyLR implicit $q0 |
| |
| ... |
| --- |
| name: rev32_REV32v16i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev32_REV32v16i8 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr128 = COPY $q0 |
| ; CHECK: %rev:fpr128 = REV32v16i8 %copy |
| ; CHECK: $q0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %copy:fpr(<16 x s8>) = COPY $q0 |
| %rev:fpr(<16 x s8>) = G_REV32 %copy |
| $q0 = COPY %rev(<16 x s8>) |
| RET_ReallyLR implicit $q0 |
| |
| ... |
| --- |
| name: rev16_REV16v8i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev16_REV16v8i8 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr64 = COPY $d0 |
| ; CHECK: %rev:fpr64 = REV16v8i8 %copy |
| ; CHECK: $d0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $d0 |
| %copy:fpr(<8 x s8>) = COPY $d0 |
| %rev:fpr(<8 x s8>) = G_REV16 %copy |
| $d0 = COPY %rev(<8 x s8>) |
| RET_ReallyLR implicit $d0 |
| |
| ... |
| --- |
| name: rev16_REV16v16i8 |
| alignment: 4 |
| legalized: true |
| regBankSelected: true |
| tracksRegLiveness: true |
| body: | |
| bb.0.entry: |
| liveins: $q0 |
| ; CHECK-LABEL: name: rev16_REV16v16i8 |
| ; CHECK: liveins: $q0 |
| ; CHECK: %copy:fpr128 = COPY $q0 |
| ; CHECK: %rev:fpr128 = REV16v16i8 %copy |
| ; CHECK: $q0 = COPY %rev |
| ; CHECK: RET_ReallyLR implicit $q0 |
| %copy:fpr(<16 x s8>) = COPY $q0 |
| %rev:fpr(<16 x s8>) = G_REV16 %copy |
| $q0 = COPY %rev(<16 x s8>) |
| RET_ReallyLR implicit $q0 |