llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll.nogenerated.expected

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-machine-outliner -mtriple=s390x-unknown-linux < %s | FileCheck %s
;
; NOTE: Machine outliner doesn't run.
@x = dso_local global i32 0, align 4

define dso_local i32 @check_boundaries() #0 {
; CHECK-LABEL: check_boundaries:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r11, %r15, 88(%r15)
; CHECK-NEXT:    .cfi_offset %r11, -72
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -184
; CHECK-NEXT:    .cfi_def_cfa_offset 344
; CHECK-NEXT:    lgr %r11, %r15
; CHECK-NEXT:    .cfi_def_cfa_register %r11
; CHECK-NEXT:    mvhi 180(%r11), 0
; CHECK-NEXT:    lhi %r0, 0
; CHECK-NEXT:    mvhi 176(%r11), 0
; CHECK-NEXT:    cije %r0, 0, .LBB0_3
; CHECK-NEXT:  # %bb.1:
; CHECK-NEXT:    mvhi 168(%r11), 1
; CHECK-NEXT:    chsi 176(%r11), 0
; CHECK-NEXT:    je .LBB0_4
; CHECK-NEXT:  .LBB0_2:
; CHECK-NEXT:    mvhi 168(%r11), 1
; CHECK-NEXT:    j .LBB0_5
; CHECK-NEXT:  .LBB0_3:
; CHECK-NEXT:    mvhi 176(%r11), 1
; CHECK-NEXT:    mvhi 172(%r11), 2
; CHECK-NEXT:    mvhi 168(%r11), 3
; CHECK-NEXT:    mvhi 164(%r11), 4
; CHECK-NEXT:    chsi 176(%r11), 0
; CHECK-NEXT:    jlh .LBB0_2
; CHECK-NEXT:  .LBB0_4:
; CHECK-NEXT:    mvhi 176(%r11), 1
; CHECK-NEXT:    mvhi 172(%r11), 2
; CHECK-NEXT:    mvhi 168(%r11), 3
; CHECK-NEXT:    mvhi 164(%r11), 4
; CHECK-NEXT:  .LBB0_5:
; CHECK-NEXT:    lhi %r2, 0
; CHECK-NEXT:    lmg %r11, %r15, 272(%r11)
; CHECK-NEXT:    br %r14
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 0, i32* %1, align 4
  store i32 0, i32* %2, align 4
  %6 = load i32, i32* %2, align 4
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %9, label %8

  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  br label %10

  store i32 1, i32* %4, align 4
  br label %10

  %11 = load i32, i32* %2, align 4
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %14, label %13

  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  br label %15

  store i32 1, i32* %4, align 4
  br label %15

  ret i32 0
}

define dso_local i32 @main() #0 {
; CHECK-LABEL: main:
; CHECK:       # %bb.0:
; CHECK-NEXT:    stmg %r11, %r15, 88(%r15)
; CHECK-NEXT:    .cfi_offset %r11, -72
; CHECK-NEXT:    .cfi_offset %r15, -40
; CHECK-NEXT:    aghi %r15, -184
; CHECK-NEXT:    .cfi_def_cfa_offset 344
; CHECK-NEXT:    lgr %r11, %r15
; CHECK-NEXT:    .cfi_def_cfa_register %r11
; CHECK-NEXT:    mvhi 180(%r11), 0
; CHECK-NEXT:    mvhi 176(%r11), 1
; CHECK-NEXT:    mvhi 172(%r11), 2
; CHECK-NEXT:    mvhi 168(%r11), 3
; CHECK-NEXT:    mvhi 164(%r11), 4
; CHECK-NEXT:    lhi %r0, 1
; CHECK-NEXT:    strl %r0, x
; CHECK-NEXT:    #APP
; CHECK-NEXT:    #NO_APP
; CHECK-NEXT:    mvhi 176(%r11), 1
; CHECK-NEXT:    mvhi 172(%r11), 2
; CHECK-NEXT:    mvhi 168(%r11), 3
; CHECK-NEXT:    lhi %r2, 0
; CHECK-NEXT:    mvhi 164(%r11), 4
; CHECK-NEXT:    lmg %r11, %r15, 272(%r11)
; CHECK-NEXT:    br %r14
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4

  store i32 0, i32* %1, align 4
  store i32 0, i32* @x, align 4
  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  store i32 1, i32* @x, align 4
  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  ret i32 0
}

attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }