blob: d3784afeb1f4715a91b3a6118ba1fea0984722bd [file]
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
; RUN: opt -passes=loop-vectorize -S %s | FileCheck %s
target triple = "x86_64"
define void @pr141968(i1 %cond, i8 %v, ptr %p) {
; CHECK-LABEL: define void @pr141968(
; CHECK-SAME: i1 [[COND:%.*]], i8 [[V:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: [[ZEXT_TRUE:%.*]] = zext i1 true to i16
; CHECK-NEXT: [[SEXT:%.*]] = sext i8 [[V]] to i16
; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE28:.*]]
; CHECK: [[PRED_SDIV_CONTINUE28]]:
; CHECK-NEXT: [[IV:%.*]] = phi i8 [ [[IV_NEXT:%.*]], %[[PRED_SDIV_CONTINUE30:.*]] ], [ 0, %[[ENTRY]] ]
; CHECK-NEXT: br i1 [[COND]], label %[[PRED_SDIV_CONTINUE30]], label %[[PRED_SDIV_IF29:.*]]
; CHECK: [[PRED_SDIV_IF29]]:
; CHECK-NEXT: [[SDIV:%.*]] = sdiv i16 [[SEXT]], [[ZEXT_TRUE]]
; CHECK-NEXT: [[SDIV_TRUNC:%.*]] = trunc i16 [[SDIV]] to i8
; CHECK-NEXT: br label %[[PRED_SDIV_CONTINUE30]]
; CHECK: [[PRED_SDIV_CONTINUE30]]:
; CHECK-NEXT: [[PREDPHI:%.*]] = phi i8 [ [[SDIV_TRUNC]], %[[PRED_SDIV_IF29]] ], [ 0, %[[PRED_SDIV_CONTINUE28]] ]
; CHECK-NEXT: store i8 [[PREDPHI]], ptr [[P]], align 1
; CHECK-NEXT: [[IV_NEXT]] = add i8 [[IV]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i8 [[IV_NEXT]], 0
; CHECK-NEXT: br i1 [[EXITCOND]], label %[[EXIT1:.*]], label %[[PRED_SDIV_CONTINUE28]]
; CHECK: [[EXIT1]]:
; CHECK-NEXT: ret void
;
entry:
%zext.true = zext i1 true to i16
%sext = sext i8 %v to i16
br label %loop.header
loop.header:
%iv = phi i8 [ %iv.next, %loop.latch ], [ 0, %entry ]
br i1 %cond, label %loop.latch, label %cond.false
cond.false:
%sdiv = sdiv i16 %sext, %zext.true
%sdiv.trunc = trunc i16 %sdiv to i8
br label %loop.latch
loop.latch:
%ret = phi i8 [ %sdiv.trunc, %cond.false ], [ 0, %loop.header ]
store i8 %ret, ptr %p, align 1
%iv.next = add i8 %iv, 1
%exitcond = icmp eq i8 %iv.next, 0
br i1 %exitcond, label %exit, label %loop.header
exit:
ret void
}