llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-usabs.ll

; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
; RUN: opt -passes=loop-vectorize -mattr=+neon,+dotprod -force-vector-interleave=1 -enable-epilogue-vectorization=false -S < %s | FileCheck %s

target triple = "aarch64-none-unknown-elf"

define i32 @unsigned_absolute_difference(ptr noalias %x, ptr noalias %y) {
; CHECK-LABEL: define i32 @unsigned_absolute_difference(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[FOR_BODY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    br label %[[EXIT1:.*]]
; CHECK:       [[EXIT1]]:
; CHECK-NEXT:    [[IV1:%.*]] = phi i64 [ 0, %[[VECTOR_BODY]] ], [ [[IV_NEXT:%.*]], %[[EXIT1]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_BODY]] ], [ [[PARTIAL_REDUCE:%.*]], %[[EXIT1]] ]
; CHECK-NEXT:    [[X_PTR1:%.*]] = getelementptr inbounds nuw i8, ptr [[X]], i64 [[IV1]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[X_PTR1]], align 1
; CHECK-NEXT:    [[Y_PTR1:%.*]] = getelementptr inbounds nuw i8, ptr [[Y]], i64 [[IV1]]
; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <16 x i8>, ptr [[Y_PTR1]], align 1
; CHECK-NEXT:    [[TMP2:%.*]] = freeze <16 x i8> [[WIDE_LOAD]]
; CHECK-NEXT:    [[TMP3:%.*]] = freeze <16 x i8> [[WIDE_LOAD1]]
; CHECK-NEXT:    [[TMP4:%.*]] = call <16 x i8> @llvm.umax.v16i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]])
; CHECK-NEXT:    [[TMP5:%.*]] = call <16 x i8> @llvm.umin.v16i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]])
; CHECK-NEXT:    [[TMP6:%.*]] = sub <16 x i8> [[TMP4]], [[TMP5]]
; CHECK-NEXT:    [[TMP7:%.*]] = zext <16 x i8> [[TMP6]] to <16 x i32>
; CHECK-NEXT:    [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP7]])
; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV1]], 16
; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 8000
; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label %[[EXIT2:.*]], label %[[EXIT1]], !llvm.loop [[LOOP0:![0-9]+]]
; CHECK:       [[EXIT2]]:
; CHECK-NEXT:    [[SUM_1_LCSSA:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i32 [[SUM_1_LCSSA]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i8, ptr %x, i64 %iv
  %x.val = load i8, ptr %x.ptr, align 1
  %ext.x = zext i8 %x.val to i32
  %y.ptr = getelementptr inbounds nuw i8, ptr %y, i64 %iv
  %y.val = load i8, ptr %y.ptr, align 1
  %ext.y = zext i8 %y.val to i32
  %sub = sub nsw i32 %ext.x, %ext.y
  %abs.diff = tail call i32 @llvm.abs.i32(i32 %sub, i1 true)
  %sum.1 = add nuw nsw i32 %abs.diff, %sum.0
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret i32 %sum.1
}

define i32 @signed_absolute_difference(ptr noalias %x, ptr noalias %y) {
; CHECK-LABEL: define i32 @signed_absolute_difference(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[FOR_BODY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    br label %[[EXIT1:.*]]
; CHECK:       [[EXIT1]]:
; CHECK-NEXT:    [[IV1:%.*]] = phi i64 [ 0, %[[VECTOR_BODY]] ], [ [[IV_NEXT:%.*]], %[[EXIT1]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer, %[[VECTOR_BODY]] ], [ [[PARTIAL_REDUCE:%.*]], %[[EXIT1]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw i8, ptr [[X]], i64 [[IV1]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP0]], align 1
; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[Y]], i64 [[IV1]]
; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <16 x i8>, ptr [[TMP1]], align 1
; CHECK-NEXT:    [[TMP2:%.*]] = freeze <16 x i8> [[WIDE_LOAD]]
; CHECK-NEXT:    [[TMP3:%.*]] = freeze <16 x i8> [[WIDE_LOAD1]]
; CHECK-NEXT:    [[TMP4:%.*]] = call <16 x i8> @llvm.smax.v16i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]])
; CHECK-NEXT:    [[TMP5:%.*]] = call <16 x i8> @llvm.smin.v16i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]])
; CHECK-NEXT:    [[TMP6:%.*]] = sub <16 x i8> [[TMP4]], [[TMP5]]
; CHECK-NEXT:    [[TMP7:%.*]] = zext <16 x i8> [[TMP6]] to <16 x i32>
; CHECK-NEXT:    [[PARTIAL_REDUCE]] = call <4 x i32> @llvm.vector.partial.reduce.add.v4i32.v16i32(<4 x i32> [[VEC_PHI]], <16 x i32> [[TMP7]])
; CHECK-NEXT:    [[IV_NEXT]] = add nuw i64 [[IV1]], 16
; CHECK-NEXT:    [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], 8000
; CHECK-NEXT:    br i1 [[EXITCOND_NOT]], label %[[EXIT2:.*]], label %[[EXIT1]], !llvm.loop [[LOOP3:![0-9]+]]
; CHECK:       [[EXIT2]]:
; CHECK-NEXT:    [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> [[PARTIAL_REDUCE]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i32 [[TMP9]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i8, ptr %x, i64 %iv
  %x.val = load i8, ptr %x.ptr, align 1
  %ext.x = sext i8 %x.val to i32
  %y.ptr = getelementptr inbounds nuw i8, ptr %y, i64 %iv
  %y.val = load i8, ptr %y.ptr, align 1
  %ext.y = sext i8 %y.val to i32
  %sub = sub nsw i32 %ext.x, %ext.y
  %abs.diff = tail call i32 @llvm.abs.i32(i32 %sub, i1 true)
  %sum.1 = add nuw nsw i32 %abs.diff, %sum.0
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret i32 %sum.1
}

; This case is a single level extend (i32 -> i64). This could lower to a sabal[bt] pair.
define i64 @signed_absolute_difference_i64_to_i64(ptr noalias %x, ptr noalias %y) {
; CHECK-LABEL: define i64 @signed_absolute_difference_i64_to_i64(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <4 x i64> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw i32, ptr [[X]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP0]], align 1
; CHECK-NEXT:    [[TMP2:%.*]] = sext <4 x i32> [[WIDE_LOAD]] to <4 x i64>
; CHECK-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw i32, ptr [[Y]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP1]], align 1
; CHECK-NEXT:    [[TMP3:%.*]] = sext <4 x i32> [[WIDE_LOAD1]] to <4 x i64>
; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <4 x i64> [[TMP2]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = call <4 x i64> @llvm.abs.v4i64(<4 x i64> [[TMP4]], i1 true)
; CHECK-NEXT:    [[TMP6]] = add <4 x i64> [[TMP5]], [[VEC_PHI]]
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 8000
; CHECK-NEXT:    br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP9:%.*]] = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP6]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i64 [[TMP9]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i64 [ 0, %entry ], [ %sum.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i32, ptr %x, i64 %iv
  %x.val = load i32, ptr %x.ptr, align 1
  %ext.x = sext i32 %x.val to i64
  %y.ptr = getelementptr inbounds nuw i32, ptr %y, i64 %iv
  %y.val = load i32, ptr %y.ptr, align 1
  %ext.y = sext i32 %y.val to i64
  %sub = sub nsw i64 %ext.x, %ext.y
  %abs.diff = tail call i64 @llvm.abs.i64(i64 %sub, i1 true)
  %sum.1 = add nuw nsw i64 %abs.diff, %sum.0
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret i64 %sum.1
}

; Negative test: Mismatched sign and zero extend.
define i32 @mismatched_extends(ptr noalias %x, ptr noalias %y) {
; CHECK-LABEL: define i32 @mismatched_extends(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <16 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw i8, ptr [[X]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP0]], align 1
; CHECK-NEXT:    [[TMP1:%.*]] = sext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[Y]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1
; CHECK-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[WIDE_LOAD1]] to <16 x i32>
; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <16 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> [[TMP4]], i1 true)
; CHECK-NEXT:    [[TMP6]] = add <16 x i32> [[TMP5]], [[VEC_PHI]]
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 8000
; CHECK-NEXT:    br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP6]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i32 [[TMP8]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i8, ptr %x, i64 %iv
  %x.val = load i8, ptr %x.ptr, align 1
  %ext.x = sext i8 %x.val to i32
  %y.ptr = getelementptr inbounds nuw i8, ptr %y, i64 %iv
  %y.val = load i8, ptr %y.ptr, align 1
  %ext.y = zext i8 %y.val to i32
  %sub = sub nsw i32 %ext.x, %ext.y
  %abs.diff = tail call i32 @llvm.abs.i32(i32 %sub, i1 true)
  %sum.1 = add nuw nsw i32 %abs.diff, %sum.0
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret i32 %sum.1
}

; Negative test: Mismatched source types (i16 and i8).
define i32 @mismatched_src_types(ptr noalias %x, ptr noalias %y) {
; CHECK-LABEL: define i32 @mismatched_src_types(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <16 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw i16, ptr [[X]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x i16>, ptr [[TMP0]], align 2
; CHECK-NEXT:    [[TMP1:%.*]] = sext <16 x i16> [[WIDE_LOAD]] to <16 x i32>
; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[Y]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1
; CHECK-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[WIDE_LOAD1]] to <16 x i32>
; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <16 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> [[TMP4]], i1 true)
; CHECK-NEXT:    [[TMP6]] = add <16 x i32> [[TMP5]], [[VEC_PHI]]
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
; CHECK-NEXT:    [[TMP7:%.*]] = icmp eq i64 [[INDEX_NEXT]], 8000
; CHECK-NEXT:    br i1 [[TMP7]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP8:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP6]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i32 [[TMP8]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i16, ptr %x, i64 %iv
  %x.val = load i16, ptr %x.ptr, align 2
  %ext.x = sext i16 %x.val to i32
  %y.ptr = getelementptr inbounds nuw i8, ptr %y, i64 %iv
  %y.val = load i8, ptr %y.ptr, align 1
  %ext.y = zext i8 %y.val to i32
  %sub = sub nsw i32 %ext.x, %ext.y
  %abs.diff = tail call i32 @llvm.abs.i32(i32 %sub, i1 true)
  %sum.1 = add nuw nsw i32 %abs.diff, %sum.0
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret i32 %sum.1
}

; Negative test: %sub has more than one user.
define i32 @additional_user_of_sub(ptr noalias %x, ptr noalias %y) {
; CHECK-LABEL: define i32 @additional_user_of_sub(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <16 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[VEC_PHI1:%.*]] = phi <16 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP7:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw i8, ptr [[X]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP0]], align 1
; CHECK-NEXT:    [[TMP1:%.*]] = zext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[Y]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD2:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1
; CHECK-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[WIDE_LOAD2]] to <16 x i32>
; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <16 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> [[TMP4]], i1 true)
; CHECK-NEXT:    [[TMP6]] = add <16 x i32> [[TMP5]], [[VEC_PHI]]
; CHECK-NEXT:    [[TMP7]] = add <16 x i32> [[TMP4]], [[VEC_PHI1]]
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 8000
; CHECK-NEXT:    br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP6]])
; CHECK-NEXT:    [[TMP10:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP7]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    [[RET:%.*]] = xor i32 [[TMP10]], [[TMP9]]
; CHECK-NEXT:    ret i32 [[RET]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.body ]
  %redux.0 = phi i32 [ 0, %entry ], [ %redux.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i8, ptr %x, i64 %iv
  %x.val = load i8, ptr %x.ptr, align 1
  %ext.x = zext i8 %x.val to i32
  %y.ptr = getelementptr inbounds nuw i8, ptr %y, i64 %iv
  %y.val = load i8, ptr %y.ptr, align 1
  %ext.y = zext i8 %y.val to i32
  %sub = sub nsw i32 %ext.x, %ext.y
  %abs.diff = tail call i32 @llvm.abs.i32(i32 %sub, i1 true)
  %sum.1 = add nuw nsw i32 %abs.diff, %sum.0
  %redux.1 = add nuw nsw i32 %sub, %redux.0
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  %ret = xor i32 %redux.1, %sum.1
  ret i32 %ret
}

; Negative test: Additional use of %abs.diff (prevents extends folding away).
; TODO: This could be profitable if the other user is a partial reduction.
define i32 @uabs_additional_user_of_abs(ptr noalias %x, ptr noalias %y, ptr noalias %z) {
; CHECK-LABEL: define i32 @uabs_additional_user_of_abs(
; CHECK-SAME: ptr noalias [[X:%.*]], ptr noalias [[Y:%.*]], ptr noalias [[Z:%.*]]) #[[ATTR0]] {
; CHECK-NEXT:  [[ENTRY:.*:]]
; CHECK-NEXT:    br label %[[VECTOR_PH:.*]]
; CHECK:       [[VECTOR_PH]]:
; CHECK-NEXT:    br label %[[VECTOR_BODY:.*]]
; CHECK:       [[VECTOR_BODY]]:
; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[VEC_PHI:%.*]] = phi <16 x i32> [ zeroinitializer, %[[VECTOR_PH]] ], [ [[TMP6:%.*]], %[[VECTOR_BODY]] ]
; CHECK-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw i8, ptr [[X]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD:%.*]] = load <16 x i8>, ptr [[TMP0]], align 1
; CHECK-NEXT:    [[TMP1:%.*]] = zext <16 x i8> [[WIDE_LOAD]] to <16 x i32>
; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw i8, ptr [[Y]], i64 [[INDEX]]
; CHECK-NEXT:    [[WIDE_LOAD1:%.*]] = load <16 x i8>, ptr [[TMP2]], align 1
; CHECK-NEXT:    [[TMP3:%.*]] = zext <16 x i8> [[WIDE_LOAD1]] to <16 x i32>
; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <16 x i32> [[TMP1]], [[TMP3]]
; CHECK-NEXT:    [[TMP5:%.*]] = call <16 x i32> @llvm.abs.v16i32(<16 x i32> [[TMP4]], i1 true)
; CHECK-NEXT:    [[TMP6]] = add <16 x i32> [[TMP5]], [[VEC_PHI]]
; CHECK-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw i32, ptr [[Z]], i64 [[INDEX]]
; CHECK-NEXT:    store <16 x i32> [[TMP5]], ptr [[TMP7]], align 4
; CHECK-NEXT:    [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 16
; CHECK-NEXT:    [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 8000
; CHECK-NEXT:    br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
; CHECK:       [[MIDDLE_BLOCK]]:
; CHECK-NEXT:    [[TMP9:%.*]] = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> [[TMP6]])
; CHECK-NEXT:    br label %[[EXIT:.*]]
; CHECK:       [[EXIT]]:
; CHECK-NEXT:    ret i32 [[TMP9]]
;
entry:
  br label %for.body

for.body:
  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
  %sum.0 = phi i32 [ 0, %entry ], [ %sum.1, %for.body ]
  %x.ptr = getelementptr inbounds nuw i8, ptr %x, i64 %iv
  %x.val = load i8, ptr %x.ptr, align 1
  %ext.x = zext i8 %x.val to i32
  %y.ptr = getelementptr inbounds nuw i8, ptr %y, i64 %iv
  %y.val = load i8, ptr %y.ptr, align 1
  %ext.y = zext i8 %y.val to i32
  %sub = sub nsw i32 %ext.x, %ext.y
  %abs.diff = tail call i32 @llvm.abs.i32(i32 %sub, i1 true)
  %sum.1 = add nuw nsw i32 %abs.diff, %sum.0
  %z.ptr = getelementptr inbounds nuw i32, ptr %z, i64 %iv
  store i32 %abs.diff, ptr %z.ptr, align 4
  %iv.next = add nuw nsw i64 %iv, 1
  %exitcond.not = icmp eq i64 %iv.next, 8000
  br i1 %exitcond.not, label %exit, label %for.body

exit:
  ret i32 %sum.1
}