| ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| ; RUN: opt -S -passes=normalize < %s | FileCheck %s |
| |
| define void @test(ptr, i32) { |
| ; CHECK-LABEL: define void @test( |
| ; CHECK-SAME: ptr [[A0:%.*]], i32 [[A1:%.*]]) { |
| ; CHECK-NEXT: [[BB76951:.*]]: |
| ; CHECK-NEXT: %"vl74787([[A1]], 1)" = add i32 [[A1]], 1 |
| ; CHECK-NEXT: br label %[[BB16110:.*]] |
| ; CHECK: [[BB16110]]: |
| ; CHECK-NEXT: %"op17327(op85825, vl74787)" = phi i32 [ %"op85825(op11283, op78175)", %[[BB16110]] ], [ %"vl74787([[A1]], 1)", %[[BB76951]] ] |
| ; CHECK-NEXT: %"op17327(op78175, vl74787)" = phi i32 [ %"op78175(op17327)70", %[[BB16110]] ], [ %"vl74787([[A1]], 1)", %[[BB76951]] ] |
| ; CHECK-NEXT: %"op97159(op17327)" = mul i32 %"op17327(op85825, vl74787)", undef |
| ; CHECK-NEXT: %"op26718(op97159)" = xor i32 -1, %"op97159(op17327)" |
| ; CHECK-NEXT: %"op96390(op17327, op26718)" = add i32 %"op17327(op85825, vl74787)", %"op26718(op97159)" |
| ; CHECK-NEXT: %"op78175(op17327)" = add i32 -1, %"op17327(op78175, vl74787)" |
| ; CHECK-NEXT: %"op85825(op78175, op96390)" = add i32 %"op78175(op17327)", %"op96390(op17327, op26718)" |
| ; CHECK-NEXT: %"op11951(op85825, op97159)" = mul i32 %"op85825(op78175, op96390)", %"op97159(op17327)" |
| ; CHECK-NEXT: %"op26718(op11951)" = xor i32 -1, %"op11951(op85825, op97159)" |
| ; CHECK-NEXT: %"op14739(op26718, op85825)" = add i32 %"op26718(op11951)", %"op85825(op78175, op96390)" |
| ; CHECK-NEXT: %"op11283(op14739)" = add i32 %"op14739(op26718, op85825)", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)" = mul i32 %"op11283(op14739)", %"op11951(op85825, op97159)" |
| ; CHECK-NEXT: %"op26718(op11951)1" = xor i32 -1, %"op11951(op11283, op11951)" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)" = add i32 %"op11283(op14739)", %"op26718(op11951)1" |
| ; CHECK-NEXT: %"op11283(op14739)2" = add i32 %"op14739(op11283, op26718)", undef |
| ; CHECK-NEXT: %"op11283(op11283)" = add i32 %"op11283(op14739)2", undef |
| ; CHECK-NEXT: %"op11283(op11283)3" = add i32 %"op11283(op11283)", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)4" = mul i32 %"op11283(op14739)2", %"op11951(op11283, op11951)" |
| ; CHECK-NEXT: %"op11951(op11283, op11951)5" = mul i32 %"op11283(op11283)3", %"op11951(op11283, op11951)4" |
| ; CHECK-NEXT: %"op26718(op11951)6" = xor i32 -1, %"op11951(op11283, op11951)5" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)7" = add i32 %"op11283(op11283)3", %"op26718(op11951)6" |
| ; CHECK-NEXT: %"op11283(op14739)8" = add i32 %"op14739(op11283, op26718)7", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)9" = mul i32 %"op11283(op14739)8", %"op11951(op11283, op11951)5" |
| ; CHECK-NEXT: %"op26718(op11951)10" = xor i32 -1, %"op11951(op11283, op11951)9" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)11" = add i32 %"op11283(op14739)8", %"op26718(op11951)10" |
| ; CHECK-NEXT: %"op11283(op14739)12" = add i32 %"op14739(op11283, op26718)11", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)13" = mul i32 %"op11283(op14739)12", %"op11951(op11283, op11951)9" |
| ; CHECK-NEXT: %"op26718(op11951)14" = xor i32 -1, %"op11951(op11283, op11951)13" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)15" = add i32 %"op11283(op14739)12", %"op26718(op11951)14" |
| ; CHECK-NEXT: %"op11283(op14739)16" = add i32 %"op14739(op11283, op26718)15", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)17" = mul i32 %"op11283(op14739)16", %"op11951(op11283, op11951)13" |
| ; CHECK-NEXT: %"op26718(op11951)18" = xor i32 -1, %"op11951(op11283, op11951)17" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)19" = add i32 %"op11283(op14739)16", %"op26718(op11951)18" |
| ; CHECK-NEXT: %"op11283(op14739)20" = add i32 %"op14739(op11283, op26718)19", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)21" = mul i32 %"op11283(op14739)20", %"op11951(op11283, op11951)17" |
| ; CHECK-NEXT: %"op26718(op11951)22" = xor i32 -1, %"op11951(op11283, op11951)21" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)23" = add i32 %"op11283(op14739)20", %"op26718(op11951)22" |
| ; CHECK-NEXT: %"op78175(op17327)24" = add i32 -9, %"op17327(op78175, vl74787)" |
| ; CHECK-NEXT: %"op85825(op14739, op78175)" = add i32 %"op14739(op11283, op26718)23", %"op78175(op17327)24" |
| ; CHECK-NEXT: %"op11951(op11951, op85825)" = mul i32 %"op11951(op11283, op11951)21", %"op85825(op14739, op78175)" |
| ; CHECK-NEXT: %"op26718(op11951)25" = xor i32 -1, %"op11951(op11951, op85825)" |
| ; CHECK-NEXT: %"op14739(op26718, op85825)26" = add i32 %"op26718(op11951)25", %"op85825(op14739, op78175)" |
| ; CHECK-NEXT: %"op11283(op14739)27" = add i32 %"op14739(op26718, op85825)26", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)28" = mul i32 %"op11283(op14739)27", %"op11951(op11951, op85825)" |
| ; CHECK-NEXT: %"op26718(op11951)29" = xor i32 -1, %"op11951(op11283, op11951)28" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)30" = add i32 %"op11283(op14739)27", %"op26718(op11951)29" |
| ; CHECK-NEXT: %"op11283(op14739)31" = add i32 %"op14739(op11283, op26718)30", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)32" = mul i32 %"op11283(op14739)31", %"op11951(op11283, op11951)28" |
| ; CHECK-NEXT: %"op26718(op11951)33" = xor i32 -1, %"op11951(op11283, op11951)32" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)34" = add i32 %"op11283(op14739)31", %"op26718(op11951)33" |
| ; CHECK-NEXT: %"op11283(op14739)35" = add i32 %"op14739(op11283, op26718)34", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)36" = mul i32 %"op11283(op14739)35", %"op11951(op11283, op11951)32" |
| ; CHECK-NEXT: %"op26718(op11951)37" = xor i32 -1, %"op11951(op11283, op11951)36" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)38" = add i32 %"op11283(op14739)35", %"op26718(op11951)37" |
| ; CHECK-NEXT: %"op11283(op14739)39" = add i32 %"op14739(op11283, op26718)38", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)40" = mul i32 %"op11283(op14739)39", %"op11951(op11283, op11951)36" |
| ; CHECK-NEXT: %"op26718(op11951)41" = xor i32 -1, %"op11951(op11283, op11951)40" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)42" = add i32 %"op11283(op14739)39", %"op26718(op11951)41" |
| ; CHECK-NEXT: %"op78175(op17327)43" = add i32 -14, %"op17327(op78175, vl74787)" |
| ; CHECK-NEXT: %"op85825(op14739, op78175)44" = add i32 %"op14739(op11283, op26718)42", %"op78175(op17327)43" |
| ; CHECK-NEXT: %"op11951(op11951, op85825)45" = mul i32 %"op11951(op11283, op11951)40", %"op85825(op14739, op78175)44" |
| ; CHECK-NEXT: %"op26718(op11951)46" = xor i32 -1, %"op11951(op11951, op85825)45" |
| ; CHECK-NEXT: %"op14739(op26718, op85825)47" = add i32 %"op26718(op11951)46", %"op85825(op14739, op78175)44" |
| ; CHECK-NEXT: %"op11283(op14739)48" = add i32 %"op14739(op26718, op85825)47", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)49" = mul i32 %"op11283(op14739)48", %"op11951(op11951, op85825)45" |
| ; CHECK-NEXT: %"op26718(op11951)50" = xor i32 -1, %"op11951(op11283, op11951)49" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)51" = add i32 %"op11283(op14739)48", %"op26718(op11951)50" |
| ; CHECK-NEXT: %"op11283(op14739)52" = add i32 %"op14739(op11283, op26718)51", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)53" = mul i32 %"op11283(op14739)52", %"op11951(op11283, op11951)49" |
| ; CHECK-NEXT: %"op26718(op11951)54" = xor i32 -1, %"op11951(op11283, op11951)53" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)55" = add i32 %"op11283(op14739)52", %"op26718(op11951)54" |
| ; CHECK-NEXT: %"op11283(op14739)56" = add i32 %"op14739(op11283, op26718)55", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)57" = mul i32 %"op11283(op14739)56", %"op11951(op11283, op11951)53" |
| ; CHECK-NEXT: %"op26718(op11951)58" = xor i32 -1, %"op11951(op11283, op11951)57" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)59" = add i32 %"op11283(op14739)56", %"op26718(op11951)58" |
| ; CHECK-NEXT: %"op11283(op14739)60" = add i32 %"op14739(op11283, op26718)59", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)61" = mul i32 %"op11283(op14739)60", %"op11951(op11283, op11951)57" |
| ; CHECK-NEXT: %"op26718(op11951)62" = xor i32 -1, %"op11951(op11283, op11951)61" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)63" = add i32 %"op11283(op14739)60", %"op26718(op11951)62" |
| ; CHECK-NEXT: %"op11283(op14739)64" = add i32 %"op14739(op11283, op26718)63", undef |
| ; CHECK-NEXT: %"op11951(op11283, op11951)65" = mul i32 %"op11283(op14739)64", %"op11951(op11283, op11951)61" |
| ; CHECK-NEXT: %"op26718(op11951)66" = xor i32 -1, %"op11951(op11283, op11951)65" |
| ; CHECK-NEXT: %"op14739(op11283, op26718)67" = add i32 %"op11283(op14739)64", %"op26718(op11951)66" |
| ; CHECK-NEXT: %"op11283(op14739)68" = add i32 %"op14739(op11283, op26718)67", undef |
| ; CHECK-NEXT: %"op11283(op11283)69" = add i32 %"op11283(op14739)68", undef |
| ; CHECK-NEXT: %"op78175(op17327)70" = add i32 -21, %"op17327(op78175, vl74787)" |
| ; CHECK-NEXT: %"op85825(op11283, op78175)" = add i32 %"op11283(op11283)69", %"op78175(op17327)70" |
| ; CHECK-NEXT: store i32 %"op85825(op11283, op78175)", ptr [[A0]], align 4 |
| ; CHECK-NEXT: br label %[[BB16110]] |
| ; |
| bb: |
| %a = add i32 %1, 1 |
| br label %bb1 |
| |
| bb1: ; preds = %bb1, %bb |
| %tmp = phi i32 [ %a, %bb ], [ %tmp87, %bb1 ] |
| %tmp2 = phi i32 [ %a, %bb ], [ %tmp86, %bb1 ] |
| %tmp3 = mul i32 %tmp, undef |
| %tmp4 = xor i32 %tmp3, -1 |
| %tmp5 = add i32 %tmp, %tmp4 |
| %tmp6 = add i32 %tmp2, -1 |
| %tmp7 = add i32 %tmp5, %tmp6 |
| %tmp8 = mul i32 %tmp7, %tmp3 |
| %tmp9 = xor i32 %tmp8, -1 |
| %tmp10 = add i32 %tmp7, %tmp9 |
| %tmp11 = add i32 %tmp10, undef |
| %tmp12 = mul i32 %tmp11, %tmp8 |
| %tmp13 = xor i32 %tmp12, -1 |
| %tmp14 = add i32 %tmp11, %tmp13 |
| %tmp15 = add i32 %tmp14, undef |
| %tmp16 = mul i32 %tmp15, %tmp12 |
| %tmp17 = add i32 %tmp15, undef |
| %tmp18 = add i32 %tmp17, undef |
| %tmp19 = mul i32 %tmp18, %tmp16 |
| %tmp20 = xor i32 %tmp19, -1 |
| %tmp21 = add i32 %tmp18, %tmp20 |
| %tmp22 = add i32 %tmp21, undef |
| %tmp23 = mul i32 %tmp22, %tmp19 |
| %tmp24 = xor i32 %tmp23, -1 |
| %tmp25 = add i32 %tmp22, %tmp24 |
| %tmp26 = add i32 %tmp25, undef |
| %tmp27 = mul i32 %tmp26, %tmp23 |
| %tmp28 = xor i32 %tmp27, -1 |
| %tmp29 = add i32 %tmp26, %tmp28 |
| %tmp30 = add i32 %tmp29, undef |
| %tmp31 = mul i32 %tmp30, %tmp27 |
| %tmp32 = xor i32 %tmp31, -1 |
| %tmp33 = add i32 %tmp30, %tmp32 |
| %tmp34 = add i32 %tmp33, undef |
| %tmp35 = mul i32 %tmp34, %tmp31 |
| %tmp36 = xor i32 %tmp35, -1 |
| %tmp37 = add i32 %tmp34, %tmp36 |
| %tmp38 = add i32 %tmp2, -9 |
| %tmp39 = add i32 %tmp37, %tmp38 |
| %tmp40 = mul i32 %tmp39, %tmp35 |
| %tmp41 = xor i32 %tmp40, -1 |
| %tmp42 = add i32 %tmp39, %tmp41 |
| %tmp43 = add i32 %tmp42, undef |
| %tmp44 = mul i32 %tmp43, %tmp40 |
| %tmp45 = xor i32 %tmp44, -1 |
| %tmp46 = add i32 %tmp43, %tmp45 |
| %tmp47 = add i32 %tmp46, undef |
| %tmp48 = mul i32 %tmp47, %tmp44 |
| %tmp49 = xor i32 %tmp48, -1 |
| %tmp50 = add i32 %tmp47, %tmp49 |
| %tmp51 = add i32 %tmp50, undef |
| %tmp52 = mul i32 %tmp51, %tmp48 |
| %tmp53 = xor i32 %tmp52, -1 |
| %tmp54 = add i32 %tmp51, %tmp53 |
| %tmp55 = add i32 %tmp54, undef |
| %tmp56 = mul i32 %tmp55, %tmp52 |
| %tmp57 = xor i32 %tmp56, -1 |
| %tmp58 = add i32 %tmp55, %tmp57 |
| %tmp59 = add i32 %tmp2, -14 |
| %tmp60 = add i32 %tmp58, %tmp59 |
| %tmp61 = mul i32 %tmp60, %tmp56 |
| %tmp62 = xor i32 %tmp61, -1 |
| %tmp63 = add i32 %tmp60, %tmp62 |
| %tmp64 = add i32 %tmp63, undef |
| %tmp65 = mul i32 %tmp64, %tmp61 |
| %tmp66 = xor i32 %tmp65, -1 |
| %tmp67 = add i32 %tmp64, %tmp66 |
| %tmp68 = add i32 %tmp67, undef |
| %tmp69 = mul i32 %tmp68, %tmp65 |
| %tmp70 = xor i32 %tmp69, -1 |
| %tmp71 = add i32 %tmp68, %tmp70 |
| %tmp72 = add i32 %tmp71, undef |
| %tmp73 = mul i32 %tmp72, %tmp69 |
| %tmp74 = xor i32 %tmp73, -1 |
| %tmp75 = add i32 %tmp72, %tmp74 |
| %tmp76 = add i32 %tmp75, undef |
| %tmp77 = mul i32 %tmp76, %tmp73 |
| %tmp78 = xor i32 %tmp77, -1 |
| %tmp79 = add i32 %tmp76, %tmp78 |
| %tmp80 = add i32 %tmp79, undef |
| %tmp81 = mul i32 %tmp80, %tmp77 |
| %tmp82 = xor i32 %tmp81, -1 |
| %tmp83 = add i32 %tmp80, %tmp82 |
| %tmp84 = add i32 %tmp83, undef |
| %tmp85 = add i32 %tmp84, undef |
| %tmp86 = add i32 %tmp2, -21 |
| %tmp87 = add i32 %tmp85, %tmp86 |
| store i32 %tmp87, ptr %0 |
| br label %bb1 |
| } |
