| ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 --check-prefix=AVX2NOBW |
| ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 --check-prefix=AVX512BW |
| |
| ; |
| ; udiv by 7 |
| ; |
| |
| define <2 x i64> @test_div7_2i64(<2 x i64> %a) nounwind { |
| ; SSE2-LABEL: test_div7_2i64: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: movq %xmm0, %rcx |
| ; SSE2-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493 |
| ; SSE2-NEXT: movq %rcx, %rax |
| ; SSE2-NEXT: mulq %rsi |
| ; SSE2-NEXT: subq %rdx, %rcx |
| ; SSE2-NEXT: shrq %rcx |
| ; SSE2-NEXT: addq %rdx, %rcx |
| ; SSE2-NEXT: movq %rcx, %xmm1 |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3] |
| ; SSE2-NEXT: movq %xmm0, %rcx |
| ; SSE2-NEXT: movq %rcx, %rax |
| ; SSE2-NEXT: mulq %rsi |
| ; SSE2-NEXT: subq %rdx, %rcx |
| ; SSE2-NEXT: shrq %rcx |
| ; SSE2-NEXT: addq %rdx, %rcx |
| ; SSE2-NEXT: movq %rcx, %xmm0 |
| ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] |
| ; SSE2-NEXT: psrlq $2, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm1, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_div7_2i64: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pextrq $1, %xmm0, %rcx |
| ; SSE41-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493 |
| ; SSE41-NEXT: movq %rcx, %rax |
| ; SSE41-NEXT: mulq %rsi |
| ; SSE41-NEXT: subq %rdx, %rcx |
| ; SSE41-NEXT: shrq %rcx |
| ; SSE41-NEXT: addq %rdx, %rcx |
| ; SSE41-NEXT: movq %rcx, %xmm1 |
| ; SSE41-NEXT: movq %xmm0, %rcx |
| ; SSE41-NEXT: movq %rcx, %rax |
| ; SSE41-NEXT: mulq %rsi |
| ; SSE41-NEXT: subq %rdx, %rcx |
| ; SSE41-NEXT: shrq %rcx |
| ; SSE41-NEXT: addq %rdx, %rcx |
| ; SSE41-NEXT: movq %rcx, %xmm0 |
| ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] |
| ; SSE41-NEXT: psrlq $2, %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX-LABEL: test_div7_2i64: |
| ; AVX: # %bb.0: |
| ; AVX-NEXT: vpextrq $1, %xmm0, %rcx |
| ; AVX-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493 |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: mulq %rsi |
| ; AVX-NEXT: subq %rdx, %rcx |
| ; AVX-NEXT: shrq %rcx |
| ; AVX-NEXT: addq %rdx, %rcx |
| ; AVX-NEXT: vmovq %rcx, %xmm1 |
| ; AVX-NEXT: vmovq %xmm0, %rcx |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: mulq %rsi |
| ; AVX-NEXT: subq %rdx, %rcx |
| ; AVX-NEXT: shrq %rcx |
| ; AVX-NEXT: addq %rdx, %rcx |
| ; AVX-NEXT: vmovq %rcx, %xmm0 |
| ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] |
| ; AVX-NEXT: vpsrlq $2, %xmm0, %xmm0 |
| ; AVX-NEXT: retq |
| %res = udiv <2 x i64> %a, <i64 7, i64 7> |
| ret <2 x i64> %res |
| } |
| |
| define <4 x i32> @test_div7_4i32(<4 x i32> %a) nounwind { |
| ; SSE2-LABEL: test_div7_4i32: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [613566757,613566757,613566757,613566757] |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: pmuludq %xmm1, %xmm2 |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3] |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] |
| ; SSE2-NEXT: pmuludq %xmm1, %xmm3 |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,3,2,3] |
| ; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] |
| ; SSE2-NEXT: psubd %xmm2, %xmm0 |
| ; SSE2-NEXT: psrld $1, %xmm0 |
| ; SSE2-NEXT: paddd %xmm2, %xmm0 |
| ; SSE2-NEXT: psrld $2, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_div7_4i32: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [613566757,613566757,613566757,613566757] |
| ; SSE41-NEXT: pmuludq %xmm2, %xmm1 |
| ; SSE41-NEXT: pmuludq %xmm0, %xmm2 |
| ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] |
| ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7] |
| ; SSE41-NEXT: psubd %xmm2, %xmm0 |
| ; SSE41-NEXT: psrld $1, %xmm0 |
| ; SSE41-NEXT: paddd %xmm2, %xmm0 |
| ; SSE41-NEXT: psrld $2, %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX1-LABEL: test_div7_4i32: |
| ; AVX1: # %bb.0: |
| ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [613566757,613566757,613566757,613566757] |
| ; AVX1-NEXT: vpmuludq %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2 |
| ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] |
| ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7] |
| ; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpsrld $1, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpsrld $2, %xmm0, %xmm0 |
| ; AVX1-NEXT: retq |
| ; |
| ; AVX2-LABEL: test_div7_4i32: |
| ; AVX2: # %bb.0: |
| ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [613566757,613566757,613566757,613566757] |
| ; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm1 |
| ; AVX2-NEXT: vpmuludq %xmm2, %xmm0, %xmm2 |
| ; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] |
| ; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm2[0],xmm1[1],xmm2[2],xmm1[3] |
| ; AVX2-NEXT: vpsubd %xmm1, %xmm0, %xmm0 |
| ; AVX2-NEXT: vpsrld $1, %xmm0, %xmm0 |
| ; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 |
| ; AVX2-NEXT: vpsrld $2, %xmm0, %xmm0 |
| ; AVX2-NEXT: retq |
| %res = udiv <4 x i32> %a, <i32 7, i32 7, i32 7, i32 7> |
| ret <4 x i32> %res |
| } |
| |
| define <8 x i16> @test_div7_8i16(<8 x i16> %a) nounwind { |
| ; SSE-LABEL: test_div7_8i16: |
| ; SSE: # %bb.0: |
| ; SSE-NEXT: movdqa {{.*#+}} xmm1 = [9363,9363,9363,9363,9363,9363,9363,9363] |
| ; SSE-NEXT: pmulhuw %xmm0, %xmm1 |
| ; SSE-NEXT: psubw %xmm1, %xmm0 |
| ; SSE-NEXT: psrlw $1, %xmm0 |
| ; SSE-NEXT: paddw %xmm1, %xmm0 |
| ; SSE-NEXT: psrlw $2, %xmm0 |
| ; SSE-NEXT: retq |
| ; |
| ; AVX-LABEL: test_div7_8i16: |
| ; AVX: # %bb.0: |
| ; AVX-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [9363,9363,9363,9363,9363,9363,9363,9363] |
| ; AVX-NEXT: vpsubw %xmm1, %xmm0, %xmm0 |
| ; AVX-NEXT: vpsrlw $1, %xmm0, %xmm0 |
| ; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0 |
| ; AVX-NEXT: vpsrlw $2, %xmm0, %xmm0 |
| ; AVX-NEXT: retq |
| %res = udiv <8 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> |
| ret <8 x i16> %res |
| } |
| |
| define <16 x i8> @test_div7_16i8(<16 x i8> %a) nounwind { |
| ; SSE2-LABEL: test_div7_16i8: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: pxor %xmm1, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [37,0,37,0,37,0,37,0,37,0,37,0,37,0,37,0] |
| ; SSE2-NEXT: pmullw %xmm3, %xmm2 |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm4 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] |
| ; SSE2-NEXT: pmullw %xmm3, %xmm4 |
| ; SSE2-NEXT: psrlw $8, %xmm4 |
| ; SSE2-NEXT: packuswb %xmm2, %xmm4 |
| ; SSE2-NEXT: psubb %xmm4, %xmm0 |
| ; SSE2-NEXT: psrlw $1, %xmm0 |
| ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 |
| ; SSE2-NEXT: paddb %xmm4, %xmm0 |
| ; SSE2-NEXT: psrlw $2, %xmm0 |
| ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_div7_16i8: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pxor %xmm1, %xmm1 |
| ; SSE41-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE41-NEXT: pmovsxbw {{.*#+}} xmm1 = [37,37,37,37,37,37,37,37] |
| ; SSE41-NEXT: pmullw %xmm1, %xmm2 |
| ; SSE41-NEXT: psrlw $8, %xmm2 |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; SSE41-NEXT: pmullw %xmm1, %xmm3 |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: packuswb %xmm2, %xmm3 |
| ; SSE41-NEXT: psubb %xmm3, %xmm0 |
| ; SSE41-NEXT: psrlw $1, %xmm0 |
| ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 |
| ; SSE41-NEXT: paddb %xmm3, %xmm0 |
| ; SSE41-NEXT: psrlw $2, %xmm0 |
| ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX1-LABEL: test_div7_16i8: |
| ; AVX1: # %bb.0: |
| ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [37,0,37,0,37,0,37,0,37,0,37,0,37,0,37,0] |
| ; AVX1-NEXT: vpmullw %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; AVX1-NEXT: vpmullw %xmm2, %xmm3, %xmm2 |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 |
| ; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 |
| ; AVX1-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 |
| ; AVX1-NEXT: retq |
| ; |
| ; AVX2NOBW-LABEL: test_div7_16i8: |
| ; AVX2NOBW: # %bb.0: |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpsrlw $1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpsrlw $2, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vzeroupper |
| ; AVX2NOBW-NEXT: retq |
| ; |
| ; AVX512BW-LABEL: test_div7_16i8: |
| ; AVX512BW: # %bb.0: |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37] |
| ; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 |
| ; AVX512BW-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpsrlw $1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpsrlw $2, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vzeroupper |
| ; AVX512BW-NEXT: retq |
| %res = udiv <16 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7> |
| ret <16 x i8> %res |
| } |
| |
| ; |
| ; sdiv by non-splat constant |
| ; |
| |
| define <16 x i8> @test_divconstant_16i8(<16 x i8> %a) nounwind { |
| ; SSE2-LABEL: test_divconstant_16i8: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: pxor %xmm1, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [128,256,256,256,256,256,256,256] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [147,0,79,0,171,0,117,0,205,0,57,0,57,0,37,0] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm3 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [256,256,256,256,256,256,256,128] |
| ; SSE2-NEXT: psrlw $8, %xmm3 |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [37,0,32,0,57,0,205,0,117,0,171,0,79,0,147,0] |
| ; SSE2-NEXT: psrlw $8, %xmm3 |
| ; SSE2-NEXT: packuswb %xmm2, %xmm3 |
| ; SSE2-NEXT: psubb %xmm3, %xmm0 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0] |
| ; SSE2-NEXT: psrlw $8, %xmm0 |
| ; SSE2-NEXT: packuswb %xmm2, %xmm0 |
| ; SSE2-NEXT: paddb %xmm3, %xmm0 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [64,64,32,32,32,128,128,64] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [64,256,128,32,32,32,64,64] |
| ; SSE2-NEXT: psrlw $8, %xmm0 |
| ; SSE2-NEXT: packuswb %xmm2, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_divconstant_16i8: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pxor %xmm1, %xmm1 |
| ; SSE41-NEXT: pxor %xmm2, %xmm2 |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] |
| ; SSE41-NEXT: movdqa %xmm0, %xmm3 |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] |
| ; SSE41-NEXT: psllw $7, %xmm3 |
| ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm2[1,2,3,4,5,6,7] |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [147,0,79,0,171,0,117,0,205,0,57,0,57,0,37,0] |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: pxor %xmm2, %xmm2 |
| ; SSE41-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; SSE41-NEXT: psllw $7, %xmm4 |
| ; SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm2[0,1,2,3,4,5,6],xmm4[7] |
| ; SSE41-NEXT: psrlw $8, %xmm4 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4 # [37,0,32,0,57,0,205,0,117,0,171,0,79,0,147,0] |
| ; SSE41-NEXT: psrlw $8, %xmm4 |
| ; SSE41-NEXT: packuswb %xmm3, %xmm4 |
| ; SSE41-NEXT: psubb %xmm4, %xmm0 |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0] |
| ; SSE41-NEXT: psrlw $8, %xmm0 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0] |
| ; SSE41-NEXT: psrlw $8, %xmm2 |
| ; SSE41-NEXT: packuswb %xmm0, %xmm2 |
| ; SSE41-NEXT: paddb %xmm4, %xmm2 |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [64,64,32,32,32,128,128,64] |
| ; SSE41-NEXT: psrlw $8, %xmm2 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # [64,256,128,32,32,32,64,64] |
| ; SSE41-NEXT: psrlw $8, %xmm0 |
| ; SSE41-NEXT: packuswb %xmm2, %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX1-LABEL: test_divconstant_16i8: |
| ; AVX1: # %bb.0: |
| ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; AVX1-NEXT: vpsllw $7, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0],xmm2[1,2,3,4,5,6,7] |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [147,0,79,0,171,0,117,0,205,0,57,0,57,0,37,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; AVX1-NEXT: vpsllw $7, %xmm4, %xmm4 |
| ; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,5,6],xmm4[7] |
| ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3 # [37,0,32,0,57,0,205,0,117,0,171,0,79,0,147,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 |
| ; AVX1-NEXT: vpsubb %xmm2, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3 # [0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpaddb %xmm2, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [64,64,32,32,32,128,128,64] |
| ; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 # [64,256,128,32,32,32,64,64] |
| ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 |
| ; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: retq |
| ; |
| ; AVX2NOBW-LABEL: test_divconstant_16i8: |
| ; AVX2NOBW: # %bb.0: |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [256,256,256,256,256,256,256,128,128,256,256,256,256,256,256,256] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,32,57,205,117,171,79,147,147,79,171,117,205,57,57,37] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [128,0,0,0,128,0,0,0,0,0,0,128,0,0,0,128] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm0, %ymm0 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm2 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [64,256,128,32,32,32,64,64,64,64,32,32,32,128,128,64] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm0, %ymm0 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm0, %xmm1 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vzeroupper |
| ; AVX2NOBW-NEXT: retq |
| ; |
| ; AVX512BW-LABEL: test_divconstant_16i8: |
| ; AVX512BW: # %bb.0: |
| ; AVX512BW-NEXT: vpmovsxbw {{.*#+}} ymm1 = [0,0,0,0,0,0,0,1,1,0,0,0,0,0,0,0] |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm2, %zmm1 |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,32,57,205,117,171,79,147,147,79,171,117,205,57,57,37] |
| ; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 |
| ; AVX512BW-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 # [128,0,0,0,128,0,0,0,0,0,0,128,0,0,0,128] |
| ; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 |
| ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 |
| ; AVX512BW-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX512BW-NEXT: vpmovsxbw {{.*#+}} ymm1 = [2,0,1,3,3,3,2,2,2,2,3,3,3,1,1,2] |
| ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 |
| ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 |
| ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 |
| ; AVX512BW-NEXT: vzeroupper |
| ; AVX512BW-NEXT: retq |
| %res = udiv <16 x i8> %a, <i8 7, i8 8, i8 9, i8 10,i8 11, i8 12, i8 13, i8 14, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9,i8 9, i8 7> |
| ret <16 x i8> %res |
| } |
| |
| ; |
| ; urem by 7 |
| ; |
| |
| define <2 x i64> @test_rem7_2i64(<2 x i64> %a) nounwind { |
| ; SSE2-LABEL: test_rem7_2i64: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: movq %xmm0, %rcx |
| ; SSE2-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493 |
| ; SSE2-NEXT: movq %rcx, %rax |
| ; SSE2-NEXT: mulq %rsi |
| ; SSE2-NEXT: movq %rcx, %rax |
| ; SSE2-NEXT: subq %rdx, %rax |
| ; SSE2-NEXT: shrq %rax |
| ; SSE2-NEXT: addq %rdx, %rax |
| ; SSE2-NEXT: shrq $2, %rax |
| ; SSE2-NEXT: leaq (,%rax,8), %rdx |
| ; SSE2-NEXT: subq %rdx, %rax |
| ; SSE2-NEXT: addq %rcx, %rax |
| ; SSE2-NEXT: movq %rax, %xmm1 |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,2,3] |
| ; SSE2-NEXT: movq %xmm0, %rcx |
| ; SSE2-NEXT: movq %rcx, %rax |
| ; SSE2-NEXT: mulq %rsi |
| ; SSE2-NEXT: movq %rcx, %rax |
| ; SSE2-NEXT: subq %rdx, %rax |
| ; SSE2-NEXT: shrq %rax |
| ; SSE2-NEXT: addq %rdx, %rax |
| ; SSE2-NEXT: shrq $2, %rax |
| ; SSE2-NEXT: leaq (,%rax,8), %rdx |
| ; SSE2-NEXT: subq %rdx, %rax |
| ; SSE2-NEXT: addq %rcx, %rax |
| ; SSE2-NEXT: movq %rax, %xmm0 |
| ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] |
| ; SSE2-NEXT: movdqa %xmm1, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_rem7_2i64: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pextrq $1, %xmm0, %rcx |
| ; SSE41-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493 |
| ; SSE41-NEXT: movq %rcx, %rax |
| ; SSE41-NEXT: mulq %rsi |
| ; SSE41-NEXT: movq %rcx, %rax |
| ; SSE41-NEXT: subq %rdx, %rax |
| ; SSE41-NEXT: shrq %rax |
| ; SSE41-NEXT: addq %rdx, %rax |
| ; SSE41-NEXT: shrq $2, %rax |
| ; SSE41-NEXT: leaq (,%rax,8), %rdx |
| ; SSE41-NEXT: subq %rdx, %rax |
| ; SSE41-NEXT: addq %rcx, %rax |
| ; SSE41-NEXT: movq %rax, %xmm1 |
| ; SSE41-NEXT: movq %xmm0, %rcx |
| ; SSE41-NEXT: movq %rcx, %rax |
| ; SSE41-NEXT: mulq %rsi |
| ; SSE41-NEXT: movq %rcx, %rax |
| ; SSE41-NEXT: subq %rdx, %rax |
| ; SSE41-NEXT: shrq %rax |
| ; SSE41-NEXT: addq %rdx, %rax |
| ; SSE41-NEXT: shrq $2, %rax |
| ; SSE41-NEXT: leaq (,%rax,8), %rdx |
| ; SSE41-NEXT: subq %rdx, %rax |
| ; SSE41-NEXT: addq %rcx, %rax |
| ; SSE41-NEXT: movq %rax, %xmm0 |
| ; SSE41-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX-LABEL: test_rem7_2i64: |
| ; AVX: # %bb.0: |
| ; AVX-NEXT: vpextrq $1, %xmm0, %rcx |
| ; AVX-NEXT: movabsq $2635249153387078803, %rsi # imm = 0x2492492492492493 |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: mulq %rsi |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: subq %rdx, %rax |
| ; AVX-NEXT: shrq %rax |
| ; AVX-NEXT: addq %rdx, %rax |
| ; AVX-NEXT: shrq $2, %rax |
| ; AVX-NEXT: leaq (,%rax,8), %rdx |
| ; AVX-NEXT: subq %rdx, %rax |
| ; AVX-NEXT: addq %rcx, %rax |
| ; AVX-NEXT: vmovq %rax, %xmm1 |
| ; AVX-NEXT: vmovq %xmm0, %rcx |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: mulq %rsi |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: subq %rdx, %rax |
| ; AVX-NEXT: shrq %rax |
| ; AVX-NEXT: addq %rdx, %rax |
| ; AVX-NEXT: shrq $2, %rax |
| ; AVX-NEXT: leaq (,%rax,8), %rdx |
| ; AVX-NEXT: subq %rdx, %rax |
| ; AVX-NEXT: addq %rcx, %rax |
| ; AVX-NEXT: vmovq %rax, %xmm0 |
| ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] |
| ; AVX-NEXT: retq |
| %res = urem <2 x i64> %a, <i64 7, i64 7> |
| ret <2 x i64> %res |
| } |
| |
| define <4 x i32> @test_rem7_4i32(<4 x i32> %a) nounwind { |
| ; SSE2-LABEL: test_rem7_4i32: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [613566757,613566757,613566757,613566757] |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: pmuludq %xmm1, %xmm2 |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,3,2,3] |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] |
| ; SSE2-NEXT: pmuludq %xmm1, %xmm3 |
| ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[1,3,2,3] |
| ; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] |
| ; SSE2-NEXT: movdqa %xmm0, %xmm1 |
| ; SSE2-NEXT: psubd %xmm2, %xmm1 |
| ; SSE2-NEXT: psrld $1, %xmm1 |
| ; SSE2-NEXT: paddd %xmm2, %xmm1 |
| ; SSE2-NEXT: psrld $2, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm1, %xmm2 |
| ; SSE2-NEXT: pslld $3, %xmm2 |
| ; SSE2-NEXT: psubd %xmm2, %xmm1 |
| ; SSE2-NEXT: paddd %xmm1, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_rem7_4i32: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [613566757,613566757,613566757,613566757] |
| ; SSE41-NEXT: pmuludq %xmm2, %xmm1 |
| ; SSE41-NEXT: pmuludq %xmm0, %xmm2 |
| ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] |
| ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7] |
| ; SSE41-NEXT: movdqa %xmm0, %xmm1 |
| ; SSE41-NEXT: psubd %xmm2, %xmm1 |
| ; SSE41-NEXT: psrld $1, %xmm1 |
| ; SSE41-NEXT: paddd %xmm2, %xmm1 |
| ; SSE41-NEXT: psrld $2, %xmm1 |
| ; SSE41-NEXT: movdqa %xmm1, %xmm2 |
| ; SSE41-NEXT: pslld $3, %xmm2 |
| ; SSE41-NEXT: psubd %xmm2, %xmm1 |
| ; SSE41-NEXT: paddd %xmm1, %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX1-LABEL: test_rem7_4i32: |
| ; AVX1: # %bb.0: |
| ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [613566757,613566757,613566757,613566757] |
| ; AVX1-NEXT: vpmuludq %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm2 |
| ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] |
| ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7] |
| ; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm2 |
| ; AVX1-NEXT: vpsrld $1, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpaddd %xmm1, %xmm2, %xmm1 |
| ; AVX1-NEXT: vpsrld $2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpslld $3, %xmm1, %xmm2 |
| ; AVX1-NEXT: vpsubd %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: retq |
| ; |
| ; AVX2-LABEL: test_rem7_4i32: |
| ; AVX2: # %bb.0: |
| ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] |
| ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [613566757,613566757,613566757,613566757] |
| ; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm1 |
| ; AVX2-NEXT: vpmuludq %xmm2, %xmm0, %xmm2 |
| ; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] |
| ; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm2[0],xmm1[1],xmm2[2],xmm1[3] |
| ; AVX2-NEXT: vpsubd %xmm1, %xmm0, %xmm2 |
| ; AVX2-NEXT: vpsrld $1, %xmm2, %xmm2 |
| ; AVX2-NEXT: vpaddd %xmm1, %xmm2, %xmm1 |
| ; AVX2-NEXT: vpsrld $2, %xmm1, %xmm1 |
| ; AVX2-NEXT: vpslld $3, %xmm1, %xmm2 |
| ; AVX2-NEXT: vpsubd %xmm2, %xmm1, %xmm1 |
| ; AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0 |
| ; AVX2-NEXT: retq |
| %res = urem <4 x i32> %a, <i32 7, i32 7, i32 7, i32 7> |
| ret <4 x i32> %res |
| } |
| |
| define <8 x i16> @test_rem7_8i16(<8 x i16> %a) nounwind { |
| ; SSE-LABEL: test_rem7_8i16: |
| ; SSE: # %bb.0: |
| ; SSE-NEXT: movdqa {{.*#+}} xmm1 = [9363,9363,9363,9363,9363,9363,9363,9363] |
| ; SSE-NEXT: pmulhuw %xmm0, %xmm1 |
| ; SSE-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE-NEXT: psubw %xmm1, %xmm2 |
| ; SSE-NEXT: psrlw $1, %xmm2 |
| ; SSE-NEXT: paddw %xmm1, %xmm2 |
| ; SSE-NEXT: psrlw $2, %xmm2 |
| ; SSE-NEXT: movdqa %xmm2, %xmm1 |
| ; SSE-NEXT: psllw $3, %xmm1 |
| ; SSE-NEXT: psubw %xmm1, %xmm2 |
| ; SSE-NEXT: paddw %xmm2, %xmm0 |
| ; SSE-NEXT: retq |
| ; |
| ; AVX-LABEL: test_rem7_8i16: |
| ; AVX: # %bb.0: |
| ; AVX-NEXT: vpmulhuw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1 # [9363,9363,9363,9363,9363,9363,9363,9363] |
| ; AVX-NEXT: vpsubw %xmm1, %xmm0, %xmm2 |
| ; AVX-NEXT: vpsrlw $1, %xmm2, %xmm2 |
| ; AVX-NEXT: vpaddw %xmm1, %xmm2, %xmm1 |
| ; AVX-NEXT: vpsrlw $2, %xmm1, %xmm1 |
| ; AVX-NEXT: vpsllw $3, %xmm1, %xmm2 |
| ; AVX-NEXT: vpsubw %xmm2, %xmm1, %xmm1 |
| ; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0 |
| ; AVX-NEXT: retq |
| %res = urem <8 x i16> %a, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> |
| ret <8 x i16> %res |
| } |
| |
| define <16 x i8> @test_rem7_16i8(<16 x i8> %a) nounwind { |
| ; SSE2-LABEL: test_rem7_16i8: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: pxor %xmm1, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [37,0,37,0,37,0,37,0,37,0,37,0,37,0,37,0] |
| ; SSE2-NEXT: pmullw %xmm3, %xmm2 |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm4 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] |
| ; SSE2-NEXT: pmullw %xmm3, %xmm4 |
| ; SSE2-NEXT: psrlw $8, %xmm4 |
| ; SSE2-NEXT: packuswb %xmm2, %xmm4 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm1 |
| ; SSE2-NEXT: psubb %xmm4, %xmm1 |
| ; SSE2-NEXT: psrlw $1, %xmm1 |
| ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 |
| ; SSE2-NEXT: paddb %xmm4, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm1, %xmm2 |
| ; SSE2-NEXT: paddw %xmm2, %xmm2 |
| ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 |
| ; SSE2-NEXT: psrlw $2, %xmm1 |
| ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 |
| ; SSE2-NEXT: psubb %xmm2, %xmm1 |
| ; SSE2-NEXT: paddb %xmm1, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_rem7_16i8: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pxor %xmm1, %xmm1 |
| ; SSE41-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE41-NEXT: pmovsxbw {{.*#+}} xmm1 = [37,37,37,37,37,37,37,37] |
| ; SSE41-NEXT: pmullw %xmm1, %xmm2 |
| ; SSE41-NEXT: psrlw $8, %xmm2 |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; SSE41-NEXT: pmullw %xmm1, %xmm3 |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: packuswb %xmm2, %xmm3 |
| ; SSE41-NEXT: movdqa %xmm0, %xmm1 |
| ; SSE41-NEXT: psubb %xmm3, %xmm1 |
| ; SSE41-NEXT: psrlw $1, %xmm1 |
| ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 |
| ; SSE41-NEXT: paddb %xmm3, %xmm1 |
| ; SSE41-NEXT: movdqa %xmm1, %xmm2 |
| ; SSE41-NEXT: paddw %xmm2, %xmm2 |
| ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 |
| ; SSE41-NEXT: psrlw $2, %xmm1 |
| ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 |
| ; SSE41-NEXT: psubb %xmm2, %xmm1 |
| ; SSE41-NEXT: paddb %xmm1, %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX1-LABEL: test_rem7_16i8: |
| ; AVX1: # %bb.0: |
| ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm2 = [37,0,37,0,37,0,37,0,37,0,37,0,37,0,37,0] |
| ; AVX1-NEXT: vpmullw %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; AVX1-NEXT: vpmullw %xmm2, %xmm3, %xmm2 |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 |
| ; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm2 |
| ; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 |
| ; AVX1-NEXT: vpaddb %xmm1, %xmm2, %xmm1 |
| ; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm2 |
| ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 |
| ; AVX1-NEXT: vpsrlw $2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 |
| ; AVX1-NEXT: vpsubb %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: retq |
| ; |
| ; AVX2NOBW-LABEL: test_rem7_16i8: |
| ; AVX2NOBW: # %bb.0: |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpsubb %xmm1, %xmm0, %xmm2 |
| ; AVX2NOBW-NEXT: vpsrlw $1, %xmm2, %xmm2 |
| ; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 |
| ; AVX2NOBW-NEXT: vpaddb %xmm1, %xmm2, %xmm1 |
| ; AVX2NOBW-NEXT: vpaddw %xmm1, %xmm1, %xmm2 |
| ; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 |
| ; AVX2NOBW-NEXT: vpsrlw $2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpsubb %xmm2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vzeroupper |
| ; AVX2NOBW-NEXT: retq |
| ; |
| ; AVX512BW-LABEL: test_rem7_16i8: |
| ; AVX512BW: # %bb.0: |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37] |
| ; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 |
| ; AVX512BW-NEXT: vpsubb %xmm1, %xmm0, %xmm2 |
| ; AVX512BW-NEXT: vpsrlw $1, %xmm2, %xmm2 |
| ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 |
| ; AVX512BW-NEXT: vpaddb %xmm1, %xmm2, %xmm1 |
| ; AVX512BW-NEXT: vpaddw %xmm1, %xmm1, %xmm2 |
| ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 |
| ; AVX512BW-NEXT: vpsrlw $2, %xmm1, %xmm1 |
| ; AVX512BW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 |
| ; AVX512BW-NEXT: vpsubb %xmm2, %xmm1, %xmm1 |
| ; AVX512BW-NEXT: vpaddb %xmm1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vzeroupper |
| ; AVX512BW-NEXT: retq |
| %res = urem <16 x i8> %a, <i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7,i8 7, i8 7, i8 7, i8 7> |
| ret <16 x i8> %res |
| } |
| |
| ; |
| ; srem by non-splat constant |
| ; |
| |
| define <16 x i8> @test_remconstant_16i8(<16 x i8> %a) nounwind { |
| ; SSE2-LABEL: test_remconstant_16i8: |
| ; SSE2: # %bb.0: |
| ; SSE2-NEXT: pxor %xmm1, %xmm1 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [128,256,256,256,256,256,256,256] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [147,0,79,0,171,0,117,0,205,0,57,0,57,0,37,0] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm3 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [256,256,256,256,256,256,256,128] |
| ; SSE2-NEXT: psrlw $8, %xmm3 |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [37,0,32,0,57,0,205,0,117,0,171,0,79,0,147,0] |
| ; SSE2-NEXT: psrlw $8, %xmm3 |
| ; SSE2-NEXT: packuswb %xmm2, %xmm3 |
| ; SSE2-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE2-NEXT: psubb %xmm3, %xmm2 |
| ; SSE2-NEXT: movdqa %xmm2, %xmm4 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm1[8],xmm4[9],xmm1[9],xmm4[10],xmm1[10],xmm4[11],xmm1[11],xmm4[12],xmm1[12],xmm4[13],xmm1[13],xmm4[14],xmm1[14],xmm4[15],xmm1[15] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4 # [0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0] |
| ; SSE2-NEXT: psrlw $8, %xmm4 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: packuswb %xmm4, %xmm2 |
| ; SSE2-NEXT: paddb %xmm3, %xmm2 |
| ; SSE2-NEXT: movdqa %xmm2, %xmm3 |
| ; SSE2-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [64,64,32,32,32,128,128,64] |
| ; SSE2-NEXT: psrlw $8, %xmm3 |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [14,u,13,u,12,u,11,u,10,u,9,u,9,u,7,u] |
| ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] |
| ; SSE2-NEXT: pand %xmm4, %xmm3 |
| ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [64,256,128,32,32,32,64,64] |
| ; SSE2-NEXT: psrlw $8, %xmm2 |
| ; SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [7,u,8,u,9,u,10,u,11,u,12,u,13,u,14,u] |
| ; SSE2-NEXT: pand %xmm4, %xmm2 |
| ; SSE2-NEXT: packuswb %xmm3, %xmm2 |
| ; SSE2-NEXT: psubb %xmm2, %xmm0 |
| ; SSE2-NEXT: retq |
| ; |
| ; SSE41-LABEL: test_remconstant_16i8: |
| ; SSE41: # %bb.0: |
| ; SSE41-NEXT: pxor %xmm1, %xmm1 |
| ; SSE41-NEXT: pxor %xmm2, %xmm2 |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] |
| ; SSE41-NEXT: movdqa %xmm0, %xmm3 |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] |
| ; SSE41-NEXT: psllw $7, %xmm3 |
| ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm2[1,2,3,4,5,6,7] |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [147,0,79,0,171,0,117,0,205,0,57,0,57,0,37,0] |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: pxor %xmm2, %xmm2 |
| ; SSE41-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; SSE41-NEXT: psllw $7, %xmm4 |
| ; SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm2[0,1,2,3,4,5,6],xmm4[7] |
| ; SSE41-NEXT: psrlw $8, %xmm4 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4 # [37,0,32,0,57,0,205,0,117,0,171,0,79,0,147,0] |
| ; SSE41-NEXT: psrlw $8, %xmm4 |
| ; SSE41-NEXT: packuswb %xmm3, %xmm4 |
| ; SSE41-NEXT: movdqa %xmm0, %xmm2 |
| ; SSE41-NEXT: psubb %xmm4, %xmm2 |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm3 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0] |
| ; SSE41-NEXT: psrlw $8, %xmm2 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0] |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: packuswb %xmm2, %xmm3 |
| ; SSE41-NEXT: paddb %xmm4, %xmm3 |
| ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero |
| ; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3 # [64,64,32,32,32,128,128,64] |
| ; SSE41-NEXT: psrlw $8, %xmm3 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [64,256,128,32,32,32,64,64] |
| ; SSE41-NEXT: psrlw $8, %xmm2 |
| ; SSE41-NEXT: packuswb %xmm3, %xmm2 |
| ; SSE41-NEXT: movdqa %xmm2, %xmm1 |
| ; SSE41-NEXT: pmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1 # [0,8,0,10,0,12,0,14,0,13,0,11,0,9,0,7] |
| ; SSE41-NEXT: psllw $8, %xmm1 |
| ; SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 # [7,8,9,10,11,12,13,14,14,13,12,11,10,9,9,7] |
| ; SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2 |
| ; SSE41-NEXT: por %xmm1, %xmm2 |
| ; SSE41-NEXT: psubb %xmm2, %xmm0 |
| ; SSE41-NEXT: retq |
| ; |
| ; AVX1-LABEL: test_remconstant_16i8: |
| ; AVX1: # %bb.0: |
| ; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] |
| ; AVX1-NEXT: vpsllw $7, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0],xmm2[1,2,3,4,5,6,7] |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [147,0,79,0,171,0,117,0,205,0,57,0,57,0,37,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm3 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero |
| ; AVX1-NEXT: vpsllw $7, %xmm4, %xmm4 |
| ; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,5,6],xmm4[7] |
| ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3 # [37,0,32,0,57,0,205,0,117,0,171,0,79,0,147,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 |
| ; AVX1-NEXT: vpsubb %xmm2, %xmm0, %xmm3 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm4 # [0,0,0,0,0,0,128,0,0,0,0,0,0,0,128,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm4, %xmm4 |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3 # [128,0,0,0,0,0,0,0,128,0,0,0,0,0,0,0] |
| ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 |
| ; AVX1-NEXT: vpaddb %xmm2, %xmm3, %xmm2 |
| ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [64,64,32,32,32,128,128,64] |
| ; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2 # [64,256,128,32,32,32,64,64] |
| ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 |
| ; AVX1-NEXT: vpmaddubsw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2 # [0,8,0,10,0,12,0,14,0,13,0,11,0,9,0,7] |
| ; AVX1-NEXT: vpsllw $8, %xmm2, %xmm2 |
| ; AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 # [7,8,9,10,11,12,13,14,14,13,12,11,10,9,9,7] |
| ; AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1 |
| ; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1 |
| ; AVX1-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX1-NEXT: retq |
| ; |
| ; AVX2NOBW-LABEL: test_remconstant_16i8: |
| ; AVX2NOBW: # %bb.0: |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [256,256,256,256,256,256,256,128,128,256,256,256,256,256,256,256] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,32,57,205,117,171,79,147,147,79,171,117,205,57,57,37] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpsubb %xmm1, %xmm0, %xmm2 |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm2 # [128,0,0,0,128,0,0,0,0,0,0,128,0,0,0,128] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm2, %ymm2 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm2, %xmm3 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 |
| ; AVX2NOBW-NEXT: vpaddb %xmm1, %xmm2, %xmm1 |
| ; AVX2NOBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [64,256,128,32,32,32,64,64,64,64,32,32,32,128,128,64] |
| ; AVX2NOBW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [7,8,9,10,11,12,13,14,14,13,12,11,10,9,9,7] |
| ; AVX2NOBW-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 |
| ; AVX2NOBW-NEXT: vextracti128 $1, %ymm1, %xmm2 |
| ; AVX2NOBW-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 |
| ; AVX2NOBW-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX2NOBW-NEXT: vzeroupper |
| ; AVX2NOBW-NEXT: retq |
| ; |
| ; AVX512BW-LABEL: test_remconstant_16i8: |
| ; AVX512BW: # %bb.0: |
| ; AVX512BW-NEXT: vpmovsxbw {{.*#+}} ymm1 = [0,0,0,0,0,0,0,1,1,0,0,0,0,0,0,0] |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero |
| ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm2, %zmm1 |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [37,32,57,205,117,171,79,147,147,79,171,117,205,57,57,37] |
| ; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 |
| ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 |
| ; AVX512BW-NEXT: vpsubb %xmm1, %xmm0, %xmm2 |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm2 # [128,0,0,0,128,0,0,0,0,0,0,128,0,0,0,128] |
| ; AVX512BW-NEXT: vpsrlw $8, %ymm2, %ymm2 |
| ; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 |
| ; AVX512BW-NEXT: vpaddb %xmm1, %xmm2, %xmm1 |
| ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero |
| ; AVX512BW-NEXT: vpmovsxbw {{.*#+}} ymm2 = [2,0,1,3,3,3,2,2,2,2,3,3,3,1,1,2] |
| ; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm1, %zmm1 |
| ; AVX512BW-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1 # [7,8,9,10,11,12,13,14,14,13,12,11,10,9,9,7] |
| ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 |
| ; AVX512BW-NEXT: vpsubb %xmm1, %xmm0, %xmm0 |
| ; AVX512BW-NEXT: vzeroupper |
| ; AVX512BW-NEXT: retq |
| %res = urem <16 x i8> %a, <i8 7, i8 8, i8 9, i8 10,i8 11, i8 12, i8 13, i8 14, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9,i8 9, i8 7> |
| ret <16 x i8> %res |
| } |
| |
| define <2 x i128> @v2i128_div_by_7(<2 x i128> %x) nounwind { |
| ; SSE-LABEL: v2i128_div_by_7: |
| ; SSE: # %bb.0: # %entry |
| ; SSE-NEXT: pushq %r15 |
| ; SSE-NEXT: pushq %r14 |
| ; SSE-NEXT: pushq %rbx |
| ; SSE-NEXT: movq %rcx, %r9 |
| ; SSE-NEXT: movq %rdx, %rcx |
| ; SSE-NEXT: movabsq $1152921504606846975, %r14 # imm = 0xFFFFFFFFFFFFFFF |
| ; SSE-NEXT: movq %rsi, %rax |
| ; SSE-NEXT: andq %r14, %rax |
| ; SSE-NEXT: movq %rsi, %rdx |
| ; SSE-NEXT: shrdq $60, %rcx, %rdx |
| ; SSE-NEXT: andq %r14, %rdx |
| ; SSE-NEXT: addq %rax, %rdx |
| ; SSE-NEXT: movq %rcx, %r10 |
| ; SSE-NEXT: shrq $56, %r10 |
| ; SSE-NEXT: addq %rdx, %r10 |
| ; SSE-NEXT: movabsq $5270498306774157605, %r15 # imm = 0x4924924924924925 |
| ; SSE-NEXT: movq %r10, %rax |
| ; SSE-NEXT: mulq %r15 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leaq (,%rdx,8), %rax |
| ; SSE-NEXT: subq %rax, %rdx |
| ; SSE-NEXT: addq %r10, %rdx |
| ; SSE-NEXT: subq %rdx, %rsi |
| ; SSE-NEXT: sbbq $0, %rcx |
| ; SSE-NEXT: movabsq $-5270498306774157605, %r11 # imm = 0xB6DB6DB6DB6DB6DB |
| ; SSE-NEXT: movq %rsi, %r10 |
| ; SSE-NEXT: imulq %r11, %r10 |
| ; SSE-NEXT: movabsq $7905747460161236407, %rbx # imm = 0x6DB6DB6DB6DB6DB7 |
| ; SSE-NEXT: movq %rsi, %rax |
| ; SSE-NEXT: mulq %rbx |
| ; SSE-NEXT: movq %rax, %rsi |
| ; SSE-NEXT: addq %r10, %rdx |
| ; SSE-NEXT: imulq %rbx, %rcx |
| ; SSE-NEXT: addq %rdx, %rcx |
| ; SSE-NEXT: movq %r9, %rax |
| ; SSE-NEXT: andq %r14, %rax |
| ; SSE-NEXT: movq %r9, %rdx |
| ; SSE-NEXT: shrdq $60, %r8, %rdx |
| ; SSE-NEXT: andq %r14, %rdx |
| ; SSE-NEXT: addq %rax, %rdx |
| ; SSE-NEXT: movq %r8, %r10 |
| ; SSE-NEXT: shrq $56, %r10 |
| ; SSE-NEXT: addq %rdx, %r10 |
| ; SSE-NEXT: movq %r10, %rax |
| ; SSE-NEXT: mulq %r15 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leaq (,%rdx,8), %rax |
| ; SSE-NEXT: subq %rax, %rdx |
| ; SSE-NEXT: addq %r10, %rdx |
| ; SSE-NEXT: subq %rdx, %r9 |
| ; SSE-NEXT: sbbq $0, %r8 |
| ; SSE-NEXT: imulq %r9, %r11 |
| ; SSE-NEXT: movq %r9, %rax |
| ; SSE-NEXT: mulq %rbx |
| ; SSE-NEXT: addq %r11, %rdx |
| ; SSE-NEXT: imulq %rbx, %r8 |
| ; SSE-NEXT: addq %rdx, %r8 |
| ; SSE-NEXT: movq %rax, 16(%rdi) |
| ; SSE-NEXT: movq %rsi, (%rdi) |
| ; SSE-NEXT: movq %r8, 24(%rdi) |
| ; SSE-NEXT: movq %rcx, 8(%rdi) |
| ; SSE-NEXT: movq %rdi, %rax |
| ; SSE-NEXT: popq %rbx |
| ; SSE-NEXT: popq %r14 |
| ; SSE-NEXT: popq %r15 |
| ; SSE-NEXT: retq |
| ; |
| ; AVX-LABEL: v2i128_div_by_7: |
| ; AVX: # %bb.0: # %entry |
| ; AVX-NEXT: pushq %r15 |
| ; AVX-NEXT: pushq %r14 |
| ; AVX-NEXT: pushq %rbx |
| ; AVX-NEXT: movq %rcx, %r9 |
| ; AVX-NEXT: movq %rdx, %rcx |
| ; AVX-NEXT: movabsq $1152921504606846975, %r14 # imm = 0xFFFFFFFFFFFFFFF |
| ; AVX-NEXT: movq %rsi, %rax |
| ; AVX-NEXT: andq %r14, %rax |
| ; AVX-NEXT: movq %rsi, %rdx |
| ; AVX-NEXT: shrdq $60, %rcx, %rdx |
| ; AVX-NEXT: andq %r14, %rdx |
| ; AVX-NEXT: addq %rax, %rdx |
| ; AVX-NEXT: movq %rcx, %r10 |
| ; AVX-NEXT: shrq $56, %r10 |
| ; AVX-NEXT: addq %rdx, %r10 |
| ; AVX-NEXT: movabsq $5270498306774157605, %r15 # imm = 0x4924924924924925 |
| ; AVX-NEXT: movq %r10, %rax |
| ; AVX-NEXT: mulq %r15 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leaq (,%rdx,8), %rax |
| ; AVX-NEXT: subq %rax, %rdx |
| ; AVX-NEXT: addq %r10, %rdx |
| ; AVX-NEXT: subq %rdx, %rsi |
| ; AVX-NEXT: sbbq $0, %rcx |
| ; AVX-NEXT: movabsq $-5270498306774157605, %r11 # imm = 0xB6DB6DB6DB6DB6DB |
| ; AVX-NEXT: movq %rsi, %r10 |
| ; AVX-NEXT: imulq %r11, %r10 |
| ; AVX-NEXT: movabsq $7905747460161236407, %rbx # imm = 0x6DB6DB6DB6DB6DB7 |
| ; AVX-NEXT: movq %rsi, %rax |
| ; AVX-NEXT: mulq %rbx |
| ; AVX-NEXT: movq %rax, %rsi |
| ; AVX-NEXT: addq %r10, %rdx |
| ; AVX-NEXT: imulq %rbx, %rcx |
| ; AVX-NEXT: addq %rdx, %rcx |
| ; AVX-NEXT: movq %r9, %rax |
| ; AVX-NEXT: andq %r14, %rax |
| ; AVX-NEXT: movq %r9, %rdx |
| ; AVX-NEXT: shrdq $60, %r8, %rdx |
| ; AVX-NEXT: andq %r14, %rdx |
| ; AVX-NEXT: addq %rax, %rdx |
| ; AVX-NEXT: movq %r8, %r10 |
| ; AVX-NEXT: shrq $56, %r10 |
| ; AVX-NEXT: addq %rdx, %r10 |
| ; AVX-NEXT: movq %r10, %rax |
| ; AVX-NEXT: mulq %r15 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leaq (,%rdx,8), %rax |
| ; AVX-NEXT: subq %rax, %rdx |
| ; AVX-NEXT: addq %r10, %rdx |
| ; AVX-NEXT: subq %rdx, %r9 |
| ; AVX-NEXT: sbbq $0, %r8 |
| ; AVX-NEXT: imulq %r9, %r11 |
| ; AVX-NEXT: movq %r9, %rax |
| ; AVX-NEXT: mulq %rbx |
| ; AVX-NEXT: addq %r11, %rdx |
| ; AVX-NEXT: imulq %rbx, %r8 |
| ; AVX-NEXT: addq %rdx, %r8 |
| ; AVX-NEXT: movq %rax, 16(%rdi) |
| ; AVX-NEXT: movq %rsi, (%rdi) |
| ; AVX-NEXT: movq %r8, 24(%rdi) |
| ; AVX-NEXT: movq %rcx, 8(%rdi) |
| ; AVX-NEXT: movq %rdi, %rax |
| ; AVX-NEXT: popq %rbx |
| ; AVX-NEXT: popq %r14 |
| ; AVX-NEXT: popq %r15 |
| ; AVX-NEXT: retq |
| entry: |
| %div = udiv <2 x i128> %x, <i128 7, i128 7> |
| ret <2 x i128> %div |
| } |
| |
| define <2 x i128> @v2i128_div_by_14(<2 x i128> %x) nounwind { |
| ; SSE-LABEL: v2i128_div_by_14: |
| ; SSE: # %bb.0: # %entry |
| ; SSE-NEXT: pushq %r15 |
| ; SSE-NEXT: pushq %r14 |
| ; SSE-NEXT: pushq %rbx |
| ; SSE-NEXT: movq %rcx, %r9 |
| ; SSE-NEXT: movq %rdx, %rcx |
| ; SSE-NEXT: movq %rsi, %rax |
| ; SSE-NEXT: shrdq $61, %rdx, %rax |
| ; SSE-NEXT: movabsq $1152921504606846975, %r11 # imm = 0xFFFFFFFFFFFFFFF |
| ; SSE-NEXT: andq %r11, %rax |
| ; SSE-NEXT: shrdq $1, %rdx, %rsi |
| ; SSE-NEXT: movq %rsi, %rdx |
| ; SSE-NEXT: andq %r11, %rdx |
| ; SSE-NEXT: addq %rax, %rdx |
| ; SSE-NEXT: movq %rcx, %r10 |
| ; SSE-NEXT: shrq $57, %r10 |
| ; SSE-NEXT: addq %rdx, %r10 |
| ; SSE-NEXT: movabsq $5270498306774157605, %r15 # imm = 0x4924924924924925 |
| ; SSE-NEXT: movq %r10, %rax |
| ; SSE-NEXT: mulq %r15 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leaq (,%rdx,8), %rax |
| ; SSE-NEXT: subq %rax, %rdx |
| ; SSE-NEXT: addq %r10, %rdx |
| ; SSE-NEXT: shrq %rcx |
| ; SSE-NEXT: subq %rdx, %rsi |
| ; SSE-NEXT: sbbq $0, %rcx |
| ; SSE-NEXT: movabsq $-5270498306774157605, %rbx # imm = 0xB6DB6DB6DB6DB6DB |
| ; SSE-NEXT: movq %rsi, %r10 |
| ; SSE-NEXT: imulq %rbx, %r10 |
| ; SSE-NEXT: movabsq $7905747460161236407, %r14 # imm = 0x6DB6DB6DB6DB6DB7 |
| ; SSE-NEXT: movq %rsi, %rax |
| ; SSE-NEXT: mulq %r14 |
| ; SSE-NEXT: movq %rax, %rsi |
| ; SSE-NEXT: addq %r10, %rdx |
| ; SSE-NEXT: imulq %r14, %rcx |
| ; SSE-NEXT: addq %rdx, %rcx |
| ; SSE-NEXT: movq %r9, %rax |
| ; SSE-NEXT: shrdq $61, %r8, %rax |
| ; SSE-NEXT: andq %r11, %rax |
| ; SSE-NEXT: shrdq $1, %r8, %r9 |
| ; SSE-NEXT: andq %r9, %r11 |
| ; SSE-NEXT: addq %rax, %r11 |
| ; SSE-NEXT: movq %r8, %r10 |
| ; SSE-NEXT: shrq $57, %r10 |
| ; SSE-NEXT: addq %r11, %r10 |
| ; SSE-NEXT: movq %r10, %rax |
| ; SSE-NEXT: mulq %r15 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leaq (,%rdx,8), %rax |
| ; SSE-NEXT: subq %rax, %rdx |
| ; SSE-NEXT: addq %r10, %rdx |
| ; SSE-NEXT: shrq %r8 |
| ; SSE-NEXT: subq %rdx, %r9 |
| ; SSE-NEXT: sbbq $0, %r8 |
| ; SSE-NEXT: imulq %r9, %rbx |
| ; SSE-NEXT: movq %r9, %rax |
| ; SSE-NEXT: mulq %r14 |
| ; SSE-NEXT: addq %rbx, %rdx |
| ; SSE-NEXT: imulq %r14, %r8 |
| ; SSE-NEXT: addq %rdx, %r8 |
| ; SSE-NEXT: movq %rax, 16(%rdi) |
| ; SSE-NEXT: movq %rsi, (%rdi) |
| ; SSE-NEXT: movq %r8, 24(%rdi) |
| ; SSE-NEXT: movq %rcx, 8(%rdi) |
| ; SSE-NEXT: movq %rdi, %rax |
| ; SSE-NEXT: popq %rbx |
| ; SSE-NEXT: popq %r14 |
| ; SSE-NEXT: popq %r15 |
| ; SSE-NEXT: retq |
| ; |
| ; AVX-LABEL: v2i128_div_by_14: |
| ; AVX: # %bb.0: # %entry |
| ; AVX-NEXT: pushq %r15 |
| ; AVX-NEXT: pushq %r14 |
| ; AVX-NEXT: pushq %rbx |
| ; AVX-NEXT: movq %rcx, %r9 |
| ; AVX-NEXT: movq %rdx, %rcx |
| ; AVX-NEXT: movq %rsi, %rax |
| ; AVX-NEXT: shrdq $61, %rdx, %rax |
| ; AVX-NEXT: movabsq $1152921504606846975, %r11 # imm = 0xFFFFFFFFFFFFFFF |
| ; AVX-NEXT: andq %r11, %rax |
| ; AVX-NEXT: shrdq $1, %rdx, %rsi |
| ; AVX-NEXT: movq %rsi, %rdx |
| ; AVX-NEXT: andq %r11, %rdx |
| ; AVX-NEXT: addq %rax, %rdx |
| ; AVX-NEXT: movq %rcx, %r10 |
| ; AVX-NEXT: shrq $57, %r10 |
| ; AVX-NEXT: addq %rdx, %r10 |
| ; AVX-NEXT: movabsq $5270498306774157605, %r15 # imm = 0x4924924924924925 |
| ; AVX-NEXT: movq %r10, %rax |
| ; AVX-NEXT: mulq %r15 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leaq (,%rdx,8), %rax |
| ; AVX-NEXT: subq %rax, %rdx |
| ; AVX-NEXT: addq %r10, %rdx |
| ; AVX-NEXT: shrq %rcx |
| ; AVX-NEXT: subq %rdx, %rsi |
| ; AVX-NEXT: sbbq $0, %rcx |
| ; AVX-NEXT: movabsq $-5270498306774157605, %rbx # imm = 0xB6DB6DB6DB6DB6DB |
| ; AVX-NEXT: movq %rsi, %r10 |
| ; AVX-NEXT: imulq %rbx, %r10 |
| ; AVX-NEXT: movabsq $7905747460161236407, %r14 # imm = 0x6DB6DB6DB6DB6DB7 |
| ; AVX-NEXT: movq %rsi, %rax |
| ; AVX-NEXT: mulq %r14 |
| ; AVX-NEXT: movq %rax, %rsi |
| ; AVX-NEXT: addq %r10, %rdx |
| ; AVX-NEXT: imulq %r14, %rcx |
| ; AVX-NEXT: addq %rdx, %rcx |
| ; AVX-NEXT: movq %r9, %rax |
| ; AVX-NEXT: shrdq $61, %r8, %rax |
| ; AVX-NEXT: andq %r11, %rax |
| ; AVX-NEXT: shrdq $1, %r8, %r9 |
| ; AVX-NEXT: andq %r9, %r11 |
| ; AVX-NEXT: addq %rax, %r11 |
| ; AVX-NEXT: movq %r8, %r10 |
| ; AVX-NEXT: shrq $57, %r10 |
| ; AVX-NEXT: addq %r11, %r10 |
| ; AVX-NEXT: movq %r10, %rax |
| ; AVX-NEXT: mulq %r15 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leaq (,%rdx,8), %rax |
| ; AVX-NEXT: subq %rax, %rdx |
| ; AVX-NEXT: addq %r10, %rdx |
| ; AVX-NEXT: shrq %r8 |
| ; AVX-NEXT: subq %rdx, %r9 |
| ; AVX-NEXT: sbbq $0, %r8 |
| ; AVX-NEXT: imulq %r9, %rbx |
| ; AVX-NEXT: movq %r9, %rax |
| ; AVX-NEXT: mulq %r14 |
| ; AVX-NEXT: addq %rbx, %rdx |
| ; AVX-NEXT: imulq %r14, %r8 |
| ; AVX-NEXT: addq %rdx, %r8 |
| ; AVX-NEXT: movq %rax, 16(%rdi) |
| ; AVX-NEXT: movq %rsi, (%rdi) |
| ; AVX-NEXT: movq %r8, 24(%rdi) |
| ; AVX-NEXT: movq %rcx, 8(%rdi) |
| ; AVX-NEXT: movq %rdi, %rax |
| ; AVX-NEXT: popq %rbx |
| ; AVX-NEXT: popq %r14 |
| ; AVX-NEXT: popq %r15 |
| ; AVX-NEXT: retq |
| entry: |
| %div = udiv <2 x i128> %x, <i128 14, i128 14> |
| ret <2 x i128> %div |
| } |
| |
| define <2 x i128> @v2i128_rem_by_7(<2 x i128> %x) nounwind { |
| ; SSE-LABEL: v2i128_rem_by_7: |
| ; SSE: # %bb.0: # %entry |
| ; SSE-NEXT: movq %rdx, %r9 |
| ; SSE-NEXT: movabsq $1152921504606846975, %r10 # imm = 0xFFFFFFFFFFFFFFF |
| ; SSE-NEXT: movq %rsi, %rax |
| ; SSE-NEXT: andq %r10, %rax |
| ; SSE-NEXT: shrdq $60, %rdx, %rsi |
| ; SSE-NEXT: andq %r10, %rsi |
| ; SSE-NEXT: addq %rax, %rsi |
| ; SSE-NEXT: shrq $56, %r9 |
| ; SSE-NEXT: addq %rsi, %r9 |
| ; SSE-NEXT: movabsq $5270498306774157605, %r11 # imm = 0x4924924924924925 |
| ; SSE-NEXT: movq %r9, %rax |
| ; SSE-NEXT: mulq %r11 |
| ; SSE-NEXT: movq %rdx, %rsi |
| ; SSE-NEXT: shrq %rsi |
| ; SSE-NEXT: leaq (,%rsi,8), %rax |
| ; SSE-NEXT: subq %rax, %rsi |
| ; SSE-NEXT: addq %r9, %rsi |
| ; SSE-NEXT: movq %rcx, %rax |
| ; SSE-NEXT: andq %r10, %rax |
| ; SSE-NEXT: shrdq $60, %r8, %rcx |
| ; SSE-NEXT: andq %r10, %rcx |
| ; SSE-NEXT: addq %rax, %rcx |
| ; SSE-NEXT: shrq $56, %r8 |
| ; SSE-NEXT: addq %rcx, %r8 |
| ; SSE-NEXT: movq %r8, %rax |
| ; SSE-NEXT: mulq %r11 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leaq (,%rdx,8), %rax |
| ; SSE-NEXT: subq %rax, %rdx |
| ; SSE-NEXT: addq %r8, %rdx |
| ; SSE-NEXT: movq %rdx, 16(%rdi) |
| ; SSE-NEXT: movq %rsi, (%rdi) |
| ; SSE-NEXT: movq $0, 24(%rdi) |
| ; SSE-NEXT: movq $0, 8(%rdi) |
| ; SSE-NEXT: movq %rdi, %rax |
| ; SSE-NEXT: retq |
| ; |
| ; AVX-LABEL: v2i128_rem_by_7: |
| ; AVX: # %bb.0: # %entry |
| ; AVX-NEXT: movq %rdx, %r9 |
| ; AVX-NEXT: movabsq $1152921504606846975, %r10 # imm = 0xFFFFFFFFFFFFFFF |
| ; AVX-NEXT: movq %rsi, %rax |
| ; AVX-NEXT: andq %r10, %rax |
| ; AVX-NEXT: shrdq $60, %rdx, %rsi |
| ; AVX-NEXT: andq %r10, %rsi |
| ; AVX-NEXT: addq %rax, %rsi |
| ; AVX-NEXT: shrq $56, %r9 |
| ; AVX-NEXT: addq %rsi, %r9 |
| ; AVX-NEXT: movabsq $5270498306774157605, %r11 # imm = 0x4924924924924925 |
| ; AVX-NEXT: movq %r9, %rax |
| ; AVX-NEXT: mulq %r11 |
| ; AVX-NEXT: movq %rdx, %rsi |
| ; AVX-NEXT: shrq %rsi |
| ; AVX-NEXT: leaq (,%rsi,8), %rax |
| ; AVX-NEXT: subq %rax, %rsi |
| ; AVX-NEXT: addq %r9, %rsi |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: andq %r10, %rax |
| ; AVX-NEXT: shrdq $60, %r8, %rcx |
| ; AVX-NEXT: andq %r10, %rcx |
| ; AVX-NEXT: addq %rax, %rcx |
| ; AVX-NEXT: shrq $56, %r8 |
| ; AVX-NEXT: addq %rcx, %r8 |
| ; AVX-NEXT: movq %r8, %rax |
| ; AVX-NEXT: mulq %r11 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leaq (,%rdx,8), %rax |
| ; AVX-NEXT: subq %rax, %rdx |
| ; AVX-NEXT: addq %r8, %rdx |
| ; AVX-NEXT: movq %rdx, 16(%rdi) |
| ; AVX-NEXT: movq %rsi, (%rdi) |
| ; AVX-NEXT: movq $0, 24(%rdi) |
| ; AVX-NEXT: movq $0, 8(%rdi) |
| ; AVX-NEXT: movq %rdi, %rax |
| ; AVX-NEXT: retq |
| entry: |
| %rem = urem <2 x i128> %x, <i128 7, i128 7> |
| ret <2 x i128> %rem |
| } |
| |
| define <2 x i128> @v2i128_rem_by_14(<2 x i128> %x) nounwind { |
| ; SSE-LABEL: v2i128_rem_by_14: |
| ; SSE: # %bb.0: # %entry |
| ; SSE-NEXT: movq %rdx, %r9 |
| ; SSE-NEXT: movq %rsi, %rax |
| ; SSE-NEXT: shrdq $61, %rdx, %rax |
| ; SSE-NEXT: movabsq $1152921504606846975, %r10 # imm = 0xFFFFFFFFFFFFFFF |
| ; SSE-NEXT: andq %r10, %rax |
| ; SSE-NEXT: movq %rsi, %rdx |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: andq %r10, %rdx |
| ; SSE-NEXT: addq %rax, %rdx |
| ; SSE-NEXT: shrq $57, %r9 |
| ; SSE-NEXT: addq %rdx, %r9 |
| ; SSE-NEXT: movabsq $5270498306774157605, %r11 # imm = 0x4924924924924925 |
| ; SSE-NEXT: movq %r9, %rax |
| ; SSE-NEXT: mulq %r11 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leal (,%rdx,8), %eax |
| ; SSE-NEXT: subl %eax, %edx |
| ; SSE-NEXT: addl %edx, %r9d |
| ; SSE-NEXT: andl $1, %esi |
| ; SSE-NEXT: leaq (%rsi,%r9,2), %rsi |
| ; SSE-NEXT: movq %rcx, %rax |
| ; SSE-NEXT: shrdq $61, %r8, %rax |
| ; SSE-NEXT: andq %r10, %rax |
| ; SSE-NEXT: movq %rcx, %rdx |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: andq %r10, %rdx |
| ; SSE-NEXT: addq %rax, %rdx |
| ; SSE-NEXT: shrq $57, %r8 |
| ; SSE-NEXT: addq %rdx, %r8 |
| ; SSE-NEXT: movq %r8, %rax |
| ; SSE-NEXT: mulq %r11 |
| ; SSE-NEXT: shrq %rdx |
| ; SSE-NEXT: leal (,%rdx,8), %eax |
| ; SSE-NEXT: subl %eax, %edx |
| ; SSE-NEXT: addl %edx, %r8d |
| ; SSE-NEXT: andl $1, %ecx |
| ; SSE-NEXT: leaq (%rcx,%r8,2), %rax |
| ; SSE-NEXT: movq %rax, 16(%rdi) |
| ; SSE-NEXT: movq %rsi, (%rdi) |
| ; SSE-NEXT: movq $0, 24(%rdi) |
| ; SSE-NEXT: movq $0, 8(%rdi) |
| ; SSE-NEXT: movq %rdi, %rax |
| ; SSE-NEXT: retq |
| ; |
| ; AVX-LABEL: v2i128_rem_by_14: |
| ; AVX: # %bb.0: # %entry |
| ; AVX-NEXT: movq %rdx, %r9 |
| ; AVX-NEXT: movq %rsi, %rax |
| ; AVX-NEXT: shrdq $61, %rdx, %rax |
| ; AVX-NEXT: movabsq $1152921504606846975, %r10 # imm = 0xFFFFFFFFFFFFFFF |
| ; AVX-NEXT: andq %r10, %rax |
| ; AVX-NEXT: movq %rsi, %rdx |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: andq %r10, %rdx |
| ; AVX-NEXT: addq %rax, %rdx |
| ; AVX-NEXT: shrq $57, %r9 |
| ; AVX-NEXT: addq %rdx, %r9 |
| ; AVX-NEXT: movabsq $5270498306774157605, %r11 # imm = 0x4924924924924925 |
| ; AVX-NEXT: movq %r9, %rax |
| ; AVX-NEXT: mulq %r11 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leal (,%rdx,8), %eax |
| ; AVX-NEXT: subl %eax, %edx |
| ; AVX-NEXT: addl %edx, %r9d |
| ; AVX-NEXT: andl $1, %esi |
| ; AVX-NEXT: leaq (%rsi,%r9,2), %rsi |
| ; AVX-NEXT: movq %rcx, %rax |
| ; AVX-NEXT: shrdq $61, %r8, %rax |
| ; AVX-NEXT: andq %r10, %rax |
| ; AVX-NEXT: movq %rcx, %rdx |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: andq %r10, %rdx |
| ; AVX-NEXT: addq %rax, %rdx |
| ; AVX-NEXT: shrq $57, %r8 |
| ; AVX-NEXT: addq %rdx, %r8 |
| ; AVX-NEXT: movq %r8, %rax |
| ; AVX-NEXT: mulq %r11 |
| ; AVX-NEXT: shrq %rdx |
| ; AVX-NEXT: leal (,%rdx,8), %eax |
| ; AVX-NEXT: subl %eax, %edx |
| ; AVX-NEXT: addl %edx, %r8d |
| ; AVX-NEXT: andl $1, %ecx |
| ; AVX-NEXT: leaq (%rcx,%r8,2), %rax |
| ; AVX-NEXT: movq %rax, 16(%rdi) |
| ; AVX-NEXT: movq %rsi, (%rdi) |
| ; AVX-NEXT: movq $0, 24(%rdi) |
| ; AVX-NEXT: movq $0, 8(%rdi) |
| ; AVX-NEXT: movq %rdi, %rax |
| ; AVX-NEXT: retq |
| entry: |
| %rem = urem <2 x i128> %x, <i128 14, i128 14> |
| ret <2 x i128> %rem |
| } |
