llvm/test/CodeGen/WebAssembly/GlobalISel/instructions/lshr.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=wasm32-unknown-unknown -run-pass=legalizer,regbankselect,instruction-select -verify-machineinstrs %s -o - | FileCheck %s

---
name: lshr_i32_i8
tracksRegLiveness: true
body: |
  bb.1.entry:
    liveins: $arguments

    ; CHECK-LABEL: name: lshr_i32_i8
    ; CHECK: liveins: $arguments
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
    ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 21, implicit-def dead $arguments
    ; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_]], [[CONST_I32_]], implicit-def dead $arguments
    ; CHECK-NEXT: RETURN [[SHR_U_I32_]], implicit-def $arguments
    %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
    %1:_(s8) = G_CONSTANT i8 21
    %2:_(s32) = G_LSHR %0, %1
    RETURN %2(s32), implicit-def $arguments
...
---
name: lshrv_i32_i8
tracksRegLiveness: true
body: |
  bb.1.entry:
    liveins: $arguments

    ; CHECK-LABEL: name: lshrv_i32_i8
    ; CHECK: liveins: $arguments
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 0, implicit $arguments
    ; CHECK-NEXT: [[ARGUMENT_i32_1:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments
    ; CHECK-NEXT: [[CONST_I32_:%[0-9]+]]:i32 = CONST_I32 255, implicit-def dead $arguments
    ; CHECK-NEXT: [[AND_I32_:%[0-9]+]]:i32 = AND_I32 [[ARGUMENT_i32_1]], [[CONST_I32_]], implicit-def dead $arguments
    ; CHECK-NEXT: [[SHR_U_I32_:%[0-9]+]]:i32 = SHR_U_I32 [[ARGUMENT_i32_]], [[AND_I32_]], implicit-def dead $arguments
    ; CHECK-NEXT: RETURN [[SHR_U_I32_]], implicit-def $arguments
    %0:i32(s32) = ARGUMENT_i32 0, implicit $arguments
    %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
    %1:_(s8) = G_TRUNC %2(s32)
    %3:_(s32) = G_LSHR %0, %1
    RETURN %3(s32), implicit-def $arguments
...

---
name: lshr_i64_i8
tracksRegLiveness: true
body: |
  bb.1.entry:
    liveins: $arguments

    ; CHECK-LABEL: name: lshr_i64_i8
    ; CHECK: liveins: $arguments
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64 = ARGUMENT_i64 0, implicit $arguments
    ; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 37, implicit-def dead $arguments
    ; CHECK-NEXT: [[CONST_I64_1:%[0-9]+]]:i64 = CONST_I64 255, implicit-def dead $arguments
    ; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[CONST_I64_]], [[CONST_I64_1]], implicit-def dead $arguments
    ; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
    ; CHECK-NEXT: RETURN [[SHR_U_I64_]], implicit-def $arguments
    %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
    %1:_(s8) = G_CONSTANT i8 37
    %2:_(s64) = G_LSHR %0, %1
    RETURN %2(s64), implicit-def $arguments
...
---
name: lshrv_i64_i8
tracksRegLiveness: true
body: |
  bb.1.entry:
    liveins: $arguments

    ; CHECK-LABEL: name: lshrv_i64_i8
    ; CHECK: liveins: $arguments
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[ARGUMENT_i64_:%[0-9]+]]:i64 = ARGUMENT_i64 0, implicit $arguments
    ; CHECK-NEXT: [[ARGUMENT_i32_:%[0-9]+]]:i32 = ARGUMENT_i32 1, implicit $arguments
    ; CHECK-NEXT: [[I64_EXTEND_U_I32_:%[0-9]+]]:i64 = I64_EXTEND_U_I32 [[ARGUMENT_i32_]], implicit-def dead $arguments
    ; CHECK-NEXT: [[CONST_I64_:%[0-9]+]]:i64 = CONST_I64 255, implicit-def dead $arguments
    ; CHECK-NEXT: [[AND_I64_:%[0-9]+]]:i64 = AND_I64 [[I64_EXTEND_U_I32_]], [[CONST_I64_]], implicit-def dead $arguments
    ; CHECK-NEXT: [[SHR_U_I64_:%[0-9]+]]:i64 = SHR_U_I64 [[ARGUMENT_i64_]], [[AND_I64_]], implicit-def dead $arguments
    ; CHECK-NEXT: RETURN [[SHR_U_I64_]], implicit-def $arguments
    %0:i64(s64) = ARGUMENT_i64 0, implicit $arguments
    %2:i32(s32) = ARGUMENT_i32 1, implicit $arguments
    %1:_(s8) = G_TRUNC %2(s32)
    %3:_(s64) = G_LSHR %0, %1
    RETURN %3(s64), implicit-def $arguments
...